clk: tegra: Enable misc bit

Change-Id: I3d6ec93ef2296c335b8c9b1b93d251cf17735a6a
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/1265074
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index a0381cc3223fd2ba13dc5de61caf965cc7334b60..5a0ac08a36efa504fc6b4b5a04a804847a511261 100644 (file)
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -3978,6 +3978,10 @@ static void __init tegra210_clock_init(struct device_node *np)
        value &= ~BIT(25);
        clk_writel(value, clk_base + PLLD_BASE);
 
+       value = clk_readl(clk_base + MISC_CLK_ENB);
+       value |= BIT(28);
+       clk_writel(value, clk_base + MISC_CLK_ENB);
+
        tegra_clk_apply_init_table = tegra210_clock_apply_init_table;
 
        tegra_super_clk_gen5_init(clk_base, pmc_base, tegra210_clks,