ARM: tegra: ardbeg/loki: Fix calibration offsets

Based on the latest characterization results, calibration offsets should
be set for all modes. Removing the platform data that would selectively
set calibration offsets for some modes.

Bug 1347531

Change-Id: I40e92c6b2f11a7030e0b0cc6fac03ad12767ada7
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/299520
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

diff --git a/arch/arm/mach-tegra/board-ardbeg-sdhci.c b/arch/arm/mach-tegra/board-ardbeg-sdhci.c
index 57d299c9e74704d1952be96d032ff7384324a6c5..c7c6314e4f314232223df3d2e75c4126804bfe2d 100644 (file)
--- a/arch/arm/mach-tegra/board-ardbeg-sdhci.c
+++ b/arch/arm/mach-tegra/board-ardbeg-sdhci.c
@@ -170,7 +170,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
                MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
-       .calib_1v8_offsets_uhs_modes = MMC_1V8_CALIB_OFFSET_DDR50,
 };
 
 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
@@ -185,7 +184,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
                MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
-       .calib_1v8_offsets_uhs_modes = MMC_1V8_CALIB_OFFSET_DDR50,
 };
 
 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = {
@@ -204,8 +202,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = {
        .max_clk_limit = 102000000,
        .calib_3v3_offsets = 0x0202,
        .calib_1v8_offsets = 0x0202,
-       .calib_1v8_offsets_uhs_modes = MMC_1V8_CALIB_OFFSET_DDR50 |
-               MMC_1V8_CALIB_OFFSET_HS200,
 };
 
 static struct platform_device tegra_sdhci_device0 = {

diff --git a/arch/arm/mach-tegra/board-loki-sdhci.c b/arch/arm/mach-tegra/board-loki-sdhci.c
index 7de81a8d64d854d4b121498be3df54d076807ca6..d93d786f1278d7a858bba0d85561b0e9f0d058fe 100644 (file)
--- a/arch/arm/mach-tegra/board-loki-sdhci.c
+++ b/arch/arm/mach-tegra/board-loki-sdhci.c
@@ -152,7 +152,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
                MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
-       .calib_1v8_offsets_uhs_modes = MMC_1V8_CALIB_OFFSET_DDR50,
 };
 
 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
@@ -167,7 +166,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data2 = {
                MMC_UHS_MASK_DDR50 | MMC_UHS_MASK_SDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
-       .calib_1v8_offsets_uhs_modes = MMC_1V8_CALIB_OFFSET_DDR50,
 };
 
 static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = {
@@ -187,9 +185,6 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data3 = {
        .max_clk_limit = 102000000,
        .calib_3v3_offsets = 0x0202,
        .calib_1v8_offsets = 0x0202,
-       .calib_1v8_offsets_uhs_modes = MMC_1V8_CALIB_OFFSET_DDR50 |
-               MMC_1V8_CALIB_OFFSET_HS200,
-
 };
 
 static struct platform_device tegra_sdhci_device0 = {