]> rtime.felk.cvut.cz Git - hercules2020/nv-tegra/linux-4.4.git/commitdiff
ptm: tegra210: fix support for cpu power states
authorBo Yan <byan@nvidia.com>
Thu, 29 Jan 2015 17:20:51 +0000 (09:20 -0800)
committerDan Willemsen <dwillemsen@nvidia.com>
Sun, 5 Apr 2015 01:04:59 +0000 (18:04 -0700)
The processor ID is not being passed to callback in cpu pm
notifier call chain. So SMP processor id is obtained locally.

Change-Id: I1ad91e091e585ddbd6191ac43fd2280181a74410
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/679048
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
drivers/platform/tegra/tegra_ptm_t210.c

index 786e134ea2e8e68e8209af7032de23edce30223c..8f338cc16a84aeb22154d972b9e80ba750643017 100644 (file)
@@ -175,11 +175,103 @@ static inline void ptm_check_trace_stable(struct tracectx *t, int id, int bit)
        }
 }
 
-#define SAVE_PTM(reg) (t->reg_ctx[id][cnt++] = ptm_readl(t, id, (reg)))
-
-static void ptm_save(struct tracectx *t, int id)
+#define PTM_REG_SAVE_RESTORE_LIST \
+       do { \
+               /* main cfg and control registers */ \
+               SAVE_RESTORE_PTM(TRCPRGCTLR); \
+               SAVE_RESTORE_PTM(TRCPROCSELR); \
+               SAVE_RESTORE_PTM(TRCCONFIGR); \
+               SAVE_RESTORE_PTM(TRCEVENTCTL0R); \
+               SAVE_RESTORE_PTM(TRCEVENTCTL1R); \
+               SAVE_RESTORE_PTM(TRCQCTLR); \
+               SAVE_RESTORE_PTM(TRCTRACEIDR); \
+               SAVE_RESTORE_PTM(TRCSTALLCTLR); \
+               SAVE_RESTORE_PTM(TRCTSCTLR); \
+               SAVE_RESTORE_PTM(TRCSYNCPR); \
+               SAVE_RESTORE_PTM(TRCCCCTLR); \
+               SAVE_RESTORE_PTM(TRCBBCTLR); \
+\
+               /* filtering control registers */ \
+               SAVE_RESTORE_PTM(TRCVICTLR); \
+               SAVE_RESTORE_PTM(TRCVIIECTLR); \
+               SAVE_RESTORE_PTM(TRCVISSCTLR); \
+               SAVE_RESTORE_PTM(TRCVIPCSSCTLR); \
+\
+               /* derived resources registers */ \
+               SAVE_RESTORE_PTM(TRCSEQEVR0); \
+               SAVE_RESTORE_PTM(TRCSEQEVR1); \
+               SAVE_RESTORE_PTM(TRCSEQEVR1); \
+               SAVE_RESTORE_PTM(TRCSEQRSTEVR); \
+               SAVE_RESTORE_PTM(TRCSEQSTR); \
+               SAVE_RESTORE_PTM(TRCCNTRLDVR0); \
+               SAVE_RESTORE_PTM(TRCCNTRLDVR1); \
+               SAVE_RESTORE_PTM(TRCCNTVR0); \
+               SAVE_RESTORE_PTM(TRCCNTVR1); \
+               SAVE_RESTORE_PTM(TRCCNTCTLR0); \
+               SAVE_RESTORE_PTM(TRCCNTCTLR1); \
+               SAVE_RESTORE_PTM(TRCEXTINSELR); \
+\
+               /* resource selection registers */ \
+               SAVE_RESTORE_PTM(TRCRSCTLR2); \
+               SAVE_RESTORE_PTM(TRCRSCTLR3); \
+               SAVE_RESTORE_PTM(TRCRSCTLR4); \
+               SAVE_RESTORE_PTM(TRCRSCTLR5); \
+               SAVE_RESTORE_PTM(TRCRSCTLR6); \
+               SAVE_RESTORE_PTM(TRCRSCTLR7); \
+               SAVE_RESTORE_PTM(TRCRSCTLR8); \
+               SAVE_RESTORE_PTM(TRCRSCTLR9); \
+               SAVE_RESTORE_PTM(TRCRSCTLR10); \
+               SAVE_RESTORE_PTM(TRCRSCTLR11); \
+               SAVE_RESTORE_PTM(TRCRSCTLR12); \
+               SAVE_RESTORE_PTM(TRCRSCTLR13); \
+               SAVE_RESTORE_PTM(TRCRSCTLR14); \
+               SAVE_RESTORE_PTM(TRCRSCTLR15); \
+\
+               /* comparator registers */ \
+               SAVE_RESTORE_PTM(TRCACVR0); \
+               SAVE_RESTORE_PTM(TRCACVR0+4); \
+               SAVE_RESTORE_PTM(TRCACVR1); \
+               SAVE_RESTORE_PTM(TRCACVR1+4); \
+               SAVE_RESTORE_PTM(TRCACVR2); \
+               SAVE_RESTORE_PTM(TRCACVR2+4); \
+               SAVE_RESTORE_PTM(TRCACVR3); \
+               SAVE_RESTORE_PTM(TRCACVR3+4); \
+               SAVE_RESTORE_PTM(TRCACVR4); \
+               SAVE_RESTORE_PTM(TRCACVR4+4); \
+               SAVE_RESTORE_PTM(TRCACVR5); \
+               SAVE_RESTORE_PTM(TRCACVR5+4); \
+               SAVE_RESTORE_PTM(TRCACVR6); \
+               SAVE_RESTORE_PTM(TRCACVR6+4); \
+               SAVE_RESTORE_PTM(TRCACVR7); \
+               SAVE_RESTORE_PTM(TRCACVR7+4); \
+\
+               SAVE_RESTORE_PTM(TRCACATR0); \
+               SAVE_RESTORE_PTM(TRCACATR1); \
+               SAVE_RESTORE_PTM(TRCACATR2); \
+               SAVE_RESTORE_PTM(TRCACATR3); \
+               SAVE_RESTORE_PTM(TRCACATR4); \
+               SAVE_RESTORE_PTM(TRCACATR5); \
+               SAVE_RESTORE_PTM(TRCACATR6); \
+               SAVE_RESTORE_PTM(TRCACATR7); \
+\
+               SAVE_RESTORE_PTM(TRCCIDCVR0); \
+               SAVE_RESTORE_PTM(TRCCIDCCTLR0); \
+               SAVE_RESTORE_PTM(TRCVMIDCVR0); \
+\
+               /* single-shot comparator registers */ \
+               SAVE_RESTORE_PTM(TRCSSCCR0); \
+               SAVE_RESTORE_PTM(TRCSSCSR0); \
+\
+               /* claim tag registers */ \
+               SAVE_RESTORE_PTM(TRCCLAIMCLR); \
+       } while (0);
+
+#define SAVE_RESTORE_PTM(reg) (t->reg_ctx[id][cnt++] = ptm_readl(t, id, (reg)))
+
+static void ptm_save(struct tracectx *t)
 {
        int cnt = 0;
+       int id = raw_smp_processor_id();
 
        dsb(sy);
        isb();
@@ -188,193 +280,22 @@ static void ptm_save(struct tracectx *t, int id)
        ptm_os_lock(t, id);
        ptm_check_trace_stable(t, id, TRACE_STATUS_PMSTABLE);
 
-       /* main cfg and control registers */
-       SAVE_PTM(TRCPRGCTLR);
-       SAVE_PTM(TRCPROCSELR);
-       SAVE_PTM(TRCCONFIGR);
-       SAVE_PTM(TRCEVENTCTL0R);
-       SAVE_PTM(TRCEVENTCTL1R);
-       SAVE_PTM(TRCQCTLR);
-       SAVE_PTM(TRCTRACEIDR);
-       SAVE_PTM(TRCSTALLCTLR);
-       SAVE_PTM(TRCTSCTLR);
-       SAVE_PTM(TRCSYNCPR);
-       SAVE_PTM(TRCCCCTLR);
-       SAVE_PTM(TRCBBCTLR);
-
-       /* filtering control registers */
-       SAVE_PTM(TRCVICTLR);
-       SAVE_PTM(TRCVIIECTLR);
-       SAVE_PTM(TRCVISSCTLR);
-       SAVE_PTM(TRCVIPCSSCTLR);
-
-       /* derived resources registers */
-       SAVE_PTM(TRCSEQEVR0);
-       SAVE_PTM(TRCSEQEVR1);
-       SAVE_PTM(TRCSEQEVR1);
-       SAVE_PTM(TRCSEQRSTEVR);
-       SAVE_PTM(TRCSEQSTR);
-       SAVE_PTM(TRCCNTRLDVR0);
-       SAVE_PTM(TRCCNTRLDVR1);
-       SAVE_PTM(TRCCNTVR0);
-       SAVE_PTM(TRCCNTVR1);
-       SAVE_PTM(TRCCNTCTLR0);
-       SAVE_PTM(TRCCNTCTLR1);
-       SAVE_PTM(TRCEXTINSELR);
-
-       /* resource selection registers */
-       SAVE_PTM(TRCRSCTLR2);
-       SAVE_PTM(TRCRSCTLR3);
-       SAVE_PTM(TRCRSCTLR4);
-       SAVE_PTM(TRCRSCTLR5);
-       SAVE_PTM(TRCRSCTLR6);
-       SAVE_PTM(TRCRSCTLR7);
-       SAVE_PTM(TRCRSCTLR8);
-       SAVE_PTM(TRCRSCTLR9);
-       SAVE_PTM(TRCRSCTLR10);
-       SAVE_PTM(TRCRSCTLR11);
-       SAVE_PTM(TRCRSCTLR12);
-       SAVE_PTM(TRCRSCTLR13);
-       SAVE_PTM(TRCRSCTLR14);
-       SAVE_PTM(TRCRSCTLR15);
-
-       /* comparator registers */
-       SAVE_PTM(TRCACVR0);
-       SAVE_PTM(TRCACVR0+4);
-       SAVE_PTM(TRCACVR1);
-       SAVE_PTM(TRCACVR1+4);
-       SAVE_PTM(TRCACVR2);
-       SAVE_PTM(TRCACVR2+4);
-       SAVE_PTM(TRCACVR3);
-       SAVE_PTM(TRCACVR3+4);
-       SAVE_PTM(TRCACVR4);
-       SAVE_PTM(TRCACVR4+4);
-       SAVE_PTM(TRCACVR5);
-       SAVE_PTM(TRCACVR5+4);
-       SAVE_PTM(TRCACVR6);
-       SAVE_PTM(TRCACVR6+4);
-       SAVE_PTM(TRCACVR7);
-       SAVE_PTM(TRCACVR7+4);
-
-       SAVE_PTM(TRCACATR0);
-       SAVE_PTM(TRCACATR1);
-       SAVE_PTM(TRCACATR2);
-       SAVE_PTM(TRCACATR3);
-       SAVE_PTM(TRCACATR4);
-       SAVE_PTM(TRCACATR5);
-       SAVE_PTM(TRCACATR6);
-       SAVE_PTM(TRCACATR7);
-
-       SAVE_PTM(TRCCIDCVR0);
-       SAVE_PTM(TRCCIDCCTLR0);
-       SAVE_PTM(TRCVMIDCVR0);
-
-       /* single-shot comparator registers */
-       SAVE_PTM(TRCSSCCR0);
-       SAVE_PTM(TRCSSCSR0);
-
-       /* claim tag registers */
-       SAVE_PTM(TRCCLAIMCLR);
+       PTM_REG_SAVE_RESTORE_LIST;
 
        ptm_check_trace_stable(t, id, TRACE_STATUS_IDLE);
 }
 
-#define RESTORE_PTM(reg) ptm_writel(t, id, t->reg_ctx[id][cnt++], reg)
+#undef SAVE_RESTORE_PTM
+#define SAVE_RESTORE_PTM(reg) ptm_writel(t, id, t->reg_ctx[id][cnt++], reg)
 
-static void ptm_restore(struct tracectx *t, int id)
+static void ptm_restore(struct tracectx *t)
 {
        int cnt = 0;
+       int id = raw_smp_processor_id();
        ptm_regs_unlock(t, id);
        ptm_os_lock(t, id);
 
-       /* main cfg and control registers */
-       RESTORE_PTM(TRCPRGCTLR);
-       RESTORE_PTM(TRCPROCSELR);
-       RESTORE_PTM(TRCCONFIGR);
-       RESTORE_PTM(TRCEVENTCTL0R);
-       RESTORE_PTM(TRCEVENTCTL1R);
-       RESTORE_PTM(TRCQCTLR);
-       RESTORE_PTM(TRCTRACEIDR);
-       RESTORE_PTM(TRCSTALLCTLR);
-       RESTORE_PTM(TRCTSCTLR);
-       RESTORE_PTM(TRCSYNCPR);
-       RESTORE_PTM(TRCCCCTLR);
-       RESTORE_PTM(TRCBBCTLR);
-
-       /* filtering control registers */
-       RESTORE_PTM(TRCVICTLR);
-       RESTORE_PTM(TRCVIIECTLR);
-       RESTORE_PTM(TRCVISSCTLR);
-       RESTORE_PTM(TRCVIPCSSCTLR);
-
-       /* derived resources registers */
-       RESTORE_PTM(TRCSEQEVR0);
-       RESTORE_PTM(TRCSEQEVR1);
-       RESTORE_PTM(TRCSEQEVR1);
-       RESTORE_PTM(TRCSEQRSTEVR);
-       RESTORE_PTM(TRCSEQSTR);
-       RESTORE_PTM(TRCCNTRLDVR0);
-       RESTORE_PTM(TRCCNTRLDVR1);
-       RESTORE_PTM(TRCCNTVR0);
-       RESTORE_PTM(TRCCNTVR1);
-       RESTORE_PTM(TRCCNTCTLR0);
-       RESTORE_PTM(TRCCNTCTLR1);
-       RESTORE_PTM(TRCEXTINSELR);
-
-       /* resource selection registers */
-       RESTORE_PTM(TRCRSCTLR2);
-       RESTORE_PTM(TRCRSCTLR3);
-       RESTORE_PTM(TRCRSCTLR4);
-       RESTORE_PTM(TRCRSCTLR5);
-       RESTORE_PTM(TRCRSCTLR6);
-       RESTORE_PTM(TRCRSCTLR7);
-       RESTORE_PTM(TRCRSCTLR8);
-       RESTORE_PTM(TRCRSCTLR9);
-       RESTORE_PTM(TRCRSCTLR10);
-       RESTORE_PTM(TRCRSCTLR11);
-       RESTORE_PTM(TRCRSCTLR12);
-       RESTORE_PTM(TRCRSCTLR13);
-       RESTORE_PTM(TRCRSCTLR14);
-       RESTORE_PTM(TRCRSCTLR15);
-
-       /* address comparator registers */
-       RESTORE_PTM(TRCACVR0);
-       RESTORE_PTM(TRCACVR0+4);
-       RESTORE_PTM(TRCACVR1);
-       RESTORE_PTM(TRCACVR1+4);
-       RESTORE_PTM(TRCACVR2);
-       RESTORE_PTM(TRCACVR2+4);
-       RESTORE_PTM(TRCACVR3);
-       RESTORE_PTM(TRCACVR3+4);
-       RESTORE_PTM(TRCACVR4);
-       RESTORE_PTM(TRCACVR4+4);
-       RESTORE_PTM(TRCACVR5);
-       RESTORE_PTM(TRCACVR5+4);
-       RESTORE_PTM(TRCACVR6);
-       RESTORE_PTM(TRCACVR6+4);
-       RESTORE_PTM(TRCACVR7);
-       RESTORE_PTM(TRCACVR7+4);
-
-       /* address comparator access type registers */
-       RESTORE_PTM(TRCACATR0);
-       RESTORE_PTM(TRCACATR1);
-       RESTORE_PTM(TRCACATR2);
-       RESTORE_PTM(TRCACATR3);
-       RESTORE_PTM(TRCACATR4);
-       RESTORE_PTM(TRCACATR5);
-       RESTORE_PTM(TRCACATR6);
-       RESTORE_PTM(TRCACATR7);
-
-       RESTORE_PTM(TRCCIDCVR0);
-       RESTORE_PTM(TRCCIDCCTLR0);
-       RESTORE_PTM(TRCVMIDCVR0);
-
-       /* single-shot comparator registers */
-       RESTORE_PTM(TRCSSCCR0);
-       RESTORE_PTM(TRCSSCSR0);
-
-       /* claim tag registers */
-       RESTORE_PTM(TRCCLAIMSET);
+       PTM_REG_SAVE_RESTORE_LIST;
 
        ptm_os_unlock(t, id);
 }
@@ -964,18 +885,18 @@ static int trc_release(struct inode *inode, struct file *file)
 
 #ifdef CONFIG_CPU_PM
 static int ptm_cpu_pm_notifier(struct notifier_block *self,
-       unsigned long action, void *hcpu)
+       unsigned long action, void *not_used)
 {
        int ret = NOTIFY_OK;
-       long cpu = (long)hcpu;
 
        switch (action) {
        case CPU_PM_ENTER:
                if (tracer.enable)
-                       ptm_save(&tracer, cpu);
+                       ptm_save(&tracer);
+               break;
        case CPU_PM_EXIT:
                if (tracer.enable)
-                       ptm_restore(&tracer, cpu);
+                       ptm_restore(&tracer);
                break;
        default:
                ret = NOTIFY_DONE;