sound/soc/tegra-alt/tegra210_dmic_alt.h

   1 /*
   2  * tegra210_dmic_alt.h - Definitions for Tegra210 DMIC driver
   3  *
   4  * Copyright (c) 2014-2017 NVIDIA CORPORATION.  All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #ifndef __TEGRA210_DMIC_ALT_H__
  20 #define __TEGRA210_DMIC_ALT_H__
  21
  22 /* Register offsets from DMIC BASE */
  23 #define TEGRA210_DMIC_TX_STATUS                         0x0c
  24 #define TEGRA210_DMIC_TX_INT_STATUS                     0x10
  25 #define TEGRA210_DMIC_TX_INT_MASK                       0x14
  26 #define TEGRA210_DMIC_TX_INT_SET                        0x18
  27 #define TEGRA210_DMIC_TX_INT_CLEAR                      0x1c
  28 #define TEGRA210_DMIC_TX_CIF_CTRL                       0x20
  29
  30 #define TEGRA210_DMIC_ENABLE                            0x40
  31 #define TEGRA210_DMIC_SOFT_RESET                        0x44
  32 #define TEGRA210_DMIC_CG                                0x48
  33 #define TEGRA210_DMIC_STATUS                            0x4c
  34 #define TEGRA210_DMIC_INT_STATUS                        0x50
  35 #define TEGRA210_DMIC_CTRL                              0x64
  36
  37 #define TEGRA210_DMIC_DBG_CTRL                          0x70
  38 #define TEGRA210_DMIC_DCR_FILTER_GAIN                   0x74
  39 #define TEGRA210_DMIC_DCR_BIQUAD_0_COEF_0               0x78
  40 #define TEGRA210_DMIC_DCR_BIQUAD_0_COEF_1               0x7c
  41 #define TEGRA210_DMIC_DCR_BIQUAD_0_COEF_2               0x80
  42 #define TEGRA210_DMIC_DCR_BIQUAD_0_COEF_3               0x84
  43 #define TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4               0x88
  44 #define TEGRA210_DMIC_LP_FILTER_GAIN                    0x8c
  45 #define TEGRA210_DMIC_LP_BIQUAD_0_COEF_0                0x90
  46 #define TEGRA210_DMIC_LP_BIQUAD_0_COEF_1                0x94
  47 #define TEGRA210_DMIC_LP_BIQUAD_0_COEF_2                0x98
  48 #define TEGRA210_DMIC_LP_BIQUAD_0_COEF_3                0x9c
  49 #define TEGRA210_DMIC_LP_BIQUAD_0_COEF_4                0xa0
  50 #define TEGRA210_DMIC_LP_BIQUAD_1_COEF_0                0xa4
  51 #define TEGRA210_DMIC_LP_BIQUAD_1_COEF_1                0xa8
  52 #define TEGRA210_DMIC_LP_BIQUAD_1_COEF_2                0xac
  53 #define TEGRA210_DMIC_LP_BIQUAD_1_COEF_3                0xb0
  54 #define TEGRA210_DMIC_LP_BIQUAD_1_COEF_4                0xb4
  55 #define TEGRA210_DMIC_CORRECTION_FILTER_GAIN            0xb8
  56 #define TEGRA210_DMIC_CORRECTION_BIQUAD_0_COEF_0        0xbc
  57 #define TEGRA210_DMIC_CORRECTION_BIQUAD_0_COEF_1        0xc0
  58 #define TEGRA210_DMIC_CORRECTION_BIQUAD_0_COEF_2        0xc4
  59 #define TEGRA210_DMIC_CORRECTION_BIQUAD_0_COEF_3        0xc8
  60 #define TEGRA210_DMIC_CORRECTION_BIQUAD_0_COEF_4        0xcc
  61 #define TEGRA210_DMIC_CORRECTION_BIQUAD_1_COEF_0        0xd0
  62 #define TEGRA210_DMIC_CORRECTION_BIQUAD_1_COEF_1        0xd4
  63 #define TEGRA210_DMIC_CORRECTION_BIQUAD_1_COEF_2        0xd8
  64 #define TEGRA210_DMIC_CORRECTION_BIQUAD_1_COEF_3        0xdc
  65 #define TEGRA210_DMIC_CORRECTION_BIQUAD_1_COEF_4        0xe0
  66
  67 /* Constants for DMIC */
  68 #define TEGRA210_DMIC_OSR_64                            0
  69 #define TEGRA210_DMIC_OSR_128                           1
  70 #define TEGRA210_DMIC_OSR_256                           2
  71
  72 /* Fields in TEGRA210_DMIC_ENABLE */
  73 #define TEGRA210_DMIC_ENABLE_EN_SHIFT                   0
  74 #define TEGRA210_DMIC_ENABLE_EN                         BIT(0)
  75
  76 /* Fields in TEGRA210_DMIC_SOFT_RESET */
  77 #define TEGRA210_DMIC_SOFT_RESET_EN                     BIT(0)
  78
  79 /* Fields in TEGRA210_DMIC_CG */
  80 #define TEGRA210_DMIC_CG_SLCG_EN                        BIT(0)
  81
  82 /* Fields in TEGRA210_DMIC_STATUS */
  83 #define TEGRA210_DMIC_STATUS_CONFIG_ERROR_SHIFT         31
  84 #define TEGRA210_DMIC_STATUS_CONFIG_ERROR_MASK          (0x1 << TEGRA210_DMIC_STATUS_CONFIG_ERROR_SHIFT)
  85
  86 #define TEGRA210_DMIC_STATUS_SLCG_CLKEN_SHIFT           8
  87 #define TEGRA210_DMIC_STATUS_SLCG_CLKEN_MASK            (0x1 << TEGRA210_DMIC_STATUS_SLCG_CLKEN_SHIFT)
  88
  89 #define TEGRA210_DMIC_STATUS_ENABLE_STATUS_SHIFT        0
  90 #define TEGRA210_DMIC_STATUS_ENABLE_STATUS_MASK         (0x1 << TEGRA210_DMIC_STATUS_ENABLE_STATUS_SHIFT)
  91
  92 /* Fields in TEGRA210_DMIC_CTRL */
  93 #define TEGRA210_DMIC_CTRL_TRIMMER_SEL_SHIFT            12
  94 #define TEGRA210_DMIC_CTRL_TRIMMER_SEL_MASK             (0x1f << TEGRA210_DMIC_CTRL_TRIMMER_SEL_SHIFT)
  95
  96 #define TEGRA210_DMIC_CTRL_CHANNEL_SELECT_SHIFT         8
  97 #define TEGRA210_DMIC_CTRL_CHANNEL_SELECT_MASK          (0x3 << TEGRA210_DMIC_CTRL_CHANNEL_SELECT_SHIFT)
  98
  99 #define TEGRA210_DMIC_CTRL_LRSEL_POLARITY_SHIFT         4
 100 #define TEGRA210_DMIC_CTRL_LRSEL_POLARITY_MASK          (0x1 << TEGRA210_DMIC_CTRL_LRSEL_POLARITY_SHIFT)
 101
 102 #define TEGRA210_DMIC_CTRL_OSR_SHIFT                    0
 103 #define TEGRA210_DMIC_CTRL_OSR_MASK                     (0x3 << TEGRA210_DMIC_CTRL_OSR_SHIFT)
 104
 105 /* Fields in TEGRA210_DMIC_DBG_CTRL */
 106 #define TEGRA210_DMIC_DBG_CTRL_DCR_ENABLE               BIT(3)
 107 #define TEGRA210_DMIC_DBG_CTRL_LP_ENABLE                BIT(2)
 108 #define TEGRA210_DMIC_DBG_CTRL_SC_ENABLE                BIT(1)
 109 #define TEGRA210_DMIC_DBG_CTRL_BYPASS                   BIT(0)
 110
 111 enum tegra_dmic_ch_select {
 112         DMIC_CH_SELECT_NONE,
 113         DMIC_CH_SELECT_LEFT,
 114         DMIC_CH_SELECT_RIGHT,
 115         DMIC_CH_SELECT_STEREO,
 116 };
 117 struct tegra210_dmic_soc_data {
 118         void (*set_audio_cif)(struct regmap *map,
 119                         unsigned int reg,
 120                         struct tegra210_xbar_cif_conf *conf);
 121 };
 122
 123 struct tegra210_dmic {
 124         struct clk *clk_dmic;
 125         struct clk *clk_pll_a_out0;
 126         struct regmap *regmap;
 127         const struct tegra210_dmic_soc_data *soc_data;
 128         int is_pinctrl;
 129         struct pinctrl *pinctrl;
 130         struct pinctrl_state *pin_active_state;
 131         struct pinctrl_state *pin_idle_state;
 132         int boost_gain; /* with 100x factor */
 133         int ch_select;
 134         int tx_mono_to_stereo;
 135         bool is_shutdown;
 136         int format_out;
 137 };
 138
 139 #endif