]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/commit
dcsimpledrv: implemented PWM generator to drive motor into both directions.
authorPavel Pisa <pisa@cmp.felk.cvut.cz>
Wed, 26 Jul 2017 18:12:38 +0000 (20:12 +0200)
committerPavel Pisa <pisa@cmp.felk.cvut.cz>
Wed, 26 Jul 2017 18:12:38 +0000 (20:12 +0200)
commit90850e69f4dc01cf6488f6344cfa3e461f5e6d5e
treec8e2edb68237d63c8be7a0d23a74c73729d33df1
parentf6f78117aac0aabca9d95915036df0d0098e7e8f
dcsimpledrv: implemented PWM generator to drive motor into both directions.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
system/ip/dcsimpledrv_1.0/component.xml
system/ip/dcsimpledrv_1.0/hdl/bidir_pwm.vhdl [new file with mode: 0644]
system/ip/dcsimpledrv_1.0/hdl/dcsimpledrv_v1_0.vhd