AXI PWM Coprocessor: minor correction and formatting.

[fpga/zynq/canbench-sw.git] / system / ip / axi_pwm_coprocessor_1.0 / hdl / axi_pwm_coprocessor_v1_0_M00_AXI.vhd

diff --git a/system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_M00_AXI.vhd b/system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_M00_AXI.vhd
index 5e2136934cdffd546ecc07e7e752e85b29a50df0..c038f89d3e89c1fbb1bd7c90902fa2b3bb60cdd5 100644 (file)
--- a/system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_M00_AXI.vhd
+++ b/system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_M00_AXI.vhd
@@ -212,7 +212,7 @@ begin
        M_AXI_AWADDR    <= pwm_wr_addr;
        --AXI 4 write data
        M_AXI_WDATA     <= pwm_wr1 when (pwm_state_inpr = "01")
-                 else pwm_wr2 when (pwm_state_inpr = "01")
+                 else pwm_wr2 when (pwm_state_inpr = "10")
                  else pwm_wr0;
 
        M_AXI_AWPROT    <= "000";
@@ -245,7 +245,7 @@ begin
                INIT_AXI_TXN <= '0';
              else
                INIT_AXI_TXN <= '1';
-               pwm_state_inpr <= pwm_state_inpr;
+               pwm_state_inpr <= pwm_state_i;
              end if;
            end if;
          end if;