1 --Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
2 ----------------------------------------------------------------------------------
3 --Tool Version: Vivado v.2015.4 (lin64) Build 1412921 Wed Nov 18 09:44:32 MST 2015
4 --Date : Thu Mar 24 18:53:38 2016
5 --Host : majernb running 64-bit Gentoo Base System release 2.2
6 --Command : generate_target top.bd
8 --Purpose : IP block netlist
9 ----------------------------------------------------------------------------------
11 use IEEE.STD_LOGIC_1164.ALL;
13 use UNISIM.VCOMPONENTS.ALL;
14 entity s00_couplers_imp_12VJW4O is
16 M_ACLK : in STD_LOGIC;
17 M_ARESETN : in STD_LOGIC_VECTOR ( 0 to 0 );
18 M_AXI_araddr : out STD_LOGIC;
19 M_AXI_arburst : out STD_LOGIC;
20 M_AXI_arcache : out STD_LOGIC;
21 M_AXI_arid : out STD_LOGIC;
22 M_AXI_arlen : out STD_LOGIC;
23 M_AXI_arlock : out STD_LOGIC;
24 M_AXI_arprot : out STD_LOGIC;
25 M_AXI_arqos : out STD_LOGIC;
26 M_AXI_arready : in STD_LOGIC;
27 M_AXI_arsize : out STD_LOGIC;
28 M_AXI_arvalid : out STD_LOGIC;
29 M_AXI_awaddr : out STD_LOGIC;
30 M_AXI_awburst : out STD_LOGIC;
31 M_AXI_awcache : out STD_LOGIC;
32 M_AXI_awid : out STD_LOGIC;
33 M_AXI_awlen : out STD_LOGIC;
34 M_AXI_awlock : out STD_LOGIC;
35 M_AXI_awprot : out STD_LOGIC;
36 M_AXI_awqos : out STD_LOGIC;
37 M_AXI_awready : in STD_LOGIC;
38 M_AXI_awsize : out STD_LOGIC;
39 M_AXI_awvalid : out STD_LOGIC;
40 M_AXI_bid : in STD_LOGIC;
41 M_AXI_bready : out STD_LOGIC;
42 M_AXI_bresp : in STD_LOGIC;
43 M_AXI_bvalid : in STD_LOGIC;
44 M_AXI_rdata : in STD_LOGIC;
45 M_AXI_rid : in STD_LOGIC;
46 M_AXI_rlast : in STD_LOGIC;
47 M_AXI_rready : out STD_LOGIC;
48 M_AXI_rresp : in STD_LOGIC;
49 M_AXI_rvalid : in STD_LOGIC;
50 M_AXI_wdata : out STD_LOGIC;
51 M_AXI_wid : out STD_LOGIC;
52 M_AXI_wlast : out STD_LOGIC;
53 M_AXI_wready : in STD_LOGIC;
54 M_AXI_wstrb : out STD_LOGIC;
55 M_AXI_wvalid : out STD_LOGIC;
56 S_ACLK : in STD_LOGIC;
57 S_ARESETN : in STD_LOGIC_VECTOR ( 0 to 0 );
58 S_AXI_araddr : in STD_LOGIC;
59 S_AXI_arburst : in STD_LOGIC;
60 S_AXI_arcache : in STD_LOGIC;
61 S_AXI_arid : in STD_LOGIC;
62 S_AXI_arlen : in STD_LOGIC;
63 S_AXI_arlock : in STD_LOGIC;
64 S_AXI_arprot : in STD_LOGIC;
65 S_AXI_arqos : in STD_LOGIC;
66 S_AXI_arready : out STD_LOGIC;
67 S_AXI_arsize : in STD_LOGIC;
68 S_AXI_arvalid : in STD_LOGIC;
69 S_AXI_awaddr : in STD_LOGIC;
70 S_AXI_awburst : in STD_LOGIC;
71 S_AXI_awcache : in STD_LOGIC;
72 S_AXI_awid : in STD_LOGIC;
73 S_AXI_awlen : in STD_LOGIC;
74 S_AXI_awlock : in STD_LOGIC;
75 S_AXI_awprot : in STD_LOGIC;
76 S_AXI_awqos : in STD_LOGIC;
77 S_AXI_awready : out STD_LOGIC;
78 S_AXI_awsize : in STD_LOGIC;
79 S_AXI_awvalid : in STD_LOGIC;
80 S_AXI_bid : out STD_LOGIC;
81 S_AXI_bready : in STD_LOGIC;
82 S_AXI_bresp : out STD_LOGIC;
83 S_AXI_bvalid : out STD_LOGIC;
84 S_AXI_rdata : out STD_LOGIC;
85 S_AXI_rid : out STD_LOGIC;
86 S_AXI_rlast : out STD_LOGIC;
87 S_AXI_rready : in STD_LOGIC;
88 S_AXI_rresp : out STD_LOGIC;
89 S_AXI_rvalid : out STD_LOGIC;
90 S_AXI_wdata : in STD_LOGIC;
91 S_AXI_wid : in STD_LOGIC;
92 S_AXI_wlast : in STD_LOGIC;
93 S_AXI_wready : out STD_LOGIC;
94 S_AXI_wstrb : in STD_LOGIC;
95 S_AXI_wvalid : in STD_LOGIC
97 end s00_couplers_imp_12VJW4O;
99 architecture STRUCTURE of s00_couplers_imp_12VJW4O is
100 signal s00_couplers_to_s00_couplers_ARADDR : STD_LOGIC;
101 signal s00_couplers_to_s00_couplers_ARBURST : STD_LOGIC;
102 signal s00_couplers_to_s00_couplers_ARCACHE : STD_LOGIC;
103 signal s00_couplers_to_s00_couplers_ARID : STD_LOGIC;
104 signal s00_couplers_to_s00_couplers_ARLEN : STD_LOGIC;
105 signal s00_couplers_to_s00_couplers_ARLOCK : STD_LOGIC;
106 signal s00_couplers_to_s00_couplers_ARPROT : STD_LOGIC;
107 signal s00_couplers_to_s00_couplers_ARQOS : STD_LOGIC;
108 signal s00_couplers_to_s00_couplers_ARREADY : STD_LOGIC;
109 signal s00_couplers_to_s00_couplers_ARSIZE : STD_LOGIC;
110 signal s00_couplers_to_s00_couplers_ARVALID : STD_LOGIC;
111 signal s00_couplers_to_s00_couplers_AWADDR : STD_LOGIC;
112 signal s00_couplers_to_s00_couplers_AWBURST : STD_LOGIC;
113 signal s00_couplers_to_s00_couplers_AWCACHE : STD_LOGIC;
114 signal s00_couplers_to_s00_couplers_AWID : STD_LOGIC;
115 signal s00_couplers_to_s00_couplers_AWLEN : STD_LOGIC;
116 signal s00_couplers_to_s00_couplers_AWLOCK : STD_LOGIC;
117 signal s00_couplers_to_s00_couplers_AWPROT : STD_LOGIC;
118 signal s00_couplers_to_s00_couplers_AWQOS : STD_LOGIC;
119 signal s00_couplers_to_s00_couplers_AWREADY : STD_LOGIC;
120 signal s00_couplers_to_s00_couplers_AWSIZE : STD_LOGIC;
121 signal s00_couplers_to_s00_couplers_AWVALID : STD_LOGIC;
122 signal s00_couplers_to_s00_couplers_BID : STD_LOGIC;
123 signal s00_couplers_to_s00_couplers_BREADY : STD_LOGIC;
124 signal s00_couplers_to_s00_couplers_BRESP : STD_LOGIC;
125 signal s00_couplers_to_s00_couplers_BVALID : STD_LOGIC;
126 signal s00_couplers_to_s00_couplers_RDATA : STD_LOGIC;
127 signal s00_couplers_to_s00_couplers_RID : STD_LOGIC;
128 signal s00_couplers_to_s00_couplers_RLAST : STD_LOGIC;
129 signal s00_couplers_to_s00_couplers_RREADY : STD_LOGIC;
130 signal s00_couplers_to_s00_couplers_RRESP : STD_LOGIC;
131 signal s00_couplers_to_s00_couplers_RVALID : STD_LOGIC;
132 signal s00_couplers_to_s00_couplers_WDATA : STD_LOGIC;
133 signal s00_couplers_to_s00_couplers_WID : STD_LOGIC;
134 signal s00_couplers_to_s00_couplers_WLAST : STD_LOGIC;
135 signal s00_couplers_to_s00_couplers_WREADY : STD_LOGIC;
136 signal s00_couplers_to_s00_couplers_WSTRB : STD_LOGIC;
137 signal s00_couplers_to_s00_couplers_WVALID : STD_LOGIC;
139 M_AXI_araddr <= s00_couplers_to_s00_couplers_ARADDR;
140 M_AXI_arburst <= s00_couplers_to_s00_couplers_ARBURST;
141 M_AXI_arcache <= s00_couplers_to_s00_couplers_ARCACHE;
142 M_AXI_arid <= s00_couplers_to_s00_couplers_ARID;
143 M_AXI_arlen <= s00_couplers_to_s00_couplers_ARLEN;
144 M_AXI_arlock <= s00_couplers_to_s00_couplers_ARLOCK;
145 M_AXI_arprot <= s00_couplers_to_s00_couplers_ARPROT;
146 M_AXI_arqos <= s00_couplers_to_s00_couplers_ARQOS;
147 M_AXI_arsize <= s00_couplers_to_s00_couplers_ARSIZE;
148 M_AXI_arvalid <= s00_couplers_to_s00_couplers_ARVALID;
149 M_AXI_awaddr <= s00_couplers_to_s00_couplers_AWADDR;
150 M_AXI_awburst <= s00_couplers_to_s00_couplers_AWBURST;
151 M_AXI_awcache <= s00_couplers_to_s00_couplers_AWCACHE;
152 M_AXI_awid <= s00_couplers_to_s00_couplers_AWID;
153 M_AXI_awlen <= s00_couplers_to_s00_couplers_AWLEN;
154 M_AXI_awlock <= s00_couplers_to_s00_couplers_AWLOCK;
155 M_AXI_awprot <= s00_couplers_to_s00_couplers_AWPROT;
156 M_AXI_awqos <= s00_couplers_to_s00_couplers_AWQOS;
157 M_AXI_awsize <= s00_couplers_to_s00_couplers_AWSIZE;
158 M_AXI_awvalid <= s00_couplers_to_s00_couplers_AWVALID;
159 M_AXI_bready <= s00_couplers_to_s00_couplers_BREADY;
160 M_AXI_rready <= s00_couplers_to_s00_couplers_RREADY;
161 M_AXI_wdata <= s00_couplers_to_s00_couplers_WDATA;
162 M_AXI_wid <= s00_couplers_to_s00_couplers_WID;
163 M_AXI_wlast <= s00_couplers_to_s00_couplers_WLAST;
164 M_AXI_wstrb <= s00_couplers_to_s00_couplers_WSTRB;
165 M_AXI_wvalid <= s00_couplers_to_s00_couplers_WVALID;
166 S_AXI_arready <= s00_couplers_to_s00_couplers_ARREADY;
167 S_AXI_awready <= s00_couplers_to_s00_couplers_AWREADY;
168 S_AXI_bid <= s00_couplers_to_s00_couplers_BID;
169 S_AXI_bresp <= s00_couplers_to_s00_couplers_BRESP;
170 S_AXI_bvalid <= s00_couplers_to_s00_couplers_BVALID;
171 S_AXI_rdata <= s00_couplers_to_s00_couplers_RDATA;
172 S_AXI_rid <= s00_couplers_to_s00_couplers_RID;
173 S_AXI_rlast <= s00_couplers_to_s00_couplers_RLAST;
174 S_AXI_rresp <= s00_couplers_to_s00_couplers_RRESP;
175 S_AXI_rvalid <= s00_couplers_to_s00_couplers_RVALID;
176 S_AXI_wready <= s00_couplers_to_s00_couplers_WREADY;
177 s00_couplers_to_s00_couplers_ARADDR <= S_AXI_araddr;
178 s00_couplers_to_s00_couplers_ARBURST <= S_AXI_arburst;
179 s00_couplers_to_s00_couplers_ARCACHE <= S_AXI_arcache;
180 s00_couplers_to_s00_couplers_ARID <= S_AXI_arid;
181 s00_couplers_to_s00_couplers_ARLEN <= S_AXI_arlen;
182 s00_couplers_to_s00_couplers_ARLOCK <= S_AXI_arlock;
183 s00_couplers_to_s00_couplers_ARPROT <= S_AXI_arprot;
184 s00_couplers_to_s00_couplers_ARQOS <= S_AXI_arqos;
185 s00_couplers_to_s00_couplers_ARREADY <= M_AXI_arready;
186 s00_couplers_to_s00_couplers_ARSIZE <= S_AXI_arsize;
187 s00_couplers_to_s00_couplers_ARVALID <= S_AXI_arvalid;
188 s00_couplers_to_s00_couplers_AWADDR <= S_AXI_awaddr;
189 s00_couplers_to_s00_couplers_AWBURST <= S_AXI_awburst;
190 s00_couplers_to_s00_couplers_AWCACHE <= S_AXI_awcache;
191 s00_couplers_to_s00_couplers_AWID <= S_AXI_awid;
192 s00_couplers_to_s00_couplers_AWLEN <= S_AXI_awlen;
193 s00_couplers_to_s00_couplers_AWLOCK <= S_AXI_awlock;
194 s00_couplers_to_s00_couplers_AWPROT <= S_AXI_awprot;
195 s00_couplers_to_s00_couplers_AWQOS <= S_AXI_awqos;
196 s00_couplers_to_s00_couplers_AWREADY <= M_AXI_awready;
197 s00_couplers_to_s00_couplers_AWSIZE <= S_AXI_awsize;
198 s00_couplers_to_s00_couplers_AWVALID <= S_AXI_awvalid;
199 s00_couplers_to_s00_couplers_BID <= M_AXI_bid;
200 s00_couplers_to_s00_couplers_BREADY <= S_AXI_bready;
201 s00_couplers_to_s00_couplers_BRESP <= M_AXI_bresp;
202 s00_couplers_to_s00_couplers_BVALID <= M_AXI_bvalid;
203 s00_couplers_to_s00_couplers_RDATA <= M_AXI_rdata;
204 s00_couplers_to_s00_couplers_RID <= M_AXI_rid;
205 s00_couplers_to_s00_couplers_RLAST <= M_AXI_rlast;
206 s00_couplers_to_s00_couplers_RREADY <= S_AXI_rready;
207 s00_couplers_to_s00_couplers_RRESP <= M_AXI_rresp;
208 s00_couplers_to_s00_couplers_RVALID <= M_AXI_rvalid;
209 s00_couplers_to_s00_couplers_WDATA <= S_AXI_wdata;
210 s00_couplers_to_s00_couplers_WID <= S_AXI_wid;
211 s00_couplers_to_s00_couplers_WLAST <= S_AXI_wlast;
212 s00_couplers_to_s00_couplers_WREADY <= M_AXI_wready;
213 s00_couplers_to_s00_couplers_WSTRB <= S_AXI_wstrb;
214 s00_couplers_to_s00_couplers_WVALID <= S_AXI_wvalid;
217 use IEEE.STD_LOGIC_1164.ALL;
219 use UNISIM.VCOMPONENTS.ALL;
220 entity top_processing_system7_0_axi_periph_0 is
223 ARESETN : in STD_LOGIC_VECTOR ( 0 to 0 );
224 M00_ACLK : in STD_LOGIC;
225 M00_ARESETN : in STD_LOGIC_VECTOR ( 0 to 0 );
226 M00_AXI_araddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
227 M00_AXI_arready : in STD_LOGIC;
228 M00_AXI_arvalid : out STD_LOGIC;
229 M00_AXI_awaddr : out STD_LOGIC_VECTOR ( 31 downto 0 );
230 M00_AXI_awready : in STD_LOGIC;
231 M00_AXI_awvalid : out STD_LOGIC;
232 M00_AXI_bready : out STD_LOGIC;
233 M00_AXI_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
234 M00_AXI_bvalid : in STD_LOGIC;
235 M00_AXI_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
236 M00_AXI_rready : out STD_LOGIC;
237 M00_AXI_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
238 M00_AXI_rvalid : in STD_LOGIC;
239 M00_AXI_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
240 M00_AXI_wready : in STD_LOGIC;
241 M00_AXI_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
242 M00_AXI_wvalid : out STD_LOGIC;
243 S00_ACLK : in STD_LOGIC;
244 S00_ARESETN : in STD_LOGIC_VECTOR ( 0 to 0 );
245 S00_AXI_araddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
246 S00_AXI_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
247 S00_AXI_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
248 S00_AXI_arid : in STD_LOGIC_VECTOR ( 11 downto 0 );
249 S00_AXI_arlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
250 S00_AXI_arlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
251 S00_AXI_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
252 S00_AXI_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
253 S00_AXI_arready : out STD_LOGIC;
254 S00_AXI_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
255 S00_AXI_arvalid : in STD_LOGIC;
256 S00_AXI_awaddr : in STD_LOGIC_VECTOR ( 31 downto 0 );
257 S00_AXI_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
258 S00_AXI_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
259 S00_AXI_awid : in STD_LOGIC_VECTOR ( 11 downto 0 );
260 S00_AXI_awlen : in STD_LOGIC_VECTOR ( 3 downto 0 );
261 S00_AXI_awlock : in STD_LOGIC_VECTOR ( 1 downto 0 );
262 S00_AXI_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
263 S00_AXI_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
264 S00_AXI_awready : out STD_LOGIC;
265 S00_AXI_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
266 S00_AXI_awvalid : in STD_LOGIC;
267 S00_AXI_bid : out STD_LOGIC_VECTOR ( 11 downto 0 );
268 S00_AXI_bready : in STD_LOGIC;
269 S00_AXI_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
270 S00_AXI_bvalid : out STD_LOGIC;
271 S00_AXI_rdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
272 S00_AXI_rid : out STD_LOGIC_VECTOR ( 11 downto 0 );
273 S00_AXI_rlast : out STD_LOGIC;
274 S00_AXI_rready : in STD_LOGIC;
275 S00_AXI_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
276 S00_AXI_rvalid : out STD_LOGIC;
277 S00_AXI_wdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
278 S00_AXI_wid : in STD_LOGIC_VECTOR ( 11 downto 0 );
279 S00_AXI_wlast : in STD_LOGIC;
280 S00_AXI_wready : out STD_LOGIC;
281 S00_AXI_wstrb : in STD_LOGIC_VECTOR ( 3 downto 0 );
282 S00_AXI_wvalid : in STD_LOGIC
284 end top_processing_system7_0_axi_periph_0;
286 architecture STRUCTURE of top_processing_system7_0_axi_periph_0 is
287 signal S00_ACLK_1 : STD_LOGIC;
288 signal S00_ARESETN_1 : STD_LOGIC_VECTOR ( 0 to 0 );
289 signal processing_system7_0_axi_periph_ACLK_net : STD_LOGIC;
290 signal processing_system7_0_axi_periph_ARESETN_net : STD_LOGIC_VECTOR ( 0 to 0 );
291 signal processing_system7_0_axi_periph_to_s00_couplers_ARADDR : STD_LOGIC_VECTOR ( 31 downto 0 );
292 signal processing_system7_0_axi_periph_to_s00_couplers_ARBURST : STD_LOGIC_VECTOR ( 1 downto 0 );
293 signal processing_system7_0_axi_periph_to_s00_couplers_ARCACHE : STD_LOGIC_VECTOR ( 3 downto 0 );
294 signal processing_system7_0_axi_periph_to_s00_couplers_ARID : STD_LOGIC_VECTOR ( 11 downto 0 );
295 signal processing_system7_0_axi_periph_to_s00_couplers_ARLEN : STD_LOGIC_VECTOR ( 3 downto 0 );
296 signal processing_system7_0_axi_periph_to_s00_couplers_ARLOCK : STD_LOGIC_VECTOR ( 1 downto 0 );
297 signal processing_system7_0_axi_periph_to_s00_couplers_ARPROT : STD_LOGIC_VECTOR ( 2 downto 0 );
298 signal processing_system7_0_axi_periph_to_s00_couplers_ARQOS : STD_LOGIC_VECTOR ( 3 downto 0 );
299 signal processing_system7_0_axi_periph_to_s00_couplers_ARREADY : STD_LOGIC;
300 signal processing_system7_0_axi_periph_to_s00_couplers_ARSIZE : STD_LOGIC_VECTOR ( 2 downto 0 );
301 signal processing_system7_0_axi_periph_to_s00_couplers_ARVALID : STD_LOGIC;
302 signal processing_system7_0_axi_periph_to_s00_couplers_AWADDR : STD_LOGIC_VECTOR ( 31 downto 0 );
303 signal processing_system7_0_axi_periph_to_s00_couplers_AWBURST : STD_LOGIC_VECTOR ( 1 downto 0 );
304 signal processing_system7_0_axi_periph_to_s00_couplers_AWCACHE : STD_LOGIC_VECTOR ( 3 downto 0 );
305 signal processing_system7_0_axi_periph_to_s00_couplers_AWID : STD_LOGIC_VECTOR ( 11 downto 0 );
306 signal processing_system7_0_axi_periph_to_s00_couplers_AWLEN : STD_LOGIC_VECTOR ( 3 downto 0 );
307 signal processing_system7_0_axi_periph_to_s00_couplers_AWLOCK : STD_LOGIC_VECTOR ( 1 downto 0 );
308 signal processing_system7_0_axi_periph_to_s00_couplers_AWPROT : STD_LOGIC_VECTOR ( 2 downto 0 );
309 signal processing_system7_0_axi_periph_to_s00_couplers_AWQOS : STD_LOGIC_VECTOR ( 3 downto 0 );
310 signal processing_system7_0_axi_periph_to_s00_couplers_AWREADY : STD_LOGIC;
311 signal processing_system7_0_axi_periph_to_s00_couplers_AWSIZE : STD_LOGIC_VECTOR ( 2 downto 0 );
312 signal processing_system7_0_axi_periph_to_s00_couplers_AWVALID : STD_LOGIC;
313 signal processing_system7_0_axi_periph_to_s00_couplers_BID : STD_LOGIC;
314 signal processing_system7_0_axi_periph_to_s00_couplers_BREADY : STD_LOGIC;
315 signal processing_system7_0_axi_periph_to_s00_couplers_BRESP : STD_LOGIC;
316 signal processing_system7_0_axi_periph_to_s00_couplers_BVALID : STD_LOGIC;
317 signal processing_system7_0_axi_periph_to_s00_couplers_RDATA : STD_LOGIC;
318 signal processing_system7_0_axi_periph_to_s00_couplers_RID : STD_LOGIC;
319 signal processing_system7_0_axi_periph_to_s00_couplers_RLAST : STD_LOGIC;
320 signal processing_system7_0_axi_periph_to_s00_couplers_RREADY : STD_LOGIC;
321 signal processing_system7_0_axi_periph_to_s00_couplers_RRESP : STD_LOGIC;
322 signal processing_system7_0_axi_periph_to_s00_couplers_RVALID : STD_LOGIC;
323 signal processing_system7_0_axi_periph_to_s00_couplers_WDATA : STD_LOGIC_VECTOR ( 31 downto 0 );
324 signal processing_system7_0_axi_periph_to_s00_couplers_WID : STD_LOGIC_VECTOR ( 11 downto 0 );
325 signal processing_system7_0_axi_periph_to_s00_couplers_WLAST : STD_LOGIC;
326 signal processing_system7_0_axi_periph_to_s00_couplers_WREADY : STD_LOGIC;
327 signal processing_system7_0_axi_periph_to_s00_couplers_WSTRB : STD_LOGIC_VECTOR ( 3 downto 0 );
328 signal processing_system7_0_axi_periph_to_s00_couplers_WVALID : STD_LOGIC;
329 signal s00_couplers_to_processing_system7_0_axi_periph_ARADDR : STD_LOGIC;
330 signal s00_couplers_to_processing_system7_0_axi_periph_ARREADY : STD_LOGIC;
331 signal s00_couplers_to_processing_system7_0_axi_periph_ARVALID : STD_LOGIC;
332 signal s00_couplers_to_processing_system7_0_axi_periph_AWADDR : STD_LOGIC;
333 signal s00_couplers_to_processing_system7_0_axi_periph_AWREADY : STD_LOGIC;
334 signal s00_couplers_to_processing_system7_0_axi_periph_AWVALID : STD_LOGIC;
335 signal s00_couplers_to_processing_system7_0_axi_periph_BREADY : STD_LOGIC;
336 signal s00_couplers_to_processing_system7_0_axi_periph_BRESP : STD_LOGIC_VECTOR ( 1 downto 0 );
337 signal s00_couplers_to_processing_system7_0_axi_periph_BVALID : STD_LOGIC;
338 signal s00_couplers_to_processing_system7_0_axi_periph_RDATA : STD_LOGIC_VECTOR ( 31 downto 0 );
339 signal s00_couplers_to_processing_system7_0_axi_periph_RREADY : STD_LOGIC;
340 signal s00_couplers_to_processing_system7_0_axi_periph_RRESP : STD_LOGIC_VECTOR ( 1 downto 0 );
341 signal s00_couplers_to_processing_system7_0_axi_periph_RVALID : STD_LOGIC;
342 signal s00_couplers_to_processing_system7_0_axi_periph_WDATA : STD_LOGIC;
343 signal s00_couplers_to_processing_system7_0_axi_periph_WREADY : STD_LOGIC;
344 signal s00_couplers_to_processing_system7_0_axi_periph_WSTRB : STD_LOGIC;
345 signal s00_couplers_to_processing_system7_0_axi_periph_WVALID : STD_LOGIC;
346 signal NLW_s00_couplers_M_AXI_arburst_UNCONNECTED : STD_LOGIC;
347 signal NLW_s00_couplers_M_AXI_arcache_UNCONNECTED : STD_LOGIC;
348 signal NLW_s00_couplers_M_AXI_arid_UNCONNECTED : STD_LOGIC;
349 signal NLW_s00_couplers_M_AXI_arlen_UNCONNECTED : STD_LOGIC;
350 signal NLW_s00_couplers_M_AXI_arlock_UNCONNECTED : STD_LOGIC;
351 signal NLW_s00_couplers_M_AXI_arprot_UNCONNECTED : STD_LOGIC;
352 signal NLW_s00_couplers_M_AXI_arqos_UNCONNECTED : STD_LOGIC;
353 signal NLW_s00_couplers_M_AXI_arsize_UNCONNECTED : STD_LOGIC;
354 signal NLW_s00_couplers_M_AXI_awburst_UNCONNECTED : STD_LOGIC;
355 signal NLW_s00_couplers_M_AXI_awcache_UNCONNECTED : STD_LOGIC;
356 signal NLW_s00_couplers_M_AXI_awid_UNCONNECTED : STD_LOGIC;
357 signal NLW_s00_couplers_M_AXI_awlen_UNCONNECTED : STD_LOGIC;
358 signal NLW_s00_couplers_M_AXI_awlock_UNCONNECTED : STD_LOGIC;
359 signal NLW_s00_couplers_M_AXI_awprot_UNCONNECTED : STD_LOGIC;
360 signal NLW_s00_couplers_M_AXI_awqos_UNCONNECTED : STD_LOGIC;
361 signal NLW_s00_couplers_M_AXI_awsize_UNCONNECTED : STD_LOGIC;
362 signal NLW_s00_couplers_M_AXI_wid_UNCONNECTED : STD_LOGIC;
363 signal NLW_s00_couplers_M_AXI_wlast_UNCONNECTED : STD_LOGIC;
365 M00_AXI_araddr(31) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
366 M00_AXI_araddr(30) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
367 M00_AXI_araddr(29) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
368 M00_AXI_araddr(28) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
369 M00_AXI_araddr(27) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
370 M00_AXI_araddr(26) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
371 M00_AXI_araddr(25) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
372 M00_AXI_araddr(24) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
373 M00_AXI_araddr(23) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
374 M00_AXI_araddr(22) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
375 M00_AXI_araddr(21) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
376 M00_AXI_araddr(20) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
377 M00_AXI_araddr(19) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
378 M00_AXI_araddr(18) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
379 M00_AXI_araddr(17) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
380 M00_AXI_araddr(16) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
381 M00_AXI_araddr(15) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
382 M00_AXI_araddr(14) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
383 M00_AXI_araddr(13) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
384 M00_AXI_araddr(12) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
385 M00_AXI_araddr(11) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
386 M00_AXI_araddr(10) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
387 M00_AXI_araddr(9) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
388 M00_AXI_araddr(8) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
389 M00_AXI_araddr(7) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
390 M00_AXI_araddr(6) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
391 M00_AXI_araddr(5) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
392 M00_AXI_araddr(4) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
393 M00_AXI_araddr(3) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
394 M00_AXI_araddr(2) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
395 M00_AXI_araddr(1) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
396 M00_AXI_araddr(0) <= s00_couplers_to_processing_system7_0_axi_periph_ARADDR;
397 M00_AXI_arvalid <= s00_couplers_to_processing_system7_0_axi_periph_ARVALID;
398 M00_AXI_awaddr(31) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
399 M00_AXI_awaddr(30) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
400 M00_AXI_awaddr(29) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
401 M00_AXI_awaddr(28) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
402 M00_AXI_awaddr(27) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
403 M00_AXI_awaddr(26) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
404 M00_AXI_awaddr(25) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
405 M00_AXI_awaddr(24) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
406 M00_AXI_awaddr(23) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
407 M00_AXI_awaddr(22) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
408 M00_AXI_awaddr(21) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
409 M00_AXI_awaddr(20) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
410 M00_AXI_awaddr(19) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
411 M00_AXI_awaddr(18) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
412 M00_AXI_awaddr(17) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
413 M00_AXI_awaddr(16) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
414 M00_AXI_awaddr(15) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
415 M00_AXI_awaddr(14) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
416 M00_AXI_awaddr(13) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
417 M00_AXI_awaddr(12) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
418 M00_AXI_awaddr(11) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
419 M00_AXI_awaddr(10) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
420 M00_AXI_awaddr(9) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
421 M00_AXI_awaddr(8) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
422 M00_AXI_awaddr(7) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
423 M00_AXI_awaddr(6) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
424 M00_AXI_awaddr(5) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
425 M00_AXI_awaddr(4) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
426 M00_AXI_awaddr(3) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
427 M00_AXI_awaddr(2) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
428 M00_AXI_awaddr(1) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
429 M00_AXI_awaddr(0) <= s00_couplers_to_processing_system7_0_axi_periph_AWADDR;
430 M00_AXI_awvalid <= s00_couplers_to_processing_system7_0_axi_periph_AWVALID;
431 M00_AXI_bready <= s00_couplers_to_processing_system7_0_axi_periph_BREADY;
432 M00_AXI_rready <= s00_couplers_to_processing_system7_0_axi_periph_RREADY;
433 M00_AXI_wdata(31) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
434 M00_AXI_wdata(30) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
435 M00_AXI_wdata(29) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
436 M00_AXI_wdata(28) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
437 M00_AXI_wdata(27) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
438 M00_AXI_wdata(26) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
439 M00_AXI_wdata(25) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
440 M00_AXI_wdata(24) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
441 M00_AXI_wdata(23) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
442 M00_AXI_wdata(22) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
443 M00_AXI_wdata(21) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
444 M00_AXI_wdata(20) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
445 M00_AXI_wdata(19) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
446 M00_AXI_wdata(18) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
447 M00_AXI_wdata(17) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
448 M00_AXI_wdata(16) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
449 M00_AXI_wdata(15) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
450 M00_AXI_wdata(14) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
451 M00_AXI_wdata(13) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
452 M00_AXI_wdata(12) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
453 M00_AXI_wdata(11) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
454 M00_AXI_wdata(10) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
455 M00_AXI_wdata(9) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
456 M00_AXI_wdata(8) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
457 M00_AXI_wdata(7) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
458 M00_AXI_wdata(6) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
459 M00_AXI_wdata(5) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
460 M00_AXI_wdata(4) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
461 M00_AXI_wdata(3) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
462 M00_AXI_wdata(2) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
463 M00_AXI_wdata(1) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
464 M00_AXI_wdata(0) <= s00_couplers_to_processing_system7_0_axi_periph_WDATA;
465 M00_AXI_wstrb(3) <= s00_couplers_to_processing_system7_0_axi_periph_WSTRB;
466 M00_AXI_wstrb(2) <= s00_couplers_to_processing_system7_0_axi_periph_WSTRB;
467 M00_AXI_wstrb(1) <= s00_couplers_to_processing_system7_0_axi_periph_WSTRB;
468 M00_AXI_wstrb(0) <= s00_couplers_to_processing_system7_0_axi_periph_WSTRB;
469 M00_AXI_wvalid <= s00_couplers_to_processing_system7_0_axi_periph_WVALID;
470 S00_ACLK_1 <= S00_ACLK;
471 S00_ARESETN_1(0) <= S00_ARESETN(0);
472 S00_AXI_arready <= processing_system7_0_axi_periph_to_s00_couplers_ARREADY;
473 S00_AXI_awready <= processing_system7_0_axi_periph_to_s00_couplers_AWREADY;
474 S00_AXI_bid(11) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
475 S00_AXI_bid(10) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
476 S00_AXI_bid(9) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
477 S00_AXI_bid(8) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
478 S00_AXI_bid(7) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
479 S00_AXI_bid(6) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
480 S00_AXI_bid(5) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
481 S00_AXI_bid(4) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
482 S00_AXI_bid(3) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
483 S00_AXI_bid(2) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
484 S00_AXI_bid(1) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
485 S00_AXI_bid(0) <= processing_system7_0_axi_periph_to_s00_couplers_BID;
486 S00_AXI_bresp(1) <= processing_system7_0_axi_periph_to_s00_couplers_BRESP;
487 S00_AXI_bresp(0) <= processing_system7_0_axi_periph_to_s00_couplers_BRESP;
488 S00_AXI_bvalid <= processing_system7_0_axi_periph_to_s00_couplers_BVALID;
489 S00_AXI_rdata(31) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
490 S00_AXI_rdata(30) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
491 S00_AXI_rdata(29) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
492 S00_AXI_rdata(28) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
493 S00_AXI_rdata(27) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
494 S00_AXI_rdata(26) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
495 S00_AXI_rdata(25) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
496 S00_AXI_rdata(24) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
497 S00_AXI_rdata(23) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
498 S00_AXI_rdata(22) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
499 S00_AXI_rdata(21) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
500 S00_AXI_rdata(20) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
501 S00_AXI_rdata(19) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
502 S00_AXI_rdata(18) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
503 S00_AXI_rdata(17) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
504 S00_AXI_rdata(16) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
505 S00_AXI_rdata(15) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
506 S00_AXI_rdata(14) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
507 S00_AXI_rdata(13) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
508 S00_AXI_rdata(12) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
509 S00_AXI_rdata(11) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
510 S00_AXI_rdata(10) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
511 S00_AXI_rdata(9) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
512 S00_AXI_rdata(8) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
513 S00_AXI_rdata(7) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
514 S00_AXI_rdata(6) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
515 S00_AXI_rdata(5) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
516 S00_AXI_rdata(4) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
517 S00_AXI_rdata(3) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
518 S00_AXI_rdata(2) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
519 S00_AXI_rdata(1) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
520 S00_AXI_rdata(0) <= processing_system7_0_axi_periph_to_s00_couplers_RDATA;
521 S00_AXI_rid(11) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
522 S00_AXI_rid(10) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
523 S00_AXI_rid(9) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
524 S00_AXI_rid(8) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
525 S00_AXI_rid(7) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
526 S00_AXI_rid(6) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
527 S00_AXI_rid(5) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
528 S00_AXI_rid(4) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
529 S00_AXI_rid(3) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
530 S00_AXI_rid(2) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
531 S00_AXI_rid(1) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
532 S00_AXI_rid(0) <= processing_system7_0_axi_periph_to_s00_couplers_RID;
533 S00_AXI_rlast <= processing_system7_0_axi_periph_to_s00_couplers_RLAST;
534 S00_AXI_rresp(1) <= processing_system7_0_axi_periph_to_s00_couplers_RRESP;
535 S00_AXI_rresp(0) <= processing_system7_0_axi_periph_to_s00_couplers_RRESP;
536 S00_AXI_rvalid <= processing_system7_0_axi_periph_to_s00_couplers_RVALID;
537 S00_AXI_wready <= processing_system7_0_axi_periph_to_s00_couplers_WREADY;
538 processing_system7_0_axi_periph_ACLK_net <= M00_ACLK;
539 processing_system7_0_axi_periph_ARESETN_net(0) <= M00_ARESETN(0);
540 processing_system7_0_axi_periph_to_s00_couplers_ARADDR(31 downto 0) <= S00_AXI_araddr(31 downto 0);
541 processing_system7_0_axi_periph_to_s00_couplers_ARBURST(1 downto 0) <= S00_AXI_arburst(1 downto 0);
542 processing_system7_0_axi_periph_to_s00_couplers_ARCACHE(3 downto 0) <= S00_AXI_arcache(3 downto 0);
543 processing_system7_0_axi_periph_to_s00_couplers_ARID(11 downto 0) <= S00_AXI_arid(11 downto 0);
544 processing_system7_0_axi_periph_to_s00_couplers_ARLEN(3 downto 0) <= S00_AXI_arlen(3 downto 0);
545 processing_system7_0_axi_periph_to_s00_couplers_ARLOCK(1 downto 0) <= S00_AXI_arlock(1 downto 0);
546 processing_system7_0_axi_periph_to_s00_couplers_ARPROT(2 downto 0) <= S00_AXI_arprot(2 downto 0);
547 processing_system7_0_axi_periph_to_s00_couplers_ARQOS(3 downto 0) <= S00_AXI_arqos(3 downto 0);
548 processing_system7_0_axi_periph_to_s00_couplers_ARSIZE(2 downto 0) <= S00_AXI_arsize(2 downto 0);
549 processing_system7_0_axi_periph_to_s00_couplers_ARVALID <= S00_AXI_arvalid;
550 processing_system7_0_axi_periph_to_s00_couplers_AWADDR(31 downto 0) <= S00_AXI_awaddr(31 downto 0);
551 processing_system7_0_axi_periph_to_s00_couplers_AWBURST(1 downto 0) <= S00_AXI_awburst(1 downto 0);
552 processing_system7_0_axi_periph_to_s00_couplers_AWCACHE(3 downto 0) <= S00_AXI_awcache(3 downto 0);
553 processing_system7_0_axi_periph_to_s00_couplers_AWID(11 downto 0) <= S00_AXI_awid(11 downto 0);
554 processing_system7_0_axi_periph_to_s00_couplers_AWLEN(3 downto 0) <= S00_AXI_awlen(3 downto 0);
555 processing_system7_0_axi_periph_to_s00_couplers_AWLOCK(1 downto 0) <= S00_AXI_awlock(1 downto 0);
556 processing_system7_0_axi_periph_to_s00_couplers_AWPROT(2 downto 0) <= S00_AXI_awprot(2 downto 0);
557 processing_system7_0_axi_periph_to_s00_couplers_AWQOS(3 downto 0) <= S00_AXI_awqos(3 downto 0);
558 processing_system7_0_axi_periph_to_s00_couplers_AWSIZE(2 downto 0) <= S00_AXI_awsize(2 downto 0);
559 processing_system7_0_axi_periph_to_s00_couplers_AWVALID <= S00_AXI_awvalid;
560 processing_system7_0_axi_periph_to_s00_couplers_BREADY <= S00_AXI_bready;
561 processing_system7_0_axi_periph_to_s00_couplers_RREADY <= S00_AXI_rready;
562 processing_system7_0_axi_periph_to_s00_couplers_WDATA(31 downto 0) <= S00_AXI_wdata(31 downto 0);
563 processing_system7_0_axi_periph_to_s00_couplers_WID(11 downto 0) <= S00_AXI_wid(11 downto 0);
564 processing_system7_0_axi_periph_to_s00_couplers_WLAST <= S00_AXI_wlast;
565 processing_system7_0_axi_periph_to_s00_couplers_WSTRB(3 downto 0) <= S00_AXI_wstrb(3 downto 0);
566 processing_system7_0_axi_periph_to_s00_couplers_WVALID <= S00_AXI_wvalid;
567 s00_couplers_to_processing_system7_0_axi_periph_ARREADY <= M00_AXI_arready;
568 s00_couplers_to_processing_system7_0_axi_periph_AWREADY <= M00_AXI_awready;
569 s00_couplers_to_processing_system7_0_axi_periph_BRESP(1 downto 0) <= M00_AXI_bresp(1 downto 0);
570 s00_couplers_to_processing_system7_0_axi_periph_BVALID <= M00_AXI_bvalid;
571 s00_couplers_to_processing_system7_0_axi_periph_RDATA(31 downto 0) <= M00_AXI_rdata(31 downto 0);
572 s00_couplers_to_processing_system7_0_axi_periph_RRESP(1 downto 0) <= M00_AXI_rresp(1 downto 0);
573 s00_couplers_to_processing_system7_0_axi_periph_RVALID <= M00_AXI_rvalid;
574 s00_couplers_to_processing_system7_0_axi_periph_WREADY <= M00_AXI_wready;
575 s00_couplers: entity work.s00_couplers_imp_12VJW4O
577 M_ACLK => processing_system7_0_axi_periph_ACLK_net,
578 M_ARESETN(0) => processing_system7_0_axi_periph_ARESETN_net(0),
579 M_AXI_araddr => s00_couplers_to_processing_system7_0_axi_periph_ARADDR,
580 M_AXI_arburst => NLW_s00_couplers_M_AXI_arburst_UNCONNECTED,
581 M_AXI_arcache => NLW_s00_couplers_M_AXI_arcache_UNCONNECTED,
582 M_AXI_arid => NLW_s00_couplers_M_AXI_arid_UNCONNECTED,
583 M_AXI_arlen => NLW_s00_couplers_M_AXI_arlen_UNCONNECTED,
584 M_AXI_arlock => NLW_s00_couplers_M_AXI_arlock_UNCONNECTED,
585 M_AXI_arprot => NLW_s00_couplers_M_AXI_arprot_UNCONNECTED,
586 M_AXI_arqos => NLW_s00_couplers_M_AXI_arqos_UNCONNECTED,
587 M_AXI_arready => s00_couplers_to_processing_system7_0_axi_periph_ARREADY,
588 M_AXI_arsize => NLW_s00_couplers_M_AXI_arsize_UNCONNECTED,
589 M_AXI_arvalid => s00_couplers_to_processing_system7_0_axi_periph_ARVALID,
590 M_AXI_awaddr => s00_couplers_to_processing_system7_0_axi_periph_AWADDR,
591 M_AXI_awburst => NLW_s00_couplers_M_AXI_awburst_UNCONNECTED,
592 M_AXI_awcache => NLW_s00_couplers_M_AXI_awcache_UNCONNECTED,
593 M_AXI_awid => NLW_s00_couplers_M_AXI_awid_UNCONNECTED,
594 M_AXI_awlen => NLW_s00_couplers_M_AXI_awlen_UNCONNECTED,
595 M_AXI_awlock => NLW_s00_couplers_M_AXI_awlock_UNCONNECTED,
596 M_AXI_awprot => NLW_s00_couplers_M_AXI_awprot_UNCONNECTED,
597 M_AXI_awqos => NLW_s00_couplers_M_AXI_awqos_UNCONNECTED,
598 M_AXI_awready => s00_couplers_to_processing_system7_0_axi_periph_AWREADY,
599 M_AXI_awsize => NLW_s00_couplers_M_AXI_awsize_UNCONNECTED,
600 M_AXI_awvalid => s00_couplers_to_processing_system7_0_axi_periph_AWVALID,
602 M_AXI_bready => s00_couplers_to_processing_system7_0_axi_periph_BREADY,
603 M_AXI_bresp => s00_couplers_to_processing_system7_0_axi_periph_BRESP(0),
604 M_AXI_bvalid => s00_couplers_to_processing_system7_0_axi_periph_BVALID,
605 M_AXI_rdata => s00_couplers_to_processing_system7_0_axi_periph_RDATA(0),
608 M_AXI_rready => s00_couplers_to_processing_system7_0_axi_periph_RREADY,
609 M_AXI_rresp => s00_couplers_to_processing_system7_0_axi_periph_RRESP(0),
610 M_AXI_rvalid => s00_couplers_to_processing_system7_0_axi_periph_RVALID,
611 M_AXI_wdata => s00_couplers_to_processing_system7_0_axi_periph_WDATA,
612 M_AXI_wid => NLW_s00_couplers_M_AXI_wid_UNCONNECTED,
613 M_AXI_wlast => NLW_s00_couplers_M_AXI_wlast_UNCONNECTED,
614 M_AXI_wready => s00_couplers_to_processing_system7_0_axi_periph_WREADY,
615 M_AXI_wstrb => s00_couplers_to_processing_system7_0_axi_periph_WSTRB,
616 M_AXI_wvalid => s00_couplers_to_processing_system7_0_axi_periph_WVALID,
617 S_ACLK => S00_ACLK_1,
618 S_ARESETN(0) => S00_ARESETN_1(0),
619 S_AXI_araddr => processing_system7_0_axi_periph_to_s00_couplers_ARADDR(0),
620 S_AXI_arburst => processing_system7_0_axi_periph_to_s00_couplers_ARBURST(0),
621 S_AXI_arcache => processing_system7_0_axi_periph_to_s00_couplers_ARCACHE(0),
622 S_AXI_arid => processing_system7_0_axi_periph_to_s00_couplers_ARID(0),
623 S_AXI_arlen => processing_system7_0_axi_periph_to_s00_couplers_ARLEN(0),
624 S_AXI_arlock => processing_system7_0_axi_periph_to_s00_couplers_ARLOCK(0),
625 S_AXI_arprot => processing_system7_0_axi_periph_to_s00_couplers_ARPROT(0),
626 S_AXI_arqos => processing_system7_0_axi_periph_to_s00_couplers_ARQOS(0),
627 S_AXI_arready => processing_system7_0_axi_periph_to_s00_couplers_ARREADY,
628 S_AXI_arsize => processing_system7_0_axi_periph_to_s00_couplers_ARSIZE(0),
629 S_AXI_arvalid => processing_system7_0_axi_periph_to_s00_couplers_ARVALID,
630 S_AXI_awaddr => processing_system7_0_axi_periph_to_s00_couplers_AWADDR(0),
631 S_AXI_awburst => processing_system7_0_axi_periph_to_s00_couplers_AWBURST(0),
632 S_AXI_awcache => processing_system7_0_axi_periph_to_s00_couplers_AWCACHE(0),
633 S_AXI_awid => processing_system7_0_axi_periph_to_s00_couplers_AWID(0),
634 S_AXI_awlen => processing_system7_0_axi_periph_to_s00_couplers_AWLEN(0),
635 S_AXI_awlock => processing_system7_0_axi_periph_to_s00_couplers_AWLOCK(0),
636 S_AXI_awprot => processing_system7_0_axi_periph_to_s00_couplers_AWPROT(0),
637 S_AXI_awqos => processing_system7_0_axi_periph_to_s00_couplers_AWQOS(0),
638 S_AXI_awready => processing_system7_0_axi_periph_to_s00_couplers_AWREADY,
639 S_AXI_awsize => processing_system7_0_axi_periph_to_s00_couplers_AWSIZE(0),
640 S_AXI_awvalid => processing_system7_0_axi_periph_to_s00_couplers_AWVALID,
641 S_AXI_bid => processing_system7_0_axi_periph_to_s00_couplers_BID,
642 S_AXI_bready => processing_system7_0_axi_periph_to_s00_couplers_BREADY,
643 S_AXI_bresp => processing_system7_0_axi_periph_to_s00_couplers_BRESP,
644 S_AXI_bvalid => processing_system7_0_axi_periph_to_s00_couplers_BVALID,
645 S_AXI_rdata => processing_system7_0_axi_periph_to_s00_couplers_RDATA,
646 S_AXI_rid => processing_system7_0_axi_periph_to_s00_couplers_RID,
647 S_AXI_rlast => processing_system7_0_axi_periph_to_s00_couplers_RLAST,
648 S_AXI_rready => processing_system7_0_axi_periph_to_s00_couplers_RREADY,
649 S_AXI_rresp => processing_system7_0_axi_periph_to_s00_couplers_RRESP,
650 S_AXI_rvalid => processing_system7_0_axi_periph_to_s00_couplers_RVALID,
651 S_AXI_wdata => processing_system7_0_axi_periph_to_s00_couplers_WDATA(0),
652 S_AXI_wid => processing_system7_0_axi_periph_to_s00_couplers_WID(0),
653 S_AXI_wlast => processing_system7_0_axi_periph_to_s00_couplers_WLAST,
654 S_AXI_wready => processing_system7_0_axi_periph_to_s00_couplers_WREADY,
655 S_AXI_wstrb => processing_system7_0_axi_periph_to_s00_couplers_WSTRB(0),
656 S_AXI_wvalid => processing_system7_0_axi_periph_to_s00_couplers_WVALID
660 use IEEE.STD_LOGIC_1164.ALL;
662 use UNISIM.VCOMPONENTS.ALL;
665 DDR_addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
666 DDR_ba : inout STD_LOGIC_VECTOR ( 2 downto 0 );
667 DDR_cas_n : inout STD_LOGIC;
668 DDR_ck_n : inout STD_LOGIC;
669 DDR_ck_p : inout STD_LOGIC;
670 DDR_cke : inout STD_LOGIC;
671 DDR_cs_n : inout STD_LOGIC;
672 DDR_dm : inout STD_LOGIC_VECTOR ( 3 downto 0 );
673 DDR_dq : inout STD_LOGIC_VECTOR ( 31 downto 0 );
674 DDR_dqs_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
675 DDR_dqs_p : inout STD_LOGIC_VECTOR ( 3 downto 0 );
676 DDR_odt : inout STD_LOGIC;
677 DDR_ras_n : inout STD_LOGIC;
678 DDR_reset_n : inout STD_LOGIC;
679 DDR_we_n : inout STD_LOGIC;
680 FIXED_IO_ddr_vrn : inout STD_LOGIC;
681 FIXED_IO_ddr_vrp : inout STD_LOGIC;
682 FIXED_IO_mio : inout STD_LOGIC_VECTOR ( 53 downto 0 );
683 FIXED_IO_ps_clk : inout STD_LOGIC;
684 FIXED_IO_ps_porb : inout STD_LOGIC;
685 FIXED_IO_ps_srstb : inout STD_LOGIC
687 attribute CORE_GENERATION_INFO : string;
688 attribute CORE_GENERATION_INFO of top : entity is "top,IP_Integrator,{x_ipVendor=xilinx.com,x_ipLibrary=BlockDiagram,x_ipName=top,x_ipVersion=1.00.a,x_ipLanguage=VHDL,numBlks=5,numReposBlks=3,numNonXlnxBlks=1,numHierBlks=2,maxHierDepth=0,da_axi4_cnt=1,da_ps7_cnt=2,synth_mode=Global}";
689 attribute HW_HANDOFF : string;
690 attribute HW_HANDOFF of top : entity is "top.hwdef";
693 architecture STRUCTURE of top is
694 component top_processing_system7_0_1 is
696 CAN0_PHY_TX : out STD_LOGIC;
697 CAN0_PHY_RX : in STD_LOGIC;
698 CAN1_PHY_TX : out STD_LOGIC;
699 CAN1_PHY_RX : in STD_LOGIC;
700 TTC0_WAVE0_OUT : out STD_LOGIC;
701 TTC0_WAVE1_OUT : out STD_LOGIC;
702 TTC0_WAVE2_OUT : out STD_LOGIC;
703 USB0_PORT_INDCTL : out STD_LOGIC_VECTOR ( 1 downto 0 );
704 USB0_VBUS_PWRSELECT : out STD_LOGIC;
705 USB0_VBUS_PWRFAULT : in STD_LOGIC;
706 M_AXI_GP0_ARVALID : out STD_LOGIC;
707 M_AXI_GP0_AWVALID : out STD_LOGIC;
708 M_AXI_GP0_BREADY : out STD_LOGIC;
709 M_AXI_GP0_RREADY : out STD_LOGIC;
710 M_AXI_GP0_WLAST : out STD_LOGIC;
711 M_AXI_GP0_WVALID : out STD_LOGIC;
712 M_AXI_GP0_ARID : out STD_LOGIC_VECTOR ( 11 downto 0 );
713 M_AXI_GP0_AWID : out STD_LOGIC_VECTOR ( 11 downto 0 );
714 M_AXI_GP0_WID : out STD_LOGIC_VECTOR ( 11 downto 0 );
715 M_AXI_GP0_ARBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
716 M_AXI_GP0_ARLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
717 M_AXI_GP0_ARSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
718 M_AXI_GP0_AWBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
719 M_AXI_GP0_AWLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
720 M_AXI_GP0_AWSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
721 M_AXI_GP0_ARPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
722 M_AXI_GP0_AWPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
723 M_AXI_GP0_ARADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
724 M_AXI_GP0_AWADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
725 M_AXI_GP0_WDATA : out STD_LOGIC_VECTOR ( 31 downto 0 );
726 M_AXI_GP0_ARCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
727 M_AXI_GP0_ARLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
728 M_AXI_GP0_ARQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
729 M_AXI_GP0_AWCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
730 M_AXI_GP0_AWLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
731 M_AXI_GP0_AWQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
732 M_AXI_GP0_WSTRB : out STD_LOGIC_VECTOR ( 3 downto 0 );
733 M_AXI_GP0_ACLK : in STD_LOGIC;
734 M_AXI_GP0_ARREADY : in STD_LOGIC;
735 M_AXI_GP0_AWREADY : in STD_LOGIC;
736 M_AXI_GP0_BVALID : in STD_LOGIC;
737 M_AXI_GP0_RLAST : in STD_LOGIC;
738 M_AXI_GP0_RVALID : in STD_LOGIC;
739 M_AXI_GP0_WREADY : in STD_LOGIC;
740 M_AXI_GP0_BID : in STD_LOGIC_VECTOR ( 11 downto 0 );
741 M_AXI_GP0_RID : in STD_LOGIC_VECTOR ( 11 downto 0 );
742 M_AXI_GP0_BRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
743 M_AXI_GP0_RRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
744 M_AXI_GP0_RDATA : in STD_LOGIC_VECTOR ( 31 downto 0 );
745 FCLK_CLK0 : out STD_LOGIC;
746 FCLK_RESET0_N : out STD_LOGIC;
747 MIO : inout STD_LOGIC_VECTOR ( 53 downto 0 );
748 DDR_CAS_n : inout STD_LOGIC;
749 DDR_CKE : inout STD_LOGIC;
750 DDR_Clk_n : inout STD_LOGIC;
751 DDR_Clk : inout STD_LOGIC;
752 DDR_CS_n : inout STD_LOGIC;
753 DDR_DRSTB : inout STD_LOGIC;
754 DDR_ODT : inout STD_LOGIC;
755 DDR_RAS_n : inout STD_LOGIC;
756 DDR_WEB : inout STD_LOGIC;
757 DDR_BankAddr : inout STD_LOGIC_VECTOR ( 2 downto 0 );
758 DDR_Addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
759 DDR_VRN : inout STD_LOGIC;
760 DDR_VRP : inout STD_LOGIC;
761 DDR_DM : inout STD_LOGIC_VECTOR ( 3 downto 0 );
762 DDR_DQ : inout STD_LOGIC_VECTOR ( 31 downto 0 );
763 DDR_DQS_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
764 DDR_DQS : inout STD_LOGIC_VECTOR ( 3 downto 0 );
765 PS_SRSTB : inout STD_LOGIC;
766 PS_CLK : inout STD_LOGIC;
767 PS_PORB : inout STD_LOGIC
769 end component top_processing_system7_0_1;
770 component top_rst_processing_system7_0_100M_0 is
772 slowest_sync_clk : in STD_LOGIC;
773 ext_reset_in : in STD_LOGIC;
774 aux_reset_in : in STD_LOGIC;
775 mb_debug_sys_rst : in STD_LOGIC;
776 dcm_locked : in STD_LOGIC;
777 mb_reset : out STD_LOGIC;
778 bus_struct_reset : out STD_LOGIC_VECTOR ( 0 to 0 );
779 peripheral_reset : out STD_LOGIC_VECTOR ( 0 to 0 );
780 interconnect_aresetn : out STD_LOGIC_VECTOR ( 0 to 0 );
781 peripheral_aresetn : out STD_LOGIC_VECTOR ( 0 to 0 )
783 end component top_rst_processing_system7_0_100M_0;
784 component top_can_merge_0_1 is
786 can_rx : out STD_LOGIC;
787 can_tx1 : in STD_LOGIC;
788 can_tx2 : in STD_LOGIC;
789 can_tx3 : in STD_LOGIC
791 end component top_can_merge_0_1;
792 signal can_merge_0_can_rx : STD_LOGIC;
793 signal processing_system7_0_CAN0_PHY_TX : STD_LOGIC;
794 signal processing_system7_0_CAN1_PHY_TX : STD_LOGIC;
795 signal processing_system7_0_DDR_ADDR : STD_LOGIC_VECTOR ( 14 downto 0 );
796 signal processing_system7_0_DDR_BA : STD_LOGIC_VECTOR ( 2 downto 0 );
797 signal processing_system7_0_DDR_CAS_N : STD_LOGIC;
798 signal processing_system7_0_DDR_CKE : STD_LOGIC;
799 signal processing_system7_0_DDR_CK_N : STD_LOGIC;
800 signal processing_system7_0_DDR_CK_P : STD_LOGIC;
801 signal processing_system7_0_DDR_CS_N : STD_LOGIC;
802 signal processing_system7_0_DDR_DM : STD_LOGIC_VECTOR ( 3 downto 0 );
803 signal processing_system7_0_DDR_DQ : STD_LOGIC_VECTOR ( 31 downto 0 );
804 signal processing_system7_0_DDR_DQS_N : STD_LOGIC_VECTOR ( 3 downto 0 );
805 signal processing_system7_0_DDR_DQS_P : STD_LOGIC_VECTOR ( 3 downto 0 );
806 signal processing_system7_0_DDR_ODT : STD_LOGIC;
807 signal processing_system7_0_DDR_RAS_N : STD_LOGIC;
808 signal processing_system7_0_DDR_RESET_N : STD_LOGIC;
809 signal processing_system7_0_DDR_WE_N : STD_LOGIC;
810 signal processing_system7_0_FCLK_CLK0 : STD_LOGIC;
811 signal processing_system7_0_FCLK_RESET0_N : STD_LOGIC;
812 signal processing_system7_0_FIXED_IO_DDR_VRN : STD_LOGIC;
813 signal processing_system7_0_FIXED_IO_DDR_VRP : STD_LOGIC;
814 signal processing_system7_0_FIXED_IO_MIO : STD_LOGIC_VECTOR ( 53 downto 0 );
815 signal processing_system7_0_FIXED_IO_PS_CLK : STD_LOGIC;
816 signal processing_system7_0_FIXED_IO_PS_PORB : STD_LOGIC;
817 signal processing_system7_0_FIXED_IO_PS_SRSTB : STD_LOGIC;
818 signal processing_system7_0_M_AXI_GP0_ARADDR : STD_LOGIC_VECTOR ( 31 downto 0 );
819 signal processing_system7_0_M_AXI_GP0_ARBURST : STD_LOGIC_VECTOR ( 1 downto 0 );
820 signal processing_system7_0_M_AXI_GP0_ARCACHE : STD_LOGIC_VECTOR ( 3 downto 0 );
821 signal processing_system7_0_M_AXI_GP0_ARID : STD_LOGIC_VECTOR ( 11 downto 0 );
822 signal processing_system7_0_M_AXI_GP0_ARLEN : STD_LOGIC_VECTOR ( 3 downto 0 );
823 signal processing_system7_0_M_AXI_GP0_ARLOCK : STD_LOGIC_VECTOR ( 1 downto 0 );
824 signal processing_system7_0_M_AXI_GP0_ARPROT : STD_LOGIC_VECTOR ( 2 downto 0 );
825 signal processing_system7_0_M_AXI_GP0_ARQOS : STD_LOGIC_VECTOR ( 3 downto 0 );
826 signal processing_system7_0_M_AXI_GP0_ARREADY : STD_LOGIC;
827 signal processing_system7_0_M_AXI_GP0_ARSIZE : STD_LOGIC_VECTOR ( 2 downto 0 );
828 signal processing_system7_0_M_AXI_GP0_ARVALID : STD_LOGIC;
829 signal processing_system7_0_M_AXI_GP0_AWADDR : STD_LOGIC_VECTOR ( 31 downto 0 );
830 signal processing_system7_0_M_AXI_GP0_AWBURST : STD_LOGIC_VECTOR ( 1 downto 0 );
831 signal processing_system7_0_M_AXI_GP0_AWCACHE : STD_LOGIC_VECTOR ( 3 downto 0 );
832 signal processing_system7_0_M_AXI_GP0_AWID : STD_LOGIC_VECTOR ( 11 downto 0 );
833 signal processing_system7_0_M_AXI_GP0_AWLEN : STD_LOGIC_VECTOR ( 3 downto 0 );
834 signal processing_system7_0_M_AXI_GP0_AWLOCK : STD_LOGIC_VECTOR ( 1 downto 0 );
835 signal processing_system7_0_M_AXI_GP0_AWPROT : STD_LOGIC_VECTOR ( 2 downto 0 );
836 signal processing_system7_0_M_AXI_GP0_AWQOS : STD_LOGIC_VECTOR ( 3 downto 0 );
837 signal processing_system7_0_M_AXI_GP0_AWREADY : STD_LOGIC;
838 signal processing_system7_0_M_AXI_GP0_AWSIZE : STD_LOGIC_VECTOR ( 2 downto 0 );
839 signal processing_system7_0_M_AXI_GP0_AWVALID : STD_LOGIC;
840 signal processing_system7_0_M_AXI_GP0_BID : STD_LOGIC_VECTOR ( 11 downto 0 );
841 signal processing_system7_0_M_AXI_GP0_BREADY : STD_LOGIC;
842 signal processing_system7_0_M_AXI_GP0_BRESP : STD_LOGIC_VECTOR ( 1 downto 0 );
843 signal processing_system7_0_M_AXI_GP0_BVALID : STD_LOGIC;
844 signal processing_system7_0_M_AXI_GP0_RDATA : STD_LOGIC_VECTOR ( 31 downto 0 );
845 signal processing_system7_0_M_AXI_GP0_RID : STD_LOGIC_VECTOR ( 11 downto 0 );
846 signal processing_system7_0_M_AXI_GP0_RLAST : STD_LOGIC;
847 signal processing_system7_0_M_AXI_GP0_RREADY : STD_LOGIC;
848 signal processing_system7_0_M_AXI_GP0_RRESP : STD_LOGIC_VECTOR ( 1 downto 0 );
849 signal processing_system7_0_M_AXI_GP0_RVALID : STD_LOGIC;
850 signal processing_system7_0_M_AXI_GP0_WDATA : STD_LOGIC_VECTOR ( 31 downto 0 );
851 signal processing_system7_0_M_AXI_GP0_WID : STD_LOGIC_VECTOR ( 11 downto 0 );
852 signal processing_system7_0_M_AXI_GP0_WLAST : STD_LOGIC;
853 signal processing_system7_0_M_AXI_GP0_WREADY : STD_LOGIC;
854 signal processing_system7_0_M_AXI_GP0_WSTRB : STD_LOGIC_VECTOR ( 3 downto 0 );
855 signal processing_system7_0_M_AXI_GP0_WVALID : STD_LOGIC;
856 signal rst_processing_system7_0_100M_interconnect_aresetn : STD_LOGIC_VECTOR ( 0 to 0 );
857 signal rst_processing_system7_0_100M_peripheral_aresetn : STD_LOGIC_VECTOR ( 0 to 0 );
858 signal NLW_processing_system7_0_TTC0_WAVE0_OUT_UNCONNECTED : STD_LOGIC;
859 signal NLW_processing_system7_0_TTC0_WAVE1_OUT_UNCONNECTED : STD_LOGIC;
860 signal NLW_processing_system7_0_TTC0_WAVE2_OUT_UNCONNECTED : STD_LOGIC;
861 signal NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED : STD_LOGIC;
862 signal NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
863 signal NLW_processing_system7_0_axi_periph_M00_AXI_arvalid_UNCONNECTED : STD_LOGIC;
864 signal NLW_processing_system7_0_axi_periph_M00_AXI_awvalid_UNCONNECTED : STD_LOGIC;
865 signal NLW_processing_system7_0_axi_periph_M00_AXI_bready_UNCONNECTED : STD_LOGIC;
866 signal NLW_processing_system7_0_axi_periph_M00_AXI_rready_UNCONNECTED : STD_LOGIC;
867 signal NLW_processing_system7_0_axi_periph_M00_AXI_wvalid_UNCONNECTED : STD_LOGIC;
868 signal NLW_processing_system7_0_axi_periph_M00_AXI_araddr_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
869 signal NLW_processing_system7_0_axi_periph_M00_AXI_awaddr_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
870 signal NLW_processing_system7_0_axi_periph_M00_AXI_wdata_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
871 signal NLW_processing_system7_0_axi_periph_M00_AXI_wstrb_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
872 signal NLW_rst_processing_system7_0_100M_mb_reset_UNCONNECTED : STD_LOGIC;
873 signal NLW_rst_processing_system7_0_100M_bus_struct_reset_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
874 signal NLW_rst_processing_system7_0_100M_peripheral_reset_UNCONNECTED : STD_LOGIC_VECTOR ( 0 to 0 );
876 can_merge_0: component top_can_merge_0_1
878 can_rx => can_merge_0_can_rx,
879 can_tx1 => processing_system7_0_CAN0_PHY_TX,
880 can_tx2 => processing_system7_0_CAN1_PHY_TX,
883 processing_system7_0: component top_processing_system7_0_1
885 CAN0_PHY_RX => can_merge_0_can_rx,
886 CAN0_PHY_TX => processing_system7_0_CAN0_PHY_TX,
887 CAN1_PHY_RX => can_merge_0_can_rx,
888 CAN1_PHY_TX => processing_system7_0_CAN1_PHY_TX,
889 DDR_Addr(14 downto 0) => DDR_addr(14 downto 0),
890 DDR_BankAddr(2 downto 0) => DDR_ba(2 downto 0),
891 DDR_CAS_n => DDR_cas_n,
893 DDR_CS_n => DDR_cs_n,
895 DDR_Clk_n => DDR_ck_n,
896 DDR_DM(3 downto 0) => DDR_dm(3 downto 0),
897 DDR_DQ(31 downto 0) => DDR_dq(31 downto 0),
898 DDR_DQS(3 downto 0) => DDR_dqs_p(3 downto 0),
899 DDR_DQS_n(3 downto 0) => DDR_dqs_n(3 downto 0),
900 DDR_DRSTB => DDR_reset_n,
902 DDR_RAS_n => DDR_ras_n,
903 DDR_VRN => FIXED_IO_ddr_vrn,
904 DDR_VRP => FIXED_IO_ddr_vrp,
906 FCLK_CLK0 => processing_system7_0_FCLK_CLK0,
907 FCLK_RESET0_N => processing_system7_0_FCLK_RESET0_N,
908 MIO(53 downto 0) => FIXED_IO_mio(53 downto 0),
909 M_AXI_GP0_ACLK => processing_system7_0_FCLK_CLK0,
910 M_AXI_GP0_ARADDR(31 downto 0) => processing_system7_0_M_AXI_GP0_ARADDR(31 downto 0),
911 M_AXI_GP0_ARBURST(1 downto 0) => processing_system7_0_M_AXI_GP0_ARBURST(1 downto 0),
912 M_AXI_GP0_ARCACHE(3 downto 0) => processing_system7_0_M_AXI_GP0_ARCACHE(3 downto 0),
913 M_AXI_GP0_ARID(11 downto 0) => processing_system7_0_M_AXI_GP0_ARID(11 downto 0),
914 M_AXI_GP0_ARLEN(3 downto 0) => processing_system7_0_M_AXI_GP0_ARLEN(3 downto 0),
915 M_AXI_GP0_ARLOCK(1 downto 0) => processing_system7_0_M_AXI_GP0_ARLOCK(1 downto 0),
916 M_AXI_GP0_ARPROT(2 downto 0) => processing_system7_0_M_AXI_GP0_ARPROT(2 downto 0),
917 M_AXI_GP0_ARQOS(3 downto 0) => processing_system7_0_M_AXI_GP0_ARQOS(3 downto 0),
918 M_AXI_GP0_ARREADY => processing_system7_0_M_AXI_GP0_ARREADY,
919 M_AXI_GP0_ARSIZE(2 downto 0) => processing_system7_0_M_AXI_GP0_ARSIZE(2 downto 0),
920 M_AXI_GP0_ARVALID => processing_system7_0_M_AXI_GP0_ARVALID,
921 M_AXI_GP0_AWADDR(31 downto 0) => processing_system7_0_M_AXI_GP0_AWADDR(31 downto 0),
922 M_AXI_GP0_AWBURST(1 downto 0) => processing_system7_0_M_AXI_GP0_AWBURST(1 downto 0),
923 M_AXI_GP0_AWCACHE(3 downto 0) => processing_system7_0_M_AXI_GP0_AWCACHE(3 downto 0),
924 M_AXI_GP0_AWID(11 downto 0) => processing_system7_0_M_AXI_GP0_AWID(11 downto 0),
925 M_AXI_GP0_AWLEN(3 downto 0) => processing_system7_0_M_AXI_GP0_AWLEN(3 downto 0),
926 M_AXI_GP0_AWLOCK(1 downto 0) => processing_system7_0_M_AXI_GP0_AWLOCK(1 downto 0),
927 M_AXI_GP0_AWPROT(2 downto 0) => processing_system7_0_M_AXI_GP0_AWPROT(2 downto 0),
928 M_AXI_GP0_AWQOS(3 downto 0) => processing_system7_0_M_AXI_GP0_AWQOS(3 downto 0),
929 M_AXI_GP0_AWREADY => processing_system7_0_M_AXI_GP0_AWREADY,
930 M_AXI_GP0_AWSIZE(2 downto 0) => processing_system7_0_M_AXI_GP0_AWSIZE(2 downto 0),
931 M_AXI_GP0_AWVALID => processing_system7_0_M_AXI_GP0_AWVALID,
932 M_AXI_GP0_BID(11 downto 0) => processing_system7_0_M_AXI_GP0_BID(11 downto 0),
933 M_AXI_GP0_BREADY => processing_system7_0_M_AXI_GP0_BREADY,
934 M_AXI_GP0_BRESP(1 downto 0) => processing_system7_0_M_AXI_GP0_BRESP(1 downto 0),
935 M_AXI_GP0_BVALID => processing_system7_0_M_AXI_GP0_BVALID,
936 M_AXI_GP0_RDATA(31 downto 0) => processing_system7_0_M_AXI_GP0_RDATA(31 downto 0),
937 M_AXI_GP0_RID(11 downto 0) => processing_system7_0_M_AXI_GP0_RID(11 downto 0),
938 M_AXI_GP0_RLAST => processing_system7_0_M_AXI_GP0_RLAST,
939 M_AXI_GP0_RREADY => processing_system7_0_M_AXI_GP0_RREADY,
940 M_AXI_GP0_RRESP(1 downto 0) => processing_system7_0_M_AXI_GP0_RRESP(1 downto 0),
941 M_AXI_GP0_RVALID => processing_system7_0_M_AXI_GP0_RVALID,
942 M_AXI_GP0_WDATA(31 downto 0) => processing_system7_0_M_AXI_GP0_WDATA(31 downto 0),
943 M_AXI_GP0_WID(11 downto 0) => processing_system7_0_M_AXI_GP0_WID(11 downto 0),
944 M_AXI_GP0_WLAST => processing_system7_0_M_AXI_GP0_WLAST,
945 M_AXI_GP0_WREADY => processing_system7_0_M_AXI_GP0_WREADY,
946 M_AXI_GP0_WSTRB(3 downto 0) => processing_system7_0_M_AXI_GP0_WSTRB(3 downto 0),
947 M_AXI_GP0_WVALID => processing_system7_0_M_AXI_GP0_WVALID,
948 PS_CLK => FIXED_IO_ps_clk,
949 PS_PORB => FIXED_IO_ps_porb,
950 PS_SRSTB => FIXED_IO_ps_srstb,
951 TTC0_WAVE0_OUT => NLW_processing_system7_0_TTC0_WAVE0_OUT_UNCONNECTED,
952 TTC0_WAVE1_OUT => NLW_processing_system7_0_TTC0_WAVE1_OUT_UNCONNECTED,
953 TTC0_WAVE2_OUT => NLW_processing_system7_0_TTC0_WAVE2_OUT_UNCONNECTED,
954 USB0_PORT_INDCTL(1 downto 0) => NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED(1 downto 0),
955 USB0_VBUS_PWRFAULT => '0',
956 USB0_VBUS_PWRSELECT => NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED
958 processing_system7_0_axi_periph: entity work.top_processing_system7_0_axi_periph_0
960 ACLK => processing_system7_0_FCLK_CLK0,
961 ARESETN(0) => rst_processing_system7_0_100M_interconnect_aresetn(0),
962 M00_ACLK => processing_system7_0_FCLK_CLK0,
963 M00_ARESETN(0) => rst_processing_system7_0_100M_peripheral_aresetn(0),
964 M00_AXI_araddr(31 downto 0) => NLW_processing_system7_0_axi_periph_M00_AXI_araddr_UNCONNECTED(31 downto 0),
965 M00_AXI_arready => '0',
966 M00_AXI_arvalid => NLW_processing_system7_0_axi_periph_M00_AXI_arvalid_UNCONNECTED,
967 M00_AXI_awaddr(31 downto 0) => NLW_processing_system7_0_axi_periph_M00_AXI_awaddr_UNCONNECTED(31 downto 0),
968 M00_AXI_awready => '0',
969 M00_AXI_awvalid => NLW_processing_system7_0_axi_periph_M00_AXI_awvalid_UNCONNECTED,
970 M00_AXI_bready => NLW_processing_system7_0_axi_periph_M00_AXI_bready_UNCONNECTED,
971 M00_AXI_bresp(1 downto 0) => B"00",
972 M00_AXI_bvalid => '0',
973 M00_AXI_rdata(31 downto 0) => B"00000000000000000000000000000000",
974 M00_AXI_rready => NLW_processing_system7_0_axi_periph_M00_AXI_rready_UNCONNECTED,
975 M00_AXI_rresp(1 downto 0) => B"00",
976 M00_AXI_rvalid => '0',
977 M00_AXI_wdata(31 downto 0) => NLW_processing_system7_0_axi_periph_M00_AXI_wdata_UNCONNECTED(31 downto 0),
978 M00_AXI_wready => '0',
979 M00_AXI_wstrb(3 downto 0) => NLW_processing_system7_0_axi_periph_M00_AXI_wstrb_UNCONNECTED(3 downto 0),
980 M00_AXI_wvalid => NLW_processing_system7_0_axi_periph_M00_AXI_wvalid_UNCONNECTED,
981 S00_ACLK => processing_system7_0_FCLK_CLK0,
982 S00_ARESETN(0) => rst_processing_system7_0_100M_peripheral_aresetn(0),
983 S00_AXI_araddr(31 downto 0) => processing_system7_0_M_AXI_GP0_ARADDR(31 downto 0),
984 S00_AXI_arburst(1 downto 0) => processing_system7_0_M_AXI_GP0_ARBURST(1 downto 0),
985 S00_AXI_arcache(3 downto 0) => processing_system7_0_M_AXI_GP0_ARCACHE(3 downto 0),
986 S00_AXI_arid(11 downto 0) => processing_system7_0_M_AXI_GP0_ARID(11 downto 0),
987 S00_AXI_arlen(3 downto 0) => processing_system7_0_M_AXI_GP0_ARLEN(3 downto 0),
988 S00_AXI_arlock(1 downto 0) => processing_system7_0_M_AXI_GP0_ARLOCK(1 downto 0),
989 S00_AXI_arprot(2 downto 0) => processing_system7_0_M_AXI_GP0_ARPROT(2 downto 0),
990 S00_AXI_arqos(3 downto 0) => processing_system7_0_M_AXI_GP0_ARQOS(3 downto 0),
991 S00_AXI_arready => processing_system7_0_M_AXI_GP0_ARREADY,
992 S00_AXI_arsize(2 downto 0) => processing_system7_0_M_AXI_GP0_ARSIZE(2 downto 0),
993 S00_AXI_arvalid => processing_system7_0_M_AXI_GP0_ARVALID,
994 S00_AXI_awaddr(31 downto 0) => processing_system7_0_M_AXI_GP0_AWADDR(31 downto 0),
995 S00_AXI_awburst(1 downto 0) => processing_system7_0_M_AXI_GP0_AWBURST(1 downto 0),
996 S00_AXI_awcache(3 downto 0) => processing_system7_0_M_AXI_GP0_AWCACHE(3 downto 0),
997 S00_AXI_awid(11 downto 0) => processing_system7_0_M_AXI_GP0_AWID(11 downto 0),
998 S00_AXI_awlen(3 downto 0) => processing_system7_0_M_AXI_GP0_AWLEN(3 downto 0),
999 S00_AXI_awlock(1 downto 0) => processing_system7_0_M_AXI_GP0_AWLOCK(1 downto 0),
1000 S00_AXI_awprot(2 downto 0) => processing_system7_0_M_AXI_GP0_AWPROT(2 downto 0),
1001 S00_AXI_awqos(3 downto 0) => processing_system7_0_M_AXI_GP0_AWQOS(3 downto 0),
1002 S00_AXI_awready => processing_system7_0_M_AXI_GP0_AWREADY,
1003 S00_AXI_awsize(2 downto 0) => processing_system7_0_M_AXI_GP0_AWSIZE(2 downto 0),
1004 S00_AXI_awvalid => processing_system7_0_M_AXI_GP0_AWVALID,
1005 S00_AXI_bid(11 downto 0) => processing_system7_0_M_AXI_GP0_BID(11 downto 0),
1006 S00_AXI_bready => processing_system7_0_M_AXI_GP0_BREADY,
1007 S00_AXI_bresp(1 downto 0) => processing_system7_0_M_AXI_GP0_BRESP(1 downto 0),
1008 S00_AXI_bvalid => processing_system7_0_M_AXI_GP0_BVALID,
1009 S00_AXI_rdata(31 downto 0) => processing_system7_0_M_AXI_GP0_RDATA(31 downto 0),
1010 S00_AXI_rid(11 downto 0) => processing_system7_0_M_AXI_GP0_RID(11 downto 0),
1011 S00_AXI_rlast => processing_system7_0_M_AXI_GP0_RLAST,
1012 S00_AXI_rready => processing_system7_0_M_AXI_GP0_RREADY,
1013 S00_AXI_rresp(1 downto 0) => processing_system7_0_M_AXI_GP0_RRESP(1 downto 0),
1014 S00_AXI_rvalid => processing_system7_0_M_AXI_GP0_RVALID,
1015 S00_AXI_wdata(31 downto 0) => processing_system7_0_M_AXI_GP0_WDATA(31 downto 0),
1016 S00_AXI_wid(11 downto 0) => processing_system7_0_M_AXI_GP0_WID(11 downto 0),
1017 S00_AXI_wlast => processing_system7_0_M_AXI_GP0_WLAST,
1018 S00_AXI_wready => processing_system7_0_M_AXI_GP0_WREADY,
1019 S00_AXI_wstrb(3 downto 0) => processing_system7_0_M_AXI_GP0_WSTRB(3 downto 0),
1020 S00_AXI_wvalid => processing_system7_0_M_AXI_GP0_WVALID
1022 rst_processing_system7_0_100M: component top_rst_processing_system7_0_100M_0
1024 aux_reset_in => '1',
1025 bus_struct_reset(0) => NLW_rst_processing_system7_0_100M_bus_struct_reset_UNCONNECTED(0),
1027 ext_reset_in => processing_system7_0_FCLK_RESET0_N,
1028 interconnect_aresetn(0) => rst_processing_system7_0_100M_interconnect_aresetn(0),
1029 mb_debug_sys_rst => '0',
1030 mb_reset => NLW_rst_processing_system7_0_100M_mb_reset_UNCONNECTED,
1031 peripheral_aresetn(0) => rst_processing_system7_0_100M_peripheral_aresetn(0),
1032 peripheral_reset(0) => NLW_rst_processing_system7_0_100M_peripheral_reset_UNCONNECTED(0),
1033 slowest_sync_clk => processing_system7_0_FCLK_CLK0