]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/tree
CAN termination & merging redesigned, added connectors, power regulators, user I/O
-rw-r--r-- 35 .gitignore
-rw-r--r-- 97 .gitmodules
-rw-r--r-- 67 README.txt
-rw-r--r-- 13799 can-interface.sch
-rw-r--r-- 5496 can.sch
-rw-r--r-- 2168 canbench-hw.pro
-rw-r--r-- 7774 canbench-hw.sch
-rw-r--r-- 8942 jx1.sch
-rw-r--r-- 17441 jx2.sch
drwxr-xr-x - lib
-rw-r--r-- 16488 power.sch
-rw-r--r-- 33608 user-io.sch