rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/history

]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/history - canbench-hw.pro

2016-04-21	Martin Jerabek	layout: connectors, KEYs; added ESD protection	blob \| commitdiff \| raw
2016-04-12	Martin Jerabek	user leds: transistors replaced by 4-channel XOR gates	blob \| commitdiff \| raw \| diff to current
2016-04-10	Martin Jerabek	power reg changed, I/O pin assignment, testpoints, CAN	blob \| commitdiff \| raw \| diff to current
2016-04-05	Martin Jerabek	CAN termination & merging redesigned, added connectors...	blob \| commitdiff \| raw \| diff to current
2016-03-15	Martin Jerabek	Used MicroHeaders from kicad-parts	blob \| commitdiff \| raw \| diff to current
2016-03-15	Martin Jerabek	vcco renamed to vccio	blob \| commitdiff \| raw \| diff to current
2016-03-15	Martin Jerabek	Added 2nd microheader.	blob \| commitdiff \| raw \| diff to current
2016-03-14	Martin Jerabek	Added basic schema with 4x CAN Transceiver and 1x Micro...	blob \| commitdiff \| raw \| diff to current

4 channel CAN transceiver board for MicroZed board