]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/history - lib/JX1.dcm
layout: CAN, user LEDs, KEYs, SWs, JX2
[fpga/zynq/canbench-hw.git] / lib / JX1.dcm
2016-04-10 Martin Jerabekpower reg changed, I/O pin assignment, testpoints, CAN