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[fpga/virtex2/uart.git] / openMSP430_uart.ucf
2011-02-13 Vladimir Burian+ PWM output capability. blob | commitdiff | raw
2011-02-13 Vladimir BurianToplevel UART signals renamed. blob | commitdiff | raw | diff to current
2011-01-10 Vladimir BurianPeripheral connected to the quadcount module and an... blob | commitdiff | raw | diff to current
2011-01-09 Vladimir BurianMake RS-232 transmitting work. blob | commitdiff | raw | diff to current
2011-01-09 Vladimir BurianCopied all needed files. blob | commitdiff | raw | diff to current
MSP430 simple UART echo - test top level design for Virtex 2 V2MB1000 board