#==============================================================================#
# Clock & Reset                                                                #
#==============================================================================#

NET "CLK_24MHz"         LOC = "A11" |     PERIOD =  41.7 ns LOW  20.9 ns;

NET "RESET"             LOC = "B6";


#==============================================================================#
# RS-232 Port                                                                  #
#==============================================================================#

NET "TXD"               LOC = "A7";     # output from the board (from FPGA)
NET "RXD"               LOC = "B7";     # input to the board (to FPGA)

#==============================================================================#
# Incremental rotary encoder                                                   #
#==============================================================================#
# Connected to the header J4.

NET "ROT_FEED"          LOC = "H2";                 # pin 01
NET "ROT_A"             LOC = "J2"    | PULLDOWN;   # pin 03
NET "ROT_B"             LOC = "K2"    | PULLDOWN;   # pin 05
NET "ROT_PRESS"         LOC = "E4"    | PULLDOWN;   # pin 07

#==============================================================================#
# PWM output                                                                   #
#==============================================================================#
# Connected to the header J7 (LVDS TX STATUS).

NET "PWM"               LOC = "C1";                 # pin 01