1 //----------------------------------------------------------------------------
2 // Copyright (C) 2001 Authors
4 // This source file may be used and distributed without restriction provided
5 // that this copyright statement is not removed from the file and that any
6 // derivative work contains the original copyright notice and the associated
9 // This source file is free software; you can redistribute it and/or modify
10 // it under the terms of the GNU Lesser General Public License as published
11 // by the Free Software Foundation; either version 2.1 of the License, or
12 // (at your option) any later version.
14 // This source is distributed in the hope that it will be useful, but WITHOUT
15 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
17 // License for more details.
19 // You should have received a copy of the GNU Lesser General Public License
20 // along with this source; if not, write to the Free Software Foundation,
21 // Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
23 //----------------------------------------------------------------------------
25 // *File Name: openMSP430_defines.v
27 // *Module Description:
28 // openMSP430 Configuration file
31 // - Olivier Girard, olgirard@gmail.com
33 //----------------------------------------------------------------------------
35 // $LastChangedBy: olivier.girard $
36 // $LastChangedDate: 2010-08-28 21:53:08 +0200 (Sat, 28 Aug 2010) $
37 //----------------------------------------------------------------------------
38 `include "openMSP430_undefines.v"
40 //----------------------------------------------------------------------------
41 // SYSTEM CONFIGURATION
42 //----------------------------------------------------------------------------
44 // Note: the sum of both program and data memories should not exceed 63.5 kB
47 // Program Memory Size:
48 // Uncomment the required memory size
49 //-------------------------------------------------------
50 //`define PMEM_SIZE_59_KB
51 //`define PMEM_SIZE_55_KB
52 //`define PMEM_SIZE_54_KB
53 //`define PMEM_SIZE_51_KB
54 //`define PMEM_SIZE_48_KB
55 //`define PMEM_SIZE_41_KB
56 //`define PMEM_SIZE_32_KB
57 //`define PMEM_SIZE_24_KB
58 //`define PMEM_SIZE_16_KB
59 //`define PMEM_SIZE_12_KB
60 //`define PMEM_SIZE_8_KB
61 `define PMEM_SIZE_4_KB
62 //`define PMEM_SIZE_2_KB
63 //`define PMEM_SIZE_1_KB
66 // Uncomment the required memory size
67 //-------------------------------------------------------
68 //`define DMEM_SIZE_32_KB
69 //`define DMEM_SIZE_24_KB
70 //`define DMEM_SIZE_16_KB
71 //`define DMEM_SIZE_10_KB
72 //`define DMEM_SIZE_8_KB
73 //`define DMEM_SIZE_5_KB
74 //`define DMEM_SIZE_4_KB
75 //`define DMEM_SIZE_2p5_KB
76 //`define DMEM_SIZE_2_KB
77 `define DMEM_SIZE_1_KB
78 //`define DMEM_SIZE_512_B
79 //`define DMEM_SIZE_256_B
80 //`define DMEM_SIZE_128_B
83 // Include/Exclude Hardware Multiplier
87 //----------------------------------------------------------------------------
88 // REMOTE DEBUGGING INTERFACE CONFIGURATION
89 //----------------------------------------------------------------------------
91 // Include Debug interface
94 // Debug interface selection
95 // `define DBG_UART -> Enable UART (8N1) debug interface
96 // `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
101 // Number of hardware breakpoints (each unit contains 2 hw address breakpoints)
102 // `define DBG_HWBRK_0 -> Include hardware breakpoints unit 0
103 // `define DBG_HWBRK_1 -> Include hardware breakpoints unit 1
104 // `define DBG_HWBRK_2 -> Include hardware breakpoints unit 2
105 // `define DBG_HWBRK_3 -> Include hardware breakpoints unit 3
107 //`define DBG_HWBRK_0
108 //`define DBG_HWBRK_1
109 //`define DBG_HWBRK_2
110 //`define DBG_HWBRK_3
113 //==========================================================================//
114 //==========================================================================//
115 //==========================================================================//
116 //==========================================================================//
117 //===== SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!! =====//
118 //==========================================================================//
119 //==========================================================================//
120 //==========================================================================//
121 //==========================================================================//
124 // PROGRAM & DATA MEMORY CONFIGURATION
125 //======================================
127 // Program Memory Size
128 `ifdef PMEM_SIZE_59_KB
129 `define PMEM_AWIDTH 15
130 `define PMEM_SIZE 60416
132 `ifdef PMEM_SIZE_55_KB
133 `define PMEM_AWIDTH 15
134 `define PMEM_SIZE 56320
136 `ifdef PMEM_SIZE_54_KB
137 `define PMEM_AWIDTH 15
138 `define PMEM_SIZE 55296
140 `ifdef PMEM_SIZE_51_KB
141 `define PMEM_AWIDTH 15
142 `define PMEM_SIZE 52224
144 `ifdef PMEM_SIZE_48_KB
145 `define PMEM_AWIDTH 15
146 `define PMEM_SIZE 49152
148 `ifdef PMEM_SIZE_41_KB
149 `define PMEM_AWIDTH 15
150 `define PMEM_SIZE 41984
152 `ifdef PMEM_SIZE_32_KB
153 `define PMEM_AWIDTH 14
154 `define PMEM_SIZE 32768
156 `ifdef PMEM_SIZE_24_KB
157 `define PMEM_AWIDTH 14
158 `define PMEM_SIZE 24576
160 `ifdef PMEM_SIZE_16_KB
161 `define PMEM_AWIDTH 13
162 `define PMEM_SIZE 16384
164 `ifdef PMEM_SIZE_12_KB
165 `define PMEM_AWIDTH 13
166 `define PMEM_SIZE 12288
168 `ifdef PMEM_SIZE_8_KB
169 `define PMEM_AWIDTH 12
170 `define PMEM_SIZE 8192
172 `ifdef PMEM_SIZE_4_KB
173 `define PMEM_AWIDTH 11
174 `define PMEM_SIZE 4096
176 `ifdef PMEM_SIZE_2_KB
177 `define PMEM_AWIDTH 10
178 `define PMEM_SIZE 2048
180 `ifdef PMEM_SIZE_1_KB
181 `define PMEM_AWIDTH 9
182 `define PMEM_SIZE 1024
186 `ifdef DMEM_SIZE_32_KB
187 `define DMEM_AWIDTH 14
188 `define DMEM_SIZE 32768
190 `ifdef DMEM_SIZE_24_KB
191 `define DMEM_AWIDTH 14
192 `define DMEM_SIZE 24576
194 `ifdef DMEM_SIZE_16_KB
195 `define DMEM_AWIDTH 13
196 `define DMEM_SIZE 16384
198 `ifdef DMEM_SIZE_10_KB
199 `define DMEM_AWIDTH 13
200 `define DMEM_SIZE 10240
202 `ifdef DMEM_SIZE_8_KB
203 `define DMEM_AWIDTH 12
204 `define DMEM_SIZE 8192
206 `ifdef DMEM_SIZE_5_KB
207 `define DMEM_AWIDTH 12
208 `define DMEM_SIZE 5120
210 `ifdef DMEM_SIZE_4_KB
211 `define DMEM_AWIDTH 11
212 `define DMEM_SIZE 4096
214 `ifdef DMEM_SIZE_2p5_KB
215 `define DMEM_AWIDTH 11
216 `define DMEM_SIZE 2560
218 `ifdef DMEM_SIZE_2_KB
219 `define DMEM_AWIDTH 10
220 `define DMEM_SIZE 2048
222 `ifdef DMEM_SIZE_1_KB
223 `define DMEM_AWIDTH 9
224 `define DMEM_SIZE 1024
226 `ifdef DMEM_SIZE_512_B
227 `define DMEM_AWIDTH 8
228 `define DMEM_SIZE 512
230 `ifdef DMEM_SIZE_256_B
231 `define DMEM_AWIDTH 7
232 `define DMEM_SIZE 256
234 `ifdef DMEM_SIZE_128_B
235 `define DMEM_AWIDTH 6
236 `define DMEM_SIZE 128
239 // Data Memory Base Adresses
240 `define DMEM_BASE 16'h0200
242 // Program & Data Memory most significant address bit (for 16 bit words)
243 `define PMEM_MSB `PMEM_AWIDTH-1
244 `define DMEM_MSB `DMEM_AWIDTH-1
247 // STATES, REGISTER FIELDS, ...
248 //======================================
255 // Single-operand arithmetic
275 // Two-operand arithmetic
299 // Execution state machine
305 `define E_SRC_AD 4'h5
306 `define E_SRC_RD 4'h6
307 `define E_SRC_WR 4'h7
308 `define E_DST_AD 4'h8
309 `define E_DST_RD 4'h9
310 `define E_DST_WR 4'hA
315 // ALU control signals
316 `define ALU_SRC_INV 0
327 `define EXEC_NO_WR 11
330 `define DBG_UART_WR 18
331 `define DBG_UART_BW 17
332 `define DBG_UART_ADDR 16:11
334 // Debug interface CPU_CTL register
343 // Debug interface CPU_STAT register
350 // Debug interface BRKx_CTL register
351 `define BRK_MODE_RD 0
352 `define BRK_MODE_WR 1
358 // Basic clock module: BCSCTL1 Control Register
361 // Basic clock module: BCSCTL2 Control Register
365 // Timer A: TACTL Control Register
373 // Timer A: TACCTLx Capture/Compare Control Register
375 `define TACCISx 13:12
379 `define TAOUTMODx 7:5
388 // DEBUG INTERFACE EXTRA CONFIGURATION
389 //======================================
391 // Debug interface: Software breakpoint opcode
392 `define DBG_SWBRK_OP 16'h4343
394 // Debug UART interface auto data synchronization
395 // If the following define is commented out, then
396 // the DBG_UART_BAUD and DBG_DCO_FREQ need to be properly
398 `define DBG_UART_AUTO_SYNC
400 // Debug UART interface data rate
401 // In order to properly setup the UART debug interface, you
402 // need to specify the DCO_CLK frequency (DBG_DCO_FREQ) and
403 // the chosen BAUD rate from the UART interface.
405 //`define DBG_UART_BAUD 9600
406 //`define DBG_UART_BAUD 19200
407 //`define DBG_UART_BAUD 38400
408 //`define DBG_UART_BAUD 57600
409 //`define DBG_UART_BAUD 115200
410 //`define DBG_UART_BAUD 230400
411 //`define DBG_UART_BAUD 460800
412 //`define DBG_UART_BAUD 576000
413 //`define DBG_UART_BAUD 921600
414 `define DBG_UART_BAUD 2000000
415 `define DBG_DCO_FREQ 20000000
416 `define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
418 // Enable/Disable the hardware breakpoint RANGE mode
419 `define HWBRK_RANGE 1'b0
421 // Counter width for the debug interface UART
422 `define DBG_UART_XFER_CNT_W 16
424 // Check configuration
428 CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
432 CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED
434 CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
440 // MULTIPLIER CONFIGURATION
441 //======================================
443 // If uncommented, the following define selects
444 // the 16x16 multiplier (1 cycle) instead of the
445 // default 16x8 multplier (2 cycles)