2 use IEEE.STD_LOGIC_1164.ALL;
3 use IEEE.STD_LOGIC_ARITH.ALL;
4 use IEEE.STD_LOGIC_UNSIGNED.ALL;
6 entity openMSP430_uart is
8 CLK_24MHz: in std_logic;
16 --------------------------------------------------------------------------------
18 architecture rtl of openMSP430_uart is
19 component openMSP430 is
21 aclk_en : out std_logic; -- ACLK enable
22 dbg_freeze : out std_logic; -- Freeze peripherals
23 dbg_uart_txd : out std_logic; -- Debug interface: UART TXD
24 dmem_addr : out std_logic_vector (8 downto 0); -- Data Memory address
25 dmem_cen : out std_logic; -- Data Memory chip enable (low active)
26 dmem_din : out std_logic_vector (15 downto 0); -- Data Memory data input
27 dmem_wen : out std_logic_vector (1 downto 0); -- Data Memory write enable (low active)
28 irq_acc : out std_logic_vector (13 downto 0); -- Interrupt request accepted (one-hot signal)
29 mclk : out std_logic; -- Main system clock
30 per_addr : out std_logic_vector (7 downto 0); -- Peripheral address
31 per_din : out std_logic_vector (15 downto 0); -- Peripheral data input
32 per_wen : out std_logic_vector (1 downto 0); -- Peripheral write enable (high active)
33 per_en : out std_logic; -- Peripheral enable (high active)
34 pmem_addr : out std_logic_vector (10 downto 0); -- Program Memory address
35 pmem_cen : out std_logic; -- Program Memory chip enable (low active)
36 pmem_din : out std_logic_vector (15 downto 0); -- Program Memory data input (optional)
37 pmem_wen : out std_logic_vector (1 downto 0); -- Program Memory write enable (low active) (optional)
38 puc : out std_logic; -- Main system reset
39 smclk_en : out std_logic; -- SMCLK enable
41 dbg_uart_rxd : in std_logic; -- Debug interface: UART RXD
42 dco_clk : in std_logic; -- Fast oscillator (fast clock)
43 dmem_dout : in std_logic_vector (15 downto 0); -- Data Memory data output
44 irq : in std_logic_vector (13 downto 0); -- Maskable interrupts
45 lfxt_clk : in std_logic; -- Low frequency oscillator (typ 32kHz)
46 nmi : in std_logic; -- Non-maskable interrupt (asynchronous)
47 per_dout : in std_logic_vector (15 downto 0); -- Peripheral data output
48 pmem_dout : in std_logic_vector (15 downto 0); -- Program Memory data output
49 reset_n : in std_logic -- Reset Pin (low active)
55 addr: in std_logic_VECTOR(8 downto 0);
57 din: in std_logic_VECTOR(7 downto 0);
58 dout: out std_logic_VECTOR(7 downto 0);
66 addr: in std_logic_VECTOR(10 downto 0);
68 din: in std_logic_VECTOR(7 downto 0);
69 dout: out std_logic_VECTOR(7 downto 0);
87 p1_din : in std_logic_vector(7 downto 0);
88 p2_din : in std_logic_vector(7 downto 0);
89 p3_din : in std_logic_vector(7 downto 0);
90 p4_din : in std_logic_vector(7 downto 0);
91 p5_din : in std_logic_vector(7 downto 0);
92 p6_din : in std_logic_vector(7 downto 0);
93 per_addr : in std_logic_vector(7 downto 0);
94 per_din : in std_logic_vector(15 downto 0);
95 per_en : in std_logic;
96 per_wen : in std_logic_vector(1 downto 0);
98 irq_port1 : out std_logic;
99 irq_port2 : out std_logic;
100 p1_dout : out std_logic_vector(7 downto 0);
101 p1_dout_en : out std_logic_vector(7 downto 0);
102 p1_sel : out std_logic_vector(7 downto 0);
103 p2_dout : out std_logic_vector(7 downto 0);
104 p2_dout_en : out std_logic_vector(7 downto 0);
105 p2_sel : out std_logic_vector(7 downto 0);
106 p3_dout : out std_logic_vector(7 downto 0);
107 p3_dout_en : out std_logic_vector(7 downto 0);
108 p3_sel : out std_logic_vector(7 downto 0);
109 p4_dout : out std_logic_vector(7 downto 0);
110 p4_dout_en : out std_logic_vector(7 downto 0);
111 p4_sel : out std_logic_vector(7 downto 0);
112 p5_dout : out std_logic_vector(7 downto 0);
113 p5_dout_en : out std_logic_vector(7 downto 0);
114 p5_sel : out std_logic_vector(7 downto 0);
115 p6_dout : out std_logic_vector(7 downto 0);
116 p6_dout_en : out std_logic_vector(7 downto 0);
117 p6_sel : out std_logic_vector(7 downto 0);
118 per_dout : out std_logic_vector(15 downto 0)
122 component omsp_timerA
124 irq_ta0 : out std_logic; -- Timer A interrupt: TACCR0
125 irq_ta1 : out std_logic; -- Timer A interrupt: TAIV, TACCR1, TACCR2
126 per_dout : out std_logic_vector (15 downto 0); -- Peripheral data output
127 ta_out0 : out std_logic; -- Timer A output 0
128 ta_out0_en : out std_logic; -- Timer A output 0 enable
129 ta_out1 : out std_logic; -- Timer A output 1
130 ta_out1_en : out std_logic; -- Timer A output 1 enable
131 ta_out2 : out std_logic; -- Timer A output 2
132 ta_out2_en : out std_logic; -- Timer A output 2 enable
134 aclk_en : in std_logic; -- ACLK enable (from CPU)
135 dbg_freeze : in std_logic; -- Freeze Timer A counter
136 inclk : in std_logic; -- INCLK external timer clock (SLOW)
137 irq_ta0_acc : in std_logic; -- Interrupt request TACCR0 accepted
138 mclk : in std_logic; -- Main system clock
139 per_addr : in std_logic_vector (7 downto 0); -- Peripheral address
140 per_din : in std_logic_Vector (15 downto 0); -- Peripheral data input
141 per_en : in std_logic; -- Peripheral enable (high active)
142 per_wen : in std_logic_vector (1 downto 0); -- Peripheral write enable (high active)
143 puc : in std_logic; -- Main system reset
144 smclk_en : in std_logic; -- SMCLK enable (from CPU)
145 ta_cci0a : in std_logic; -- Timer A capture 0 input A
146 ta_cci0b : in std_logic; -- Timer A capture 0 input B
147 ta_cci1a : in std_logic; -- Timer A capture 1 input A
148 ta_cci1b : in std_logic; -- Timer A capture 1 input B
149 ta_cci2a : in std_logic; -- Timer A capture 2 input A
150 ta_cci2b : in std_logic; -- Timer A capture 2 input B
151 taclk : in std_logic -- TACLK external timer clock (SLOW)
155 component omsp_quadcount is
158 per_addr : in std_logic_vector (7 downto 0);
159 per_din : in std_logic_vector (15 downto 0); -- unused
160 per_en : in std_logic;
161 per_wen : in std_logic_vector (1 downto 0); -- unused
162 puc : in std_logic; -- unused
163 per_irq_acc : in std_logic; -- unused
164 per_irq : out std_logic; -- unused
165 per_dout : out std_logic_vector (15 downto 0);
167 qcount : in std_logic_vector (31 downto 0)
172 signal mclk : std_logic;
173 signal puc : std_logic;
174 signal aclk_en : std_logic;
175 signal smclk_en : std_logic;
177 signal irq_acc : std_logic_vector (13 downto 0);
178 signal irq : std_logic_vector (13 downto 0);
180 signal pmem_addr : std_logic_vector (10 downto 0);
181 signal pmem_dout : std_logic_vector (15 downto 0);
182 signal pmem_cen : std_logic;
184 signal dmem_addr : std_logic_vector (8 downto 0);
185 signal dmem_cen : std_logic;
186 signal dmem_wen : std_logic_vector (1 downto 0);
187 signal dmem_din : std_logic_vector (15 downto 0);
188 signal dmem_dout : std_logic_vector (15 downto 0);
190 signal per_din : std_logic_vector (15 downto 0);
191 signal per_dout : std_logic_Vector (15 downto 0);
192 signal per_wen : std_logic_vector (1 downto 0);
193 signal per_en : std_logic;
194 signal per_addr : std_logic_vector (7 downto 0);
197 signal gpio_per_dout : std_logic_vector (15 downto 0);
198 signal timerA_per_dout : std_logic_vector (15 downto 0);
199 signal omsp_quadcount_dout : std_logic_vector (15 downto 0);
201 signal irq_ta0 : std_logic;
202 signal irq_ta1 : std_logic;
204 --------------------------------------------------------------------------------
207 openMSP430_0 : openMSP430 port map (
210 dbg_uart_txd => open,
211 dmem_addr => dmem_addr,
212 dmem_cen => dmem_cen,
213 dmem_din => dmem_din,
214 dmem_wen => dmem_wen,
217 per_addr => per_addr,
221 pmem_addr => pmem_addr,
222 pmem_cen => pmem_cen,
226 smclk_en => smclk_en,
229 dco_clk => CLK_24MHz,
230 dmem_dout => dmem_dout,
234 per_dout => per_dout,
235 pmem_dout => pmem_dout,
239 ram_8x512_hi : ram_8x512 port map (
242 din => dmem_din (15 downto 8),
243 dout => dmem_dout (15 downto 8),
248 ram_8x512_lo : ram_8x512 port map (
251 din => dmem_din (7 downto 0),
252 dout => dmem_dout (7 downto 0),
257 rom_8x2k_hi : rom_8x2k port map (
260 din => (others => '0'),
261 dout => pmem_dout (15 downto 8),
266 rom_8x2k_lo : rom_8x2k port map (
269 din => (others => '0'),
270 dout => pmem_dout (7 downto 0),
276 omsp_gpio_0 : omsp_gpio
278 P1_EN => '1', -- Enable Port 1
279 P2_EN => '1', -- Enable Port 2
280 P3_EN => '0', -- Enable Port 3
281 P4_EN => '0', -- Enable Port 4
282 P5_EN => '0', -- Enable Port 5
283 P6_EN => '0' -- Enable Port 6
288 p1_dout (7 downto 2) => open,
308 per_dout => gpio_per_dout,
310 p1_din => (others => '0'),
311 p2_din => (others => '0'),
312 p3_din => (others => '0'),
313 p4_din => (others => '0'),
314 p5_din => (others => '0'),
315 p6_din => (others => '0'),
316 per_addr => per_addr,
323 omsp_timerA_0 : omsp_timerA port map (
326 per_dout => timerA_per_dout,
337 irq_ta0_acc => irq_acc (9),
339 per_addr => per_addr,
344 smclk_en => smclk_en,
354 omsp_quadcount_0 : omsp_quadcount port map (
356 per_addr => per_addr,
357 per_din => (others => '0'),
363 per_dout => omsp_quadcount_dout,
365 qcount => X"0001E240" -- 123456
368 --------------------------------------------------------------------------------
370 per_dout <= gpio_per_dout or timerA_per_dout or omsp_quadcount_dout;
372 irq <= (9 => irq_ta0,