vhdl work quadcount/qcounter.vhd
+#==============================================================================#
+# MCU peripherals #
+#==============================================================================#
+
+vhdl work mcu_periph/gpio.vhd
+
+
#==============================================================================#
# Top-level design file #
#==============================================================================#
signal per_en : std_logic;
signal per_addr : std_logic_vector (7 downto 0);
+ ------------------------------------------------------------------------------
+ -- MCU peripherals
+ ------------------------------------------------------------------------------
+ -- GPIO
+ signal GPIO_IN : std_logic_vector (15 downto 0);
+ signal GPIO_OUT : std_logic_vector (15 downto 0);
+ signal GPIO_DAT_O : std_logic_vector (15 downto 0);
+ signal GPIO_SEL : std_logic;
+
------------------------------------------------------------------------------
-- Dual-port shared memory
------------------------------------------------------------------------------
-- Peripheral bus address decoder and data multiplexer.
------------------------------------------------------------------------------
- per_dout <= (others => '0'); -- MUST be 0 when nothing is addressed
+ per_dout <= GPIO_DAT_O when GPIO_SEL = '1' else
+ (others => '0'); -- MUST be 0 when nothing is addressed
+
+ GPIO_SEL <= '1' when per_addr(7 downto 2) = 16#0140#/2/4 else '0';
+
+
+ ------------------------------------------------------------------------------
+ -- MCU peripherals
+ ------------------------------------------------------------------------------
+ GPIO_IN(0) <= HAL0;
+ GPIO_IN(1) <= HAL1;
+ GPIO_IN(2) <= HAL2;
+ GPIO_IN(3) <= IRC_INDEX;
+
+ gpio_0 : entity work.gpio
+ generic map (
+ W => 16)
+ port map (
+ ACK_O => open,
+ ADR_I => per_addr (1 downto 0),
+ CLK_I => mclk,
+ DAT_I => per_din,
+ DAT_O => GPIO_DAT_O,
+ RST_I => puc,
+ SEL_I => GPIO_SEL,
+ STB_I => per_en,
+ WE_I => per_wen16,
+ GPIO_I => GPIO_IN,
+ GPIO_O => GPIO_OUT);