]> rtime.felk.cvut.cz Git - fpga/virtex2/msp430-cmdproc.git/blob - msp430_cmdproc.prj
Added gitignore file.
[fpga/virtex2/msp430-cmdproc.git] / msp430_cmdproc.prj
1 verilog work openmsp430/core/omsp_alu.v
2 verilog work openmsp430/core/omsp_clock_module.v
3 verilog work openmsp430/core/omsp_dbg.v
4 verilog work openmsp430/core/omsp_dbg_hwbrk.v
5 verilog work openmsp430/core/omsp_dbg_uart.v
6 verilog work openmsp430/core/omsp_execution_unit.v
7 verilog work openmsp430/core/omsp_frontend.v
8 verilog work openmsp430/core/omsp_mem_backbone.v
9 verilog work openmsp430/core/omsp_multiplier.v
10 verilog work openmsp430/core/omsp_register_file.v
11 verilog work openmsp430/core/omsp_sfr.v
12 verilog work openmsp430/core/omsp_watchdog.v
13 verilog work openmsp430/core/openMSP430.v
14
15 verilog work openmsp430/core/openMSP430_undefines.v
16 verilog work openmsp430/core/timescale.v
17
18 vhdl    work openmsp430/memory/ram_generic.vhd
19
20 vhdl    work openmsp430/uart/tx_control.vhd
21 vhdl    work openmsp430/uart/tx.vhd
22 vhdl    work openmsp430/uart/rx_control.vhd
23 vhdl    work openmsp430/uart/rx.vhd
24 vhdl    work openmsp430/uart/fifo.vhd
25 vhdl    work openmsp430/uart/baud_gen.vhd
26 vhdl    work openmsp430/uart/uart.vhd
27
28 verilog work openmsp430/top/top_8_32_mul/openMSP430_defines.v
29 vhdl    work openmsp430/top/top_8_32_mul/openMSP430_8_32_mul.vhd
30
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32 vhdl    work msp430_cmdproc.vhd
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