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(parent: 778d7f0) | patch
+Coregen with memories used by softcore
authorVladimir Burian <buriavl2@fel.cvut.cz>
Sat, 8 Jan 2011 23:15:28 +0000 (00:15 +0100)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Sat, 8 Jan 2011 23:15:28 +0000 (00:15 +0100)
commitc626143b2620e2bbfc6317d726a7298d42d1f966
tree758d1c19f174dda0510f3f98fb4e075b9841ef1dtree | snapshot
parent778d7f0ac9494622ac80cd558f242576315e5494commit | diff
+Coregen with memories used by softcore
19 files changed:
coregen/coregen.cgp [new file with mode: 0644] blob
coregen/ram_8x512.asy [new file with mode: 0644] blob
coregen/ram_8x512.ngc [new file with mode: 0644] blob
coregen/ram_8x512.sym [new file with mode: 0644] blob
coregen/ram_8x512.vhd [new file with mode: 0644] blob
coregen/ram_8x512.vho [new file with mode: 0644] blob
coregen/ram_8x512.xco [new file with mode: 0644] blob
coregen/ram_8x512_flist.txt [new file with mode: 0644] blob
coregen/ram_8x512_readme.txt [new file with mode: 0644] blob
coregen/ram_8x512_xmdf.tcl [new file with mode: 0644] blob
coregen/rom_8x2k.asy [new file with mode: 0644] blob
coregen/rom_8x2k.ngc [new file with mode: 0644] blob
coregen/rom_8x2k.sym [new file with mode: 0644] blob
coregen/rom_8x2k.vhd [new file with mode: 0644] blob
coregen/rom_8x2k.vho [new file with mode: 0644] blob
coregen/rom_8x2k.xco [new file with mode: 0644] blob
coregen/rom_8x2k_flist.txt [new file with mode: 0644] blob
coregen/rom_8x2k_readme.txt [new file with mode: 0644] blob
coregen/rom_8x2k_xmdf.tcl [new file with mode: 0644] blob
MSP430 LED blink - test top level design for Virtex 2 V2MB1000 board