odstraneny testovaci vystupy na piny

[fpga/rpi-motor-control.git] / pmsm-control / rpi_mc_simple_dc.vhdl

diff --git a/pmsm-control/rpi_mc_simple_dc.vhdl b/pmsm-control/rpi_mc_simple_dc.vhdl
index f3ca0878739665aac504b59cb77fb185cb0da8a3..d3f69bceb7bb6b0c52a0eb80633edccdaa0de5bf 100644 (file)
--- a/pmsm-control/rpi_mc_simple_dc.vhdl
+++ b/pmsm-control/rpi_mc_simple_dc.vhdl
@@ -14,6 +14,7 @@ library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;
 use work.util.all;
+use work.qcounter.all;
 
 entity rpi_mc_simple_dc is
        port (
@@ -29,7 +30,7 @@ entity rpi_mc_simple_dc is
                gpio23: out std_logic; -- SD1CMD
                gpio24: out std_logic; -- SD1DAT0
                gpio10: in std_logic; -- SPI0MOSI
-               gpio9: in std_logic; -- SPI0MISO
+               gpio9: out std_logic; -- SPI0MISO
                gpio25: out std_logic; -- SD1DAT1
                gpio11: in std_logic; -- SPI0SCLK
                gpio8: in std_logic; -- SPI0CE0
@@ -104,7 +105,7 @@ architecture behavioral of rpi_mc_simple_dc is
 
        signal pwm_in, pwm_dir_in: std_logic;
        signal spi_clk: std_logic;
-       signal dat_reg : STD_LOGIC_VECTOR (7 downto 0); --registr pro SPI
+       signal dat_reg : STD_LOGIC_VECTOR (7 downto 0):=(others=>'0'); --registr pro SPI
 
        --  attribute syn_noprune of gpio2 : signal is true;
        --  attribute syn_preserve of gpio2 : signal is true;
@@ -143,7 +144,7 @@ begin
                dip_sw(1) and dip_sw(2) and dip_sw(3) and
                irc_a and irc_b and
                -- gpio17 and gpio18 and gpio27 and gpio22 and
-               gpio8 and gpio9 and gpio11 and gpio7 and gpio10 and
+               gpio8  and gpio11 and gpio7 and gpio10 and
                ext_scs1 and ext_scs2 and ext_miso and ext_mosi and ext_sclk and ext_scs0;
                        
        rs485_txd <= '1';
@@ -171,15 +172,11 @@ begin
                                -- of SCK, MSB first
                                dat_reg(7 downto 0) <= dat_reg(6 downto 0) & gpio10;
                 
-                               gpio4 <= dat_reg(7);
-                               gpio17 <= dat_reg(6);
-                               gpio18 <= dat_reg(5);
-                               gpio27 <= dat_reg(4);
-                               gpio22 <= dat_reg(3);
-                               gpio23 <= dat_reg(2);
-                               gpio24 <= dat_reg(1);
-                               gpio25 <= dat_reg(0);
        
+                       end if;
+               elsif (falling_edge(spi_clk)) then
+                       if (gpio7 = '0') then
+                               gpio9 <= dat_reg(7); --zapisujeme nejdriv MSB
                        end if;
                end if;
        end process;