+
+ component qcounter
+ port (
+ clock: in std_logic;
+ reset: in std_logic;
+ a0, b0: in std_logic;
+ qcount: out std_logic_vector (31 downto 0);
+ a_rise, a_fall, b_rise, b_fall, ab_event: out std_logic;
+ ab_error: out std_logic
+ );
+ end component;
signal spiclk_old_lvl: std_logic :='0'; --pro detekci hrany SPI hodin
signal pwm_in, pwm_dir_in: std_logic;
signal spi_clk: std_logic;
signal gpio_clk: std_logic;
signal dat_reg : STD_LOGIC_VECTOR (7 downto 0):=(others=>'0'); --registr pro SPI
signal spiclk_old_lvl: std_logic :='0'; --pro detekci hrany SPI hodin
signal pwm_in, pwm_dir_in: std_logic;
signal spi_clk: std_logic;
signal gpio_clk: std_logic;
signal dat_reg : STD_LOGIC_VECTOR (7 downto 0):=(others=>'0'); --registr pro SPI
-- attribute syn_noprune of gpio2 : signal is true;
-- attribute syn_preserve of gpio2 : signal is true;
-- attribute syn_noprune of gpio2 : signal is true;
-- attribute syn_preserve of gpio2 : signal is true;