subtype std_logic4 is std_logic_vector (3 downto 0);
signal a, b, a_prev, b_prev: std_logic;
subtype std_logic4 is std_logic_vector (3 downto 0);
signal a, b, a_prev, b_prev: std_logic;
qcount(31 downto 2) <= count;
comb_event: process (a_prev, b_prev, a, b)
qcount(31 downto 2) <= count;
comb_event: process (a_prev, b_prev, a, b)
comb_count: process (a_prev, b_prev, a, b, count)
begin
if (a_prev = '0') and (b_prev = '1') and (a = '0') and (b = '0') then
comb_count: process (a_prev, b_prev, a, b, count)
begin
if (a_prev = '0') and (b_prev = '1') and (a = '0') and (b = '0') then