Corrected mcc_master.

Controller of the chain (MCC_ACK, MCC_STB) is brought to the default state
when cycle is complete.

diff --git a/mcc_master.vhd b/mcc_master.vhd
index 64bf9ef9ce02b7aac27dde8e859c136967a611c9..12d5b943ec2d03c2d5a3757a248331ffe83347bc 100644 (file)
--- a/mcc_master.vhd
+++ b/mcc_master.vhd
@@ -72,17 +72,23 @@ begin
       mcc_stb_inner <= (others => '0');
 
     elsif rising_edge(CLK_I) then
-      mcc_ack_inner (0) <= mcc_exec;
-      
-      for i in 0 to MCC_W-1 loop
-        if mcc_mask (i) = '1' then
-          mcc_ack_inner (i+1) <= MCC_ACK_I (i);
-          mcc_stb_inner (i)   <= mcc_ack_inner (i);
-        else
-          mcc_ack_inner (i+1) <= mcc_ack_inner (i);
-          mcc_stb_inner (i)   <= '0';
-        end if;
-      end loop;
+      if mcc_exec = '0' then
+        mcc_ack_inner <= (others => '0');
+        mcc_stb_inner <= (others => '0');
+        
+      else
+        mcc_ack_inner (0) <= mcc_exec;
+        
+        for i in 0 to MCC_W-1 loop
+          if mcc_mask (i) = '1' then
+            mcc_ack_inner (i+1) <= MCC_ACK_I (i);
+            mcc_stb_inner (i)   <= mcc_ack_inner (i);
+          else
+            mcc_ack_inner (i+1) <= mcc_ack_inner (i);
+            mcc_stb_inner (i)   <= '0';
+          end if;
+        end loop;
+      end if;
     end if;
   end process;
 

diff --git a/tb/tb_mcc_master.sav b/tb/tb_mcc_master.sav
index fceecaebdb56aa4fb7dc7b6d6db6ae9017e19534..182702c0ebfd3218f88b40ea51754aca30340c3f 100644 (file)
--- a/tb/tb_mcc_master.sav
+++ b/tb/tb_mcc_master.sav
@@ -1,12 +1,16 @@
 [timestart] 0
 [size] 1280 746
 [pos] -1 -1
-*-33.430180 2370000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+*-33.430180 5720000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 @28
 clk_i
 rst_i
 stb_i
 ack_o
+uut.mcc_mux_en
+@23
+uut.mcc_mux_code[1:0]
+@28
 dbg_mem0[15:0]
 @22
 dbg_mem1[15:0]