--- /dev/null
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_arith.all;
+use ieee.std_logic_unsigned.all;
+
+--------------------------------------------------------------------------------
+
+entity mcc_exec is
+ port (
+ -- Clock & reset
+ CLK_I : in std_logic;
+ RST_I : in std_logic;
+ -- MCC execution
+ MCC_EN_I : in std_logic;
+ MCC_EXEC_I : in std_logic;
+ MCC_ERR_O : out std_logic;
+ -- MCC master interface
+ MCC_ACK_I : in std_logic;
+ MCC_STB_O : out std_logic);
+end entity mcc_exec;
+
+--------------------------------------------------------------------------------
+
+architecture behavioral of mcc_exec is
+
+ signal mcc_stb : std_logic := '0';
+
+--------------------------------------------------------------------------------
+
+begin
+
+ MCC_STB_O <= mcc_stb;
+
+ MCC_ERR_O <= MCC_EXEC_I and (mcc_stb or MCC_ACK_I);
+
+
+ process (CLK_I, RST_I) is
+ begin
+ if rising_edge(CLK_I) then
+ if RST_I = '1' or MCC_ACK_I = '1' then
+ mcc_stb <= '0';
+ elsif MCC_EN_I = '1' and MCC_EXEC_I = '1' then
+ mcc_stb <= '1';
+ end if;
+ end if;
+ end process;
+
+end architecture behavioral;
+