]> rtime.felk.cvut.cz Git - fpga/pwm.git/blobdiff - tb/tb_mcc_master.vhd
Improved mcc_master test bench.
[fpga/pwm.git] / tb / tb_mcc_master.vhd
index 7b99fb1215cce7b2469d5260b46ae2772d0f01e9..45a437adf8ebfbc045bde9def19067376530a6ea 100644 (file)
@@ -185,7 +185,6 @@ begin
         end case;
       else
         case conv_integer(IRF_ADR_O) is
-          when 1 => dbg_mem1 <= IRF_DAT_O;
           when 2 => dbg_mem2 <= IRF_DAT_O;
           when 3 => dbg_mem3 <= IRF_DAT_O;
           when 4 => dbg_mem4 <= IRF_DAT_O;
@@ -205,8 +204,7 @@ begin
     wait for 4*period;
 
     for i in 0 to 1 loop
-      --dbg_mem0 <= (others => '0');
-      --dbg_mem0(LUT_ADR_O'RANGE) <= conv_std_logic_vector(i, LUT_ADR_W);
+      dbg_mem1 <= conv_std_logic_vector(i, 16);
       
       STB_I <= '1';
       wait until rising_edge(CLK_I) and ACK_O = '1';