]> rtime.felk.cvut.cz Git - fpga/pwm.git/blobdiff - tb/Makefile
Added irc_base.
[fpga/pwm.git] / tb / Makefile
index b77d80407bd13aadb6f6616eec14d4dc0adeced7..bcd8fbd4404bc81f15d13c04fc394c05596e8e26 100644 (file)
@@ -1,8 +1,20 @@
-VHDL_MAIN     = tb_vector_gen
+# Be aware of required VHDL_ENTITIES sequence! All entities must be listed in
+# bottom to up order (e.g. the top entity is the last in this list). Otherwise
+# it won't compile.
+
+VHDL_MAIN     = tb_mcc
 VHDL_ENTITIES = counter.o \
                 pwm.o \
                 wave_table.o \
-                vector_gen.o
+                vector_gen.o \
+                priority_encoder.o \
+                mcc_master.o \
+                sequencer.o \
+                pwm_dump.o \
+                irc_dump.o \
+                irc_base.o \
+                mcc.o
+
 
 STOP_TIME     = 50us
 
@@ -15,7 +27,7 @@ run: $(VHDL_MAIN)
 view: run
        gtkwave $(VHDL_MAIN).vcd $(VHDL_MAIN).sav
 
-$(VHDL_MAIN): $(VHDL_MAIN).o $(VHDL_ENTITIES)
+$(VHDL_MAIN): $(VHDL_ENTITIES) $(VHDL_MAIN).o
        ghdl -e -fexplicit --ieee=synopsys $@
 
 %.o: %.vhd