Wave_table initialization data format modified.

[fpga/pwm.git] / tb / tb_wave_table.vhd

diff --git a/tb/tb_wave_table.vhd b/tb/tb_wave_table.vhd
index d0a8e29f7433cdc772154facd6568b623fc5dd47..f740641756fe06a6e9250f3484c97a04f3c35f63 100644 (file)
--- a/tb/tb_wave_table.vhd
+++ b/tb/tb_wave_table.vhd
@@ -29,28 +29,11 @@ architecture testbench of tb_wave_table is
   signal WE_I  : std_logic;
   signal RST_I : std_logic;
 
---------------------------------------------------------------------------------
-
-  component wave_table is
-    generic (
-      DAT_W     : integer;
-      ADR_W     : integer;
-      INIT_FILE : string);
-    port (
-      ACK_O : out std_logic;
-      ADR_I : in  std_logic_vector (ADR_W-1 downto 0);
-      CLK_I : in  std_logic;
-      DAT_I : in  std_logic_vector (DAT_W-1 downto 0);
-      DAT_O : out std_logic_vector (DAT_W-1 downto 0);
-      STB_I : in  std_logic;
-      WE_I  : in  std_logic);
-  end component wave_table;
-  
 --------------------------------------------------------------------------------
   
 begin
   
-  uut : wave_table
+  uut : entity work.wave_table
     generic map (
       DAT_W     => DAT_W,
       ADR_W     => ADR_W,