]> rtime.felk.cvut.cz Git - fpga/openmsp430.git/commit
Added uart submodule.
authorVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 10 Mar 2011 12:32:28 +0000 (13:32 +0100)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 10 Mar 2011 12:32:28 +0000 (13:32 +0100)
commitc645067c9e71c8c5eea22969dd828824985bb322
tree4aa57692cc7961c0d15911b607f53f3cfb007691
parentdf1ca59d7fb07786067b8b7934109634dfb97cd4
Added uart submodule.
.gitmodules [new file with mode: 0644]
uart [new submodule]