1 ---------------------------------------------------------------------------------
4 -- Filename: mbl_Pkg.vhd
5 -- Description: Package for the TUD MB-Lite implementation
7 -- Author: Huib Lincklaen Arriens
8 -- Delft University of Technology
9 -- Faculty EEMCS, Department ME&CE, Circuits and Systems
10 -- Date: September, 2010
12 -- Modified: September, 2013: Removed FSL, core customization
13 -- June, 2011: ALU_ACTION_Type extended to incorporate
14 -- MUL and BS instructions (Huib)
15 -- Adapted to work with separate fsl_M-
16 -- and fsl_S selectors and automatic
17 -- tumbl<_jtag><_fsl>.vhd generation (Huib)
18 -- July, 2011: function ef_nbits added (Huib)
21 --------------------------------------------------------------------------------
24 USE IEEE.std_logic_1164.all;
25 USE IEEE.std_logic_unsigned.all;
26 USE IEEE.numeric_std.all;
28 --------------------------------------------------------------------------------
30 --------------------------------------------------------------------------------
32 CONSTANT C_8_ZEROS : STD_LOGIC_VECTOR ( 7 DOWNTO 0) := X"00";
33 CONSTANT C_16_ZEROS : STD_LOGIC_VECTOR (15 DOWNTO 0) := X"0000";
34 CONSTANT C_24_ZEROS : STD_LOGIC_VECTOR (23 DOWNTO 0) := X"000000";
35 CONSTANT C_32_ZEROS : STD_LOGIC_VECTOR (31 DOWNTO 0) := X"00000000";
37 CONSTANT C_16_ONES : STD_LOGIC_VECTOR (15 DOWNTO 0) := X"FFFF";
38 CONSTANT C_24_ONES : STD_LOGIC_VECTOR (23 DOWNTO 0) := X"FFFFFF";
41 ----------------------------------------------------------------------------------------------
43 ----------------------------------------------------------------------------------------------
45 TYPE ALU_ACTION_Type IS (A_NOP, A_ADD, A_CMP, A_CMPU, A_OR, A_AND, A_XOR,
46 A_SHIFT, A_SEXT8, A_SEXT16, A_MFS, A_MTS, A_MUL,
47 A_BSLL, A_BSRL, A_BSRA);
48 TYPE ALU_IN1_Type IS (ALU_IN_REGA, ALU_IN_NOT_REGA, ALU_IN_PC, ALU_IN_ZERO);
49 TYPE ALU_IN2_Type IS (ALU_IN_REGB, ALU_IN_NOT_REGB, ALU_IN_IMM, ALU_IN_NOT_IMM);
50 TYPE ALU_CIN_Type IS (CIN_ZERO, CIN_ONE, FROM_MSR, FROM_IN1);
51 TYPE MSR_ACTION_Type IS (UPDATE_CARRY, KEEP_CARRY);
52 TYPE BRANCH_ACTION_Type IS (NO_BR, BR, BRL);
53 TYPE IT_ACTION_Type IS (NO_IT, IT, ITT, ITE);
54 TYPE WRB_ACTION_Type IS (NO_WRB, WRB_EX, WRB_MEM);
55 TYPE MEM_ACTION_Type IS (NO_MEM, WR_MEM, RD_MEM);
56 TYPE TRANSFER_SIZE_Type IS (WORD, HALFWORD, BYTE);
57 TYPE SAVE_REG_Type IS (NO_SAVE, SAVE_RA, SAVE_RB);
58 TYPE COND_Type IS (COND_ALL, COND_EQ, COND_NE, COND_LT, COND_LE, COND_GT, COND_GE);
60 TYPE IF2ID_Type IS RECORD
61 program_counter : STD_LOGIC_VECTOR (31 DOWNTO 0);
64 TYPE ID2EX_Type IS RECORD
65 program_counter : STD_LOGIC_VECTOR (31 DOWNTO 0);
66 rdix_rA : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
67 rdix_rB : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
68 curr_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
69 alu_Action : ALU_ACTION_Type;
70 alu_Op1 : ALU_IN1_Type;
71 alu_Op2 : ALU_IN2_Type;
72 alu_Cin : ALU_CIN_Type;
73 IMM16 : STD_LOGIC_VECTOR (15 DOWNTO 0);
75 msr_Action : MSR_ACTION_Type;
76 branch_Action : BRANCH_ACTION_Type;
77 it_Action : IT_ACTION_Type;
78 mem_Action : MEM_ACTION_Type; -- rd_mem implies writeback
79 transfer_Size : TRANSFER_SIZE_Type;
80 wrb_Action : WRB_ACTION_Type;
81 condition : COND_Type;
85 TYPE ID2GPRF_Type IS RECORD
86 rdix_rA : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
87 rdix_rB : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
88 rdix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
91 TYPE INT_CTRL_Type IS RECORD
92 setup_int : STD_LOGIC;
93 rti_target : STD_LOGIC_VECTOR (31 DOWNTO 0);
97 TYPE ID2CTRL_Type IS RECORD
102 TYPE GPRF2EX_Type IS RECORD
103 data_rA : STD_LOGIC_VECTOR (31 DOWNTO 0);
104 data_rB : STD_LOGIC_VECTOR (31 DOWNTO 0);
105 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
108 TYPE IMM_LOCK_Type IS RECORD
110 IMM_hi16 : STD_LOGIC_VECTOR (15 DOWNTO 0);
113 TYPE MSR_Type IS RECORD
114 IE : STD_LOGIC; -- MSR[VHDL b1] = [MicroBlaze b30]
115 C : STD_LOGIC; -- MSR[VHDL b2 and b31] = [MicroBlaze b29 and b0]
118 TYPE EX2IF_Type IS RECORD
119 take_branch : STD_LOGIC;
120 branch_target : STD_LOGIC_VECTOR (31 DOWNTO 0);
123 TYPE EX2CTRL_Type IS RECORD
124 flush_first : STD_LOGIC;
125 flush_second : STD_LOGIC;
126 ignore_state : STD_LOGIC;
129 TYPE HALT_Type IS RECORD
131 halt_code : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
134 TYPE EX2MEM_Type IS RECORD
135 mem_Action : MEM_ACTION_Type; -- RD_MEM implies writeback
136 wrb_Action : WRB_ACTION_Type;
137 exeq_result : STD_LOGIC_VECTOR (31 DOWNTO 0);
138 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
139 byte_Enable : STD_LOGIC_VECTOR ( 3 DOWNTO 0);
140 wrix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
143 TYPE WRB_Type IS RECORD
144 wrb_Action : WRB_ACTION_Type;
145 wrix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
146 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
149 TYPE HAZARD_WRB_Type IS RECORD
151 save_rX : SAVE_REG_Type;
152 data_rX : STD_LOGIC_VECTOR (31 DOWNTO 0);
153 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
156 TYPE MEM_REG_Type IS RECORD
157 wrb_Action : WRB_ACTION_Type;
158 exeq_result : STD_LOGIC_VECTOR (31 DOWNTO 0);
159 byte_Enable : STD_LOGIC_VECTOR ( 3 DOWNTO 0);
160 wrix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
163 TYPE MEM2CTRL_Type IS RECORD
168 TYPE CORE2DMEMB_Type IS RECORD
170 addr : STD_LOGIC_VECTOR (31 DOWNTO 0);
171 bSel : STD_LOGIC_VECTOR ( 3 DOWNTO 0);
173 data : STD_LOGIC_VECTOR (31 DOWNTO 0);
176 TYPE DMEMB2CORE_Type IS RECORD
178 data : STD_LOGIC_VECTOR (31 DOWNTO 0);
182 TYPE MEMORY_MAP_Type IS ARRAY(NATURAL RANGE <>) OF STD_LOGIC_VECTOR (31 DOWNTO 0);
183 -- NOTE: Use the named association format xxxx := ( 0 => X"A0010000" );
184 -- in case the array has to contain only one element !!
186 ----------------------------------------------------------------------------------------------
188 ----------------------------------------------------------------------------------------------
193 prog_cntr_i : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
194 inc_pc_i : IN STD_LOGIC;
195 EX2IF_i : IN EX2IF_Type;
196 IF2ID_o : OUT IF2ID_Type
203 USE_HW_MUL_g : BOOLEAN := TRUE;
204 USE_BARREL_g : BOOLEAN := TRUE;
205 COMPATIBILITY_MODE_g : BOOLEAN := FALSE
209 IF2ID_i : IN IF2ID_Type;
210 imem_data_i : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
212 ID2GPRF_o : OUT ID2GPRF_Type;
213 ID2EX_o : OUT ID2EX_Type;
215 INT_CTRL_i : IN INT_CTRL_Type;
216 ID2CTRL_o : OUT ID2CTRL_Type
223 USE_HW_MUL_g : BOOLEAN := FALSE;
224 USE_BARREL_g : BOOLEAN := FALSE;
225 COMPATIBILITY_MODE_g : BOOLEAN := FALSE
229 IF2ID_i : IN IF2ID_Type;
231 ID2EX_i : IN ID2EX_Type;
232 delayBit_i : IN STD_LOGIC;
233 GPRF2EX_i : IN GPRF2EX_Type;
234 EX2IF_o : OUT EX2IF_Type;
235 EX2CTRL_o : OUT EX2CTRL_Type;
236 HALT_o : OUT HALT_Type;
238 EX_WRB_i : IN WRB_Type;
239 EX_WRB_o : OUT WRB_Type;
240 MEM_WRB_i : IN WRB_Type;
242 HAZARD_WRB_i : IN HAZARD_WRB_Type;
243 HAZARD_WRB_o : OUT HAZARD_WRB_Type;
245 IMM_LOCK_i : IN IMM_LOCK_Type;
246 IMM_LOCK_o : OUT IMM_LOCK_Type;
249 MSR_o : OUT MSR_Type;
251 EX2MEM_o : OUT EX2MEM_Type
258 EX2MEM_i : IN EX2MEM_Type;
260 DMEMB_i : IN DMEMB2CORE_Type;
261 DMEMB_o : OUT CORE2DMEMB_Type;
263 MEM_REG_i : IN MEM_REG_Type;
264 MEM_REG_o : OUT MEM_REG_Type;
266 MEM_WRB_o : OUT WRB_Type;
267 MEM2CTRL_o : OUT MEM2CTRL_Type
271 COMPONENT core_ctrl IS
274 COMPATIBILITY_MODE_g : BOOLEAN := FALSE
278 clk_i : IN STD_LOGIC;
279 rst_i : IN STD_LOGIC;
280 halt_i : IN STD_LOGIC;
281 int_i : IN STD_LOGIC;
282 trace_i : IN STD_LOGIC;
283 trace_kick_i : IN STD_LOGIC;
284 core_clken_o : OUT STD_LOGIC;
285 -- specific fetch i/o
286 imem_addr_o : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
287 imem_clken_o : OUT STD_LOGIC;
288 pc_ctrl_o : OUT STD_LOGIC;
289 -- fetch to decode pipeline registers
290 IF2ID_REG_i : IN IF2ID_Type;
291 IF2ID_REG_o : OUT IF2ID_Type;
292 -- decode to exeq pipeline registers
293 ID2EX_REG_i : IN ID2EX_Type;
294 ID2EX_REG_o : OUT ID2EX_Type;
295 delay_bit_o : OUT STD_LOGIC;
297 gprf_clken_o : OUT STD_LOGIC;
298 -- exeq to fetch feedback registers
299 EX2IF_REG_i : IN EX2IF_Type;
300 EX2IF_REG_o : OUT EX2IF_Type;
301 EX2CTRL_REG_i : IN EX2CTRL_Type;
302 -- exeq to core (halting)
303 exeq_halt_i : IN STD_LOGIC;
304 -- exeq to mem pipeline registers
305 EX2MEM_REG_i : IN EX2MEM_Type;
306 EX2MEM_REG_o : OUT EX2MEM_Type;
307 -- mem pipeline register
308 MEM_REG_i : IN MEM_REG_Type;
309 MEM_REG_o : OUT MEM_REG_Type;
310 -- decode control i/o
311 ID2CTRL_i : IN ID2CTRL_Type;
312 INT_CTRL_o : OUT INT_CTRL_Type;
314 EX_WRB_i : IN WRB_Type;
315 EX_WRB_o : OUT WRB_Type;
317 HAZARD_WRB_i : IN HAZARD_WRB_Type;
318 HAZARD_WRB_o : OUT HAZARD_WRB_Type;
319 -- for handling the 'IMM' instruction
320 IMM_LOCK_i : IN IMM_LOCK_Type;
321 IMM_LOCK_o : OUT IMM_LOCK_Type;
322 -- for handling the Machine Status Register
324 MSR_o : OUT MSR_Type;
326 MEM2CTRL_i : IN MEM2CTRL_Type
330 ----------------------------------------------------------------------------------------------
331 -- FUNCTION, PROCEDURE DECLARATIONS
332 ----------------------------------------------------------------------------------------------
334 PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
336 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
337 VARIABLE co : OUT STD_LOGIC );
339 PROCEDURE ep_add32nc ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
341 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0));
343 FUNCTION ef_nbits ( value : NATURAL ) RETURN POSITIVE;
347 ----------------------------------------------------------
348 PACKAGE BODY mbl_Pkg IS
349 ----------------------------------------------------------
351 PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
353 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
354 VARIABLE co : OUT STD_LOGIC ) IS
356 CONSTANT NBITS_LO_c : POSITIVE := 17;
357 CONSTANT NBITS_HI_c : POSITIVE := 32 -NBITS_LO_c;
358 VARIABLE tmp_lo_v : STD_LOGIC_VECTOR (NBITS_LO_c +1 DOWNTO 0);
359 VARIABLE tmp_hi0_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
360 VARIABLE tmp_hi1_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
362 tmp_lo_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(NBITS_LO_c -1 DOWNTO 0) & '1' ) +
363 UNSIGNED( '0' & b(NBITS_LO_c -1 DOWNTO 0) & ci ));
364 tmp_hi0_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
365 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '0'));
366 tmp_hi1_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
367 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '1'));
368 IF (tmp_lo_v(NBITS_LO_c +1) = '0') THEN
369 s := tmp_hi0_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
370 co := tmp_hi0_v(NBITS_HI_c +1);
372 s := tmp_hi1_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
373 co := tmp_hi1_v(NBITS_HI_c +1);
377 PROCEDURE ep_add32nc ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
379 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) ) IS
381 CONSTANT NBITS_LO_c : POSITIVE := 17;
382 CONSTANT NBITS_HI_c : POSITIVE := 32 -NBITS_LO_c;
383 VARIABLE tmp_lo_v : STD_LOGIC_VECTOR (NBITS_LO_c +1 DOWNTO 0);
384 VARIABLE tmp_hi0_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
385 VARIABLE tmp_hi1_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
387 tmp_lo_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(NBITS_LO_c -1 DOWNTO 0) & '1' ) +
388 UNSIGNED( '0' & b(NBITS_LO_c -1 DOWNTO 0) & ci ));
389 tmp_hi0_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
390 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '0'));
391 tmp_hi1_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
392 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '1'));
393 IF (tmp_lo_v(NBITS_LO_c +1) = '0') THEN
394 s := tmp_hi0_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
396 s := tmp_hi1_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
401 FUNCTION ef_nbits( value : NATURAL ) RETURN POSITIVE IS
402 VARIABLE temp_v : POSITIVE;
405 FOR i IN 1 TO INTEGER'HIGH LOOP
407 IF (temp_v > value) THEN
414 END PACKAGE BODY mbl_Pkg;