use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
-use work.mbl_pkg.all;
use work.lx_rocon_pkg.all;
-- IRC bus interconnect
architecture Behavioral of bus_irc is
- signal irc_o_s : IRC_OUTPUT_Array_Type(7 downto 0);
- signal reset_index_event_s : std_logic_vector(7 downto 0);
- signal reset_index_event2_s : std_logic_vector(7 downto 0);
- signal reset_ab_error_s : std_logic_vector(7 downto 0);
+ constant num_irc_c : positive := 8;
+
+ signal irc_o_s : IRC_OUTPUT_Array_Type(num_irc_c-1 downto 0);
+ signal irc_count_s : IRC_COUNT_OUTPUT_Array_Type((num_irc_c-1) downto 0);
+
+ signal reset_index_event_s : std_logic_vector(num_irc_c-1 downto 0);
+ signal reset_index_event2_s : std_logic_vector(num_irc_c-1 downto 0);
+ signal reset_ab_error_s : std_logic_vector(num_irc_c-1 downto 0);
signal state_o_s : std_logic_vector(3 downto 0);
signal state_o_r : std_logic_vector(3 downto 0);
--
begin
-irc0 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(0),
- reset_index_event_i => reset_index_event_s(0),
- reset_index_event2_i => reset_index_event2_s(0),
- reset_ab_error_i => reset_ab_error_s(0),
- irc_o => irc_o_s(0)
- );
-
-irc1 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(1),
- reset_index_event_i => reset_index_event_s(1),
- reset_index_event2_i => reset_index_event2_s(1),
- reset_ab_error_i => reset_ab_error_s(1),
- irc_o => irc_o_s(1)
- );
-
-irc2 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(2),
- reset_index_event_i => reset_index_event_s(2),
- reset_index_event2_i => reset_index_event2_s(2),
- reset_ab_error_i => reset_ab_error_s(2),
- irc_o => irc_o_s(2)
- );
-
-irc3 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(3),
- reset_index_event_i => reset_index_event_s(3),
- reset_index_event2_i => reset_index_event2_s(3),
- reset_ab_error_i => reset_ab_error_s(3),
- irc_o => irc_o_s(3)
- );
-
-irc4 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(4),
- reset_index_event_i => reset_index_event_s(4),
- reset_index_event2_i => reset_index_event2_s(4),
- reset_ab_error_i => reset_ab_error_s(4),
- irc_o => irc_o_s(4)
- );
-
-irc5 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(5),
- reset_index_event_i => reset_index_event_s(5),
- reset_index_event2_i => reset_index_event2_s(5),
- reset_ab_error_i => reset_ab_error_s(5),
- irc_o => irc_o_s(5)
- );
-
-irc6 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(6),
- reset_index_event_i => reset_index_event_s(6),
- reset_index_event2_i => reset_index_event2_s(6),
- reset_ab_error_i => reset_ab_error_s(6),
- irc_o => irc_o_s(6)
- );
-
-irc7 : irc_reader
- port map
- (
- clk_i => clk_i,
- reset_i => reset_s,
- irc_i => irc_i(7),
- reset_index_event_i => reset_index_event_s(7),
- reset_index_event2_i => reset_index_event2_s(7),
- reset_ab_error_i => reset_ab_error_s(7),
- irc_o => irc_o_s(7)
- );
+irc_generate: for i in 0 to num_irc_c-1 generate
+ irc : irc_reader
+ port map
+ (
+ clk_i => clk_i,
+ reset_i => reset_s,
+ irc_i => irc_i(i),
+ reset_index_event_i => reset_index_event_s(i),
+ reset_index_event2_i => reset_index_event2_s(i),
+ reset_ab_error_i => reset_ab_error_s(i),
+ irc_o => irc_o_s(i)
+ );
+
+ irc_count_s(i) <= irc_o_s(i).count;
+ end generate;
irc_proc : irc_proc_main
generic map
(
- num_irc_g => 8
+ num_irc_g => num_irc_c
)
port map
(
clk_i => clk_i,
reset_i => reset_s,
-- IRC
- irc_i(0) => irc_o_s(0).count,
- irc_i(1) => irc_o_s(1).count,
- irc_i(2) => irc_o_s(2).count,
- irc_i(3) => irc_o_s(3).count,
- irc_i(4) => irc_o_s(4).count,
- irc_i(5) => irc_o_s(5).count,
- irc_i(6) => irc_o_s(6).count,
- irc_i(7) => irc_o_s(7).count,
+ irc_i => irc_count_s,
irc_index_reset_o => reset_index_event_s,
-- BRAM
mem_clk_i => clk_i,
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
-use work.mbl_pkg.all;
use work.util_pkg.all;
use work.lx_rocon_pkg.all;
end if;
if skip_v = '0' then
- -- signed extension
- if count_v(7) = '1' then
- count_v(31 downto 8) := (others => '1');
- else
- count_v(31 downto 8) := (others => '0');
- end if;
-- calculate qs8
- ep_add32nc(count_v, not src_v, '1', res_v);
+ res_v(7 downto 0) := std_logic_vector(unsigned(count_v(7 downto 0)) -
+ unsigned(src_v(7 downto 0)));
-- extend it
count_v(7 downto 0) := res_v(7 downto 0);
end if;
-- add it back
- ep_add32nc(src_v, count_v, '0', res_v);
+ res_v := std_logic_vector(unsigned(src_v) + unsigned(count_v));
-- store it
ram_en_s <= '1';