RoCoN: check and stop on LX master receiver and MCC failures.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>

diff --git a/submodule/pxmc b/submodule/pxmc
index 8bff1e46cb2a0c2e6df32b8238f24184bdea817e..ca73319f32096bcb98ce40cb695100862a2fa813 160000 (submodule)
--- a/submodule/pxmc
+++ b/submodule/pxmc
@@ -1 +1 @@
-Subproject commit 8bff1e46cb2a0c2e6df32b8238f24184bdea817e
+Subproject commit ca73319f32096bcb98ce40cb695100862a2fa813

diff --git a/sw/app/rocon/appl_pxmc.c b/sw/app/rocon/appl_pxmc.c
index a7abedc1e86080da736250433f776388674a59d3..99c652f10050797d7ce47a7d0335d6782ae37ccf 100644 (file)
--- a/sw/app/rocon/appl_pxmc.c
+++ b/sw/app/rocon/appl_pxmc.c
@@ -135,6 +135,27 @@ void pxmc_rocon_rx_done_sqn_compute(void)
   pxmc_rocon_rx_done_sqn_missoffs = sqn_offs;
 }
 
+uint32_t pxmc_rocon_rx_err_cnt_last;
+uint32_t pxmc_rocon_rx_err_level;
+uint32_t pxmc_rocon_mcc_rx_done_sqn_last;
+uint32_t pxmc_rocon_mcc_stuck;
+
+static inline
+void pxmc_rocon_rx_error_check(void)
+{
+  uint32_t cnt;
+  uint32_t mcc_sqn;
+  pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
+
+  cnt = mcc_data->common.rx_err_cnt;
+  pxmc_rocon_rx_err_level = cnt - pxmc_rocon_rx_err_cnt_last;
+  pxmc_rocon_rx_err_cnt_last = cnt;
+
+  mcc_sqn = mcc_data->common.rx_done_sqn;
+  pxmc_rocon_mcc_stuck = mcc_sqn == pxmc_rocon_mcc_rx_done_sqn_last? 1: 0;
+  pxmc_rocon_mcc_rx_done_sqn_last = mcc_sqn;
+}
+
 const uint8_t onesin10bits[1024]={
   0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,
   1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,
@@ -992,6 +1013,11 @@ pxmc_pxmcc_pwm3ph_out(pxmc_state_t *mcs)
 
       pxmcc_cur_ctrl_pi(&pwm_d, &mcsrc->cur_d_err_sum, cur_d_err,
                       mcsrc->cur_d_p, mcsrc->cur_d_i, max_pwm);
+
+      if (pxmc_rocon_rx_err_level >= 2)
+        pxmc_set_errno(mcs, PXMS_E_WINDCURADC);
+      else if (pxmc_rocon_mcc_stuck)
+        pxmc_set_errno(mcs, PXMS_E_MCC_FAULT);
     }
 
     pxmcc_axis_pwm_dq_out(mcs, pwm_d, pwm_q);
@@ -1051,6 +1077,11 @@ pxmc_pxmcc_pwm2ph_out(pxmc_state_t *mcs)
 
       pxmcc_cur_ctrl_pi(&pwm_d, &mcsrc->cur_d_err_sum, cur_d_err,
                       mcsrc->cur_d_p, mcsrc->cur_d_i, max_pwm);
+
+      if (pxmc_rocon_rx_err_level >= 2)
+        pxmc_set_errno(mcs, PXMS_E_WINDCURADC);
+      else if (pxmc_rocon_mcc_stuck)
+        pxmc_set_errno(mcs, PXMS_E_MCC_FAULT);
     }
 
     pwm_q = (pxmc_rocon_pwm_magnitude * ene) >> 15;
@@ -1150,6 +1181,11 @@ pxmc_pxmcc_nofb2ph_out(pxmc_state_t *mcs)
 
     mcc_axis->steps_sqn_next = pxmc_rocon_rx_done_sqn +
                                pxmc_rocon_rx_done_sqn_inc - 1;
+
+    if (pxmc_rocon_rx_err_level >= 2)
+      pxmc_set_errno(mcs, PXMS_E_WINDCURADC);
+    else if (pxmc_rocon_mcc_stuck)
+      pxmc_set_errno(mcs, PXMS_E_MCC_FAULT);
   }
 
   return 0;
@@ -1285,6 +1321,7 @@ IRQ_HANDLER_FNC(pxmc_rocon_rx_done_isr)
 
     pxmc_rocon_rx_done_sqn_compute();
     pxmc_rocon_vin_compute();
+    pxmc_rocon_rx_error_check();
 
     if (pxmc_rocon_rx_data_hist_buff >= pxmc_rocon_rx_data_hist_buff_end)
       pxmc_rocon_rx_data_hist_buff = NULL;