RoCoN: USB CDC ACM use maximal packet length - 64 bytes.

[fpga/lx-cpu1/lx-rocon.git] / hw / bus_tumbl.vhd

diff --git a/hw/bus_tumbl.vhd b/hw/bus_tumbl.vhd
index 2496570c1edda5b1c6ccdc0c42199d504401c9a8..9e09ef9681d5977a8b92be0d6e4d2fe502e26777 100644 (file)
--- a/hw/bus_tumbl.vhd
+++ b/hw/bus_tumbl.vhd
@@ -53,7 +53,9 @@ architecture Behavioral of bus_tumbl is
 
        -- Internal memory signals
        signal imem_en_s     : std_logic;
+       signal imem_en_r     : std_logic;
        signal dmem_en_s     : std_logic;
+       signal dmem_en_r     : std_logic;
 
        signal imem_we_s     : std_logic_vector(3 downto 0);
        signal dmem_we_s     : std_logic_vector(3 downto 0);
@@ -61,6 +63,11 @@ architecture Behavioral of bus_tumbl is
        signal imem_data_o_s : std_logic_vector(31 downto 0);
        signal dmem_data_o_s : std_logic_vector(31 downto 0);
 
+       -- Control registers read access
+       signal tumbl_reg_en_control_r   : std_logic;
+       signal tumbl_reg_en_pc_r        : std_logic;
+       signal tumbl_reg_en_halt_code_r : std_logic;
+
        -- Internal bus structure
        -- 12 address bits: 2 bits for selection, 10 bits for address
        --
@@ -157,7 +164,9 @@ enabling: process(ce_i, address_i)
 -- Wiring
 wiring:
        process(ce_i, bls_i, address_i, imem_en_s, imem_data_o_s, dmem_en_s,
-                                                               dmem_data_o_s, tumbl_reset_s, tumbl_input_s, tumbl_state_s)
+               dmem_data_o_s, tumbl_reset_s, tumbl_input_s, tumbl_state_s,
+               imem_en_r, dmem_en_r, tumbl_reg_en_control_r, tumbl_reg_en_pc_r,
+               tumbl_reg_en_halt_code_r)
        begin
 
                if imem_en_s = '1' then
@@ -172,26 +181,22 @@ wiring:
                        dmem_we_s <= "0000";
                end if;
 
-               if imem_en_s = '1' then
+               if imem_en_r = '1' then
                        data_o <= imem_data_o_s;
-               elsif dmem_en_s = '1' then
+               elsif dmem_en_r = '1' then
                        data_o <= dmem_data_o_s;
-               elsif ce_i = '1' and address_i(11 downto 10) = "11" then
-                       if address_i(9 downto 0) = "0000000000" then
-                               data_o(0) <= tumbl_reset_s;
-                               data_o(1) <= tumbl_input_s.int;
-                               data_o(2) <= tumbl_input_s.halt;
-                               data_o(3) <= tumbl_input_s.trace;
-                               data_o(4) <= tumbl_state_s.halted;
-                               data_o(31 downto 5) <= (others => '0');
-                       elsif address_i(9 downto 0) = "0000000010" then
-                               data_o <= tumbl_state_s.pc;
-                       elsif address_i(9 downto 0) = "0000000011" then
-                               data_o(4 downto 0)  <= tumbl_state_s.halt_code;
-                               data_o(31 downto 5) <= (others => '0');
-                       else
-                               data_o <= (others => 'X');
-                       end if;
+               elsif tumbl_reg_en_control_r = '1' then
+                       data_o(0) <= tumbl_reset_s;
+                       data_o(1) <= tumbl_input_s.int;
+                       data_o(2) <= tumbl_input_s.halt;
+                       data_o(3) <= tumbl_input_s.trace;
+                       data_o(4) <= tumbl_state_s.halted;
+                       data_o(31 downto 5) <= (others => '0');
+               elsif tumbl_reg_en_pc_r = '1' then
+                       data_o <= tumbl_state_s.pc;
+               elsif tumbl_reg_en_halt_code_r = '1' then
+                       data_o(4 downto 0)  <= tumbl_state_s.halt_code;
+                       data_o(31 downto 5) <= (others => '0');
                else
                        data_o <= (others => 'X');
                end if;
@@ -206,6 +211,13 @@ update:
                -- Update
                wait until clk_i'event and clk_i = '1';
 
+               imem_en_r <= imem_en_s;
+               dmem_en_r <= dmem_en_s;
+
+               tumbl_reg_en_control_r   <= '0';
+               tumbl_reg_en_pc_r        <= '0';
+               tumbl_reg_en_halt_code_r <= '0';
+
                tumbl_input_s.trace_kick <= '0';
 
                if reset_i = '1' then
@@ -229,6 +241,15 @@ update:
                                                end if;
                                        end if;
                                end if;
+
+
+                               if address_i(9 downto 0) = "0000000000" then
+                                       tumbl_reg_en_control_r   <= '1';
+                               elsif address_i(9 downto 0) = "0000000010" then
+                                       tumbl_reg_en_pc_r        <= '1';
+                               elsif address_i(9 downto 0) = "0000000011" then
+                                       tumbl_reg_en_halt_code_r <= '1';
+                               end if;
                        end if;
                end if;