]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/blobdiff - hw/dff2.vhd
RoCoN: USB CDC ACM use maximal packet length - 64 bytes.
[fpga/lx-cpu1/lx-rocon.git] / hw / dff2.vhd
index c0d62dde99e4eb1a35505e2467bd77d1a805480d..a3d3c07a9d12caeb08ac261b5a129f3852161cd3 100644 (file)
@@ -3,6 +3,7 @@ use ieee.std_logic_1164.all;
 use ieee.std_logic_arith.all;
 use ieee.std_logic_unsigned.all;
 use ieee.numeric_std.all;
+use work.lx_rocon_pkg.all;
 
 -- D circuit (filtered)
 
@@ -10,33 +11,34 @@ entity dff2 is
   port
        (
     clk_i   : in std_logic;
-               reset_i : in std_logic;
     d_i     : in std_logic;
     q_o     : out std_logic
   );
 end dff2;
 
 architecture behavioral of dff2 is
-       signal last_d_s : std_logic;
+       signal d_2r   : std_logic;
+       signal d_r    : std_logic;
   signal data_s : std_logic;
+
+       -- XST attributes
+  attribute REGISTER_DUPLICATION : string;
+       attribute REGISTER_DUPLICATION of d_2r : signal is "NO";
+       attribute REGISTER_DUPLICATION of d_r  : signal is "NO";
+
 begin
   q_o <= data_s;
 
 seq:
-       process(clk_i)
+       process
        begin
-    if clk_i = '1' and clk_i'event then
-                       if reset_i = '1' then
-                               last_d_s <= '0';
-                               data_s <= '0';
-                       else
-                               if d_i = last_d_s then
-                                       data_s <= d_i;
-                               end if;
-                       end if;
-
-                       last_d_s <= d_i;
+    wait until clk_i'event and clk_i = '1';
+               if d_2r = d_r then
+                       data_s <= d_r;
                end if;
+
+               d_2r    <= d_r;
+               d_r     <= d_i;
   end process;
 
 end behavioral;