signal count_index_s : std_logic_vector (7 downto 0);
begin
-dff_a: dff2
+dff_a: dff3
port map
(
clk_i => clk_i,
- reset_i => '0',
d_i => a0_i,
q_o => a_s
);
- dff_b: dff2
+ dff_b: dff3
port map
(
clk_i => clk_i,
- reset_i => '0',
d_i => b0_i,
q_o => b_s
);
-dff_index: dff2
+dff_index: dff3
port map
(
clk_i => clk_i,
- reset_i => '0',
d_i => index0_i,
q_o => index_s
);
index_event_v := '1';
end if;
--
- if reset_index_event_i = '1' then
- index_event_int_s <= '0';
- else
- index_event_int_s <= index_event_int_s or index_event_v;
- end if;
+ index_event_int_s <= (index_event_int_s and not reset_index_event_i) or
+ index_event_v;
--
- if reset_index_event2_i = '1' then
- index_event2_int_s <= '0';
- else
- index_event2_int_s <= index_event2_int_s or index_event_v;
- end if;
+ index_event2_int_s <= (index_event2_int_s and not reset_index_event2_i) or
+ reset_index_event_i;
--
- if reset_ab_error_i = '1' then
- ab_error_int_s <= '0';
- else
- ab_error_int_s <= ab_error_int_s or ab_error_s;
- end if;
+ ab_error_int_s <= (ab_error_int_s and not reset_ab_error_i) or ab_error_s;
--
count_prev_s <= count_s;
index_prev_s <= index_s;