-#include <types.h>
+#include <inttypes.h>
#include <cpu_def.h>
#include <system_def.h>
#include <string.h>
#include <stdio.h>
+#include <stdint.h>
#include <endian.h>
#include <usb/lpc.h>
#include <usb/usb.h>
#include <hal_machperiph.h>
#endif /*CONFIG_KEYVAL*/
+#ifdef CONFIG_OC_MTD_DRV_SYSLESS
+#include <mtd_spi_drv.h>
+#endif
+
#include <endian.h>
#if __BYTE_ORDER == __BIG_ENDIAN
#include <byteswap.h>
#define SWAP(x) (x)
#endif
-#define USB_VENDOR_TARGET_TUMBL 0x03
+#define USB_VENDOR_TARGET_TUMBL 0x03
+#define USB_VENDOR_TARGET_32BIT 0x04
+#define USB_VENDOR_TARGET_SPI_FLASH 0x05
-#define USB_CMD_FPGA_CONFIGURE 0xF000
-#define USB_CMD_FPGA_MEASURE_READ 0xF001
-#define USB_CMD_FPGA_MEASURE_WRITE 0xF002
+#define USB_CMD_FPGA_CONFIGURE 0xF000
+#define USB_CMD_FPGA_MEASURE_READ 0xF001
+#define USB_CMD_FPGA_MEASURE_WRITE 0xF002
-#define USB_CMD_FPGA_IRC_SET_RESET 0xF010
-#define USB_CMD_FPGA_IRC_DUMP 0xF011
+#define USB_CMD_FPGA_IRC_GET_RESET 0xF010
+#define USB_CMD_FPGA_IRC_SET_RESET 0xF011
+#define USB_CMD_FPGA_IRC_DUMP 0xF012
-#define USB_CMD_FPGA_LXMASTER_WRITE 0xF020
-#define USB_CMD_FPGA_LXMASTER_DUMP 0xF021
+#define USB_CMD_FPGA_LXMASTER_GET_RESET 0xF020
+#define USB_CMD_FPGA_LXMASTER_SET_RESET 0xF021
+#define USB_CMD_FPGA_LXMASTER_TRANSMITTER_GET_REG 0xF022
+#define USB_CMD_FPGA_LXMASTER_TRANSMITTER_SET_REG 0xF023
+#define USB_CMD_FPGA_LXMASTER_TRANSMITTER_WRITE 0xF024
+#define USB_CMD_FPGA_LXMASTER_TRANSMITTER_DUMP 0xF025
-#define USB_CMD_FPGA_TUMBL_SET_RESET 0xF100
-#define USB_CMD_FPGA_TUMBL_SET_HALT 0xF101
-#define USB_CMD_FPGA_TUMBL_SET_TRACE 0xF102
-#define USB_CMD_FPGA_TUMBL_KICK_TRACE 0xF103
-#define USB_CMD_FPGA_TUMBL_GET_PC 0xF104
+#define USB_CMD_FPGA_TUMBL_SET_RESET 0xF100
+#define USB_CMD_FPGA_TUMBL_SET_HALT 0xF101
+#define USB_CMD_FPGA_TUMBL_SET_TRACE 0xF102
+#define USB_CMD_FPGA_TUMBL_KICK_TRACE 0xF103
+#define USB_CMD_FPGA_TUMBL_GET_PC 0xF104
-#define USB_CMD_FPGA_TUMBL_DUMP_IMEM 0xF200
-#define USB_CMD_FPGA_TUMBL_DUMP_DMEM 0xF201
+#define USB_CMD_FPGA_TUMBL_DUMP_IMEM 0xF200
+#define USB_CMD_FPGA_TUMBL_DUMP_DMEM 0xF201
-#define USB_CMD_FPGA_RESET 0xFFFF
+#define USB_CMD_FPGA_RESET 0xFFFF
usb_device_t usb_device;
usb_ep_t eps[NUM_ENDPOINTS];
#define MASK_EP1RX 0x01
#define MASK_EP1TX 0x02
-unsigned char ep1_rx_buff[USB_MAX_PACKET];
-unsigned char ep1_tx_buff[USB_MAX_PACKET];
-unsigned char ep0_buffer[USB_MAX_PACKET0];
+unsigned char ep1_rx_buff[USB_MAX_PACKET] __attribute__ ((aligned (8)));
+unsigned char ep1_tx_buff[USB_MAX_PACKET] __attribute__ ((aligned (8)));
+unsigned char ep0_buffer[USB_MAX_PACKET0] __attribute__ ((aligned (8)));
int usb_active = 0;
int ep1_rx_index = 0, ep1_rx_ready = 1;
int ep1_tx_index = 0, ep1_tx_chars = 0;
static int usb_tumbl_pkt_wr(struct usb_ep_t *ep, int len, int code)
{
unsigned char *ptr = ep->ptr - len;
-
- appl_fpga_tumbl_write(ep->user_data, ptr, len);
-
+
+ fpga_tumbl_write(ep->user_data, ptr, len);
+
ep->user_data += len;
ep->ptr = ep0_buffer;
return USB_COMPLETE_OK;
}
+static int usb_32bit_pkt_wr(struct usb_ep_t *ep, int len, int code)
+{
+ uint32_t *srcptr = (uint32_t *)(ep->ptr - len);
+ volatile uint32_t *dstptr = (uint32_t *)ep->user_data;
+ int pos;
+
+ for (pos = 0; len - pos >= 4; pos += 4, dstptr++, srcptr++)
+ *dstptr = *srcptr;
+
+ ep->user_data += len;
+ ep->ptr = ep0_buffer;
+ return USB_COMPLETE_OK;
+}
+
+int usb_32bit_pkt_rd(struct usb_ep_t *ep, int len, int code)
+{
+ volatile uint32_t *srcptr;
+ uint32_t *dstptr;
+ int pos;
+
+ ep->ptr = ep0_buffer;
+ dstptr = (uint32_t *)ep->ptr;
+ srcptr = (uint32_t *)ep->user_data;
+
+ for (pos = 0; len - pos >= 4; pos += 4, dstptr++, srcptr++)
+ *dstptr = *srcptr;
+
+ ep->user_data += len;
+ return USB_COMPLETE_OK;
+}
+
static int usb_flash_erase(unsigned addr, unsigned len)
{
#ifdef CONFIG_KEYVAL
return 0;
}
+static int usb_spi_flash_pkt_wr(struct usb_ep_t *ep, int len, int code)
+{
+ unsigned char *ptr = ep->ptr - len;
+
+#ifdef CONFIG_OC_MTD_DRV_SYSLESS
+ mtd_spi_write(&mtd_spi_state, ptr, len, ep->user_data, 0);
+#endif /*CONFIG_KEYVAL*/
+
+ ep->user_data += len;
+ ep->ptr = ep0_buffer;
+ return USB_COMPLETE_OK;
+}
+
+int usb_spi_flash_pkt_rd(struct usb_ep_t *ep, int len, int code)
+{
+ ep->ptr = ep0_buffer;
+#ifdef CONFIG_OC_MTD_DRV_SYSLESS
+ mtd_spi_read(&mtd_spi_state, ep->ptr, len, ep->user_data, 0);
+#endif /*CONFIG_KEYVAL*/
+
+ ep->user_data += len;
+ return USB_COMPLETE_OK;
+}
+
+int usb_spi_flash_mass_erase(int mode)
+{
+#ifdef CONFIG_OC_MTD_DRV_SYSLESS
+ mtd_spi_set_protect_mode(&mtd_spi_state, 0, 0);
+ mtd_spi_chip_erase(&mtd_spi_state, mode, 0);
+#endif /*CONFIG_KEYVAL*/
+ return 0;
+}
+
static void usb_goto(unsigned address)
{
#ifdef CONFIG_KEYVAL
uint16_t appl_usb_vendor_call(uint16_t command, uint16_t argument)
{
int i, j;
-
+
switch (command)
{
case USB_CMD_FPGA_CONFIGURE:
- return appl_fpga_configure();
+ return fpga_configure();
case USB_CMD_FPGA_MEASURE_READ:
- return appl_fpga_measure_bus_read();
+ return fpga_measure_bus_read();
case USB_CMD_FPGA_MEASURE_WRITE:
- return appl_fpga_measure_bus_write();
+ return fpga_measure_bus_write();
+
+ case USB_CMD_FPGA_IRC_GET_RESET:
+ printf("IRC RESET: 0x%02x\n", *fpga_irc_reset);
+ return 0;
case USB_CMD_FPGA_IRC_SET_RESET:
/* When starting, zero out counters */
- *irc_reset = argument & 0x0001;
+ *fpga_irc_reset = argument & 0x0001;
return 0;
case USB_CMD_FPGA_IRC_DUMP:
- printf("IRC1: count = %d, count index = %d, state = 0x%02x\n", (unsigned int) irc1->count, (unsigned int) irc1->count_index, (unsigned int)(*irc1_state));
- printf("IRC2: count = %d, count index = %d, state = 0x%02x\n", (unsigned int) irc2->count, (unsigned int) irc2->count_index, (unsigned int)(*irc2_state));
- printf("IRC3: count = %d, count index = %d, state = 0x%02x\n", (unsigned int) irc3->count, (unsigned int) irc3->count_index, (unsigned int)(*irc3_state));
- printf("IRC4: count = %d, count index = %d, state = 0x%02x\n", (unsigned int) irc4->count, (unsigned int) irc4->count_index, (unsigned int)(*irc4_state));
+ for (i = 0; i < 8; i++)
+ printf("IRC%d: count = %d, count index = %d, mark = %d, ab_error = %d, index_event = %d, index = %d\n", i+1,
+ (unsigned int) fpga_irc[i]->count, (unsigned int) fpga_irc[i]->count_index, ((*(fpga_irc_state[i])) & 0x01) != 0,
+ ((*(fpga_irc_state[i])) & 0x02) != 0, ((*(fpga_irc_state[i])) & 0x04) != 0, ((*(fpga_irc_state[i])) & 0x08) != 0);
return 0;
- case USB_CMD_FPGA_LXMASTER_WRITE:
+ case USB_CMD_FPGA_LXMASTER_GET_RESET:
+ printf("LXMASTER RESET: 0x%02"PRIx32"\n", *fpga_lx_master_reset);
+ return 0;
+
+ case USB_CMD_FPGA_LXMASTER_SET_RESET:
+ /* When starting, zero out counters */
+ *fpga_lx_master_reset = argument & 0x0001;
+ return 0;
+
+ case USB_CMD_FPGA_LXMASTER_TRANSMITTER_GET_REG:
+ printf("LXMASTER TRANSMITTER REG: 0x%02"PRIx32"\n", *fpga_lx_master_transmitter_reg);
+ return 0;
+
+ case USB_CMD_FPGA_LXMASTER_TRANSMITTER_SET_REG:
+ /* When starting, zero out counters */
+ *fpga_lx_master_transmitter_reg = argument & 0x0001;
+ return 0;
+
+ case USB_CMD_FPGA_LXMASTER_TRANSMITTER_WRITE:
for (i = 0; i < (argument / 4); i++)
- lx_master_base[i] = lx_master_conf[i];
+ fpga_lx_master_transmitter_base[i] = fpga_lx_master_conf[i];
return 0;
- case USB_CMD_FPGA_LXMASTER_DUMP:
- printf("LX MASTER MEM:\n");
+ case USB_CMD_FPGA_LXMASTER_TRANSMITTER_DUMP:
+ printf("LX MASTER TRANSMITTER MEM:\n");
for (i = 0; i < 16; i++)
{
- for (j = 0; j < 16; j++)
- printf("%04X ", (unsigned int) (lx_master_base[i*16 + j] & 0xFFFF));
+ for (j = 0; j < 16; j++)
+ printf("%04X ", (unsigned int) (fpga_lx_master_transmitter_base[i*16 + j] & 0xFFFF));
- printf("\n");
+ printf("\n");
}
return 0;
case USB_CMD_FPGA_TUMBL_SET_RESET:
- return appl_fpga_tumbl_set_reset(argument);
-
+ return fpga_tumbl_set_reset(argument);
+
case USB_CMD_FPGA_TUMBL_SET_HALT:
- return appl_fpga_tumbl_set_halt(argument);
-
+ return fpga_tumbl_set_halt(argument);
+
case USB_CMD_FPGA_TUMBL_SET_TRACE:
- return appl_fpga_tumbl_set_trace(argument);
-
+ return fpga_tumbl_set_trace(argument);
+
case USB_CMD_FPGA_TUMBL_KICK_TRACE:
- return appl_fpga_tumbl_kick_trace();
-
+ return fpga_tumbl_kick_trace();
+
case USB_CMD_FPGA_TUMBL_GET_PC:
- printf("Tubml PC: 0x%08X\n", (unsigned int) *tumbl_pc);
+ printf("Tubml PC: 0x%08X\n", (unsigned int) *fpga_tumbl_pc);
return 0;
-
+
case USB_CMD_FPGA_TUMBL_DUMP_IMEM:
printf("TUMBL IMEM:\n");
for (i = 0; i < 64; i++)
- {
+ {
for (j = 0; j < 8; j++)
- printf("%08X ", (unsigned int) tumbl_imem[i*8 + j]);
-
+ printf("%08X ", (unsigned int) fpga_tumbl_imem[i*8 + j]);
+
printf("\n");
}
return 0;
-
+
case USB_CMD_FPGA_TUMBL_DUMP_DMEM:
printf("TUMBL DMEM:\n");
for (i = 0; i < 128; i++)
{
for (j = 0; j < 8; j++)
- printf("%08X ", (unsigned int) tumbl_dmem[i*8 + j]);
-
+ printf("%08X ", (unsigned int) fpga_tumbl_dmem[i*8 + j]);
+
printf("\n");
}
return 0;
-
+
case USB_CMD_FPGA_RESET:
hal_gpio_direction_output(XC_INIT_PIN, 0);
usb_flash_erase((uint32_t)dreq->wValue << 10, dreq->wIndex << 10);
return 1;
+ case USB_VENDOR_MASS_ERASE:
+ usb_send_control_data(udev, NULL, 0);
+ if (dreq->wIndex == 5)
+ usb_spi_flash_mass_erase(dreq->wValue);
+ return 1;
+
case USB_VENDOR_CALL:
vendor_call_ret = SWAP(appl_usb_vendor_call(dreq->wIndex, dreq->wValue));
usb_send_control_data(udev, (unsigned char *) &vendor_call_ret, sizeof(uint16_t));
udev->ep0.user_data = addr;
udev->ep0.ptr = ep0_buffer;
break;
-
+
case USB_VENDOR_TARGET_TUMBL:
udev->ep0.next_pkt_fnc = usb_tumbl_pkt_wr;
udev->ep0.user_data = addr;
udev->ep0.ptr = ep0_buffer;
break;
+ case USB_VENDOR_TARGET_32BIT:
+ udev->ep0.next_pkt_fnc = usb_32bit_pkt_wr;
+ udev->ep0.user_data = addr;
+ udev->ep0.ptr = ep0_buffer;
+ break;
+
+ case USB_VENDOR_TARGET_SPI_FLASH:
+ udev->ep0.next_pkt_fnc = usb_spi_flash_pkt_wr;
+ udev->ep0.user_data = addr;
+ udev->ep0.ptr = ep0_buffer;
+ break;
+
default:
return -1;
}
usb_send_control_data(udev, (void *)addr, len);
break;
+ case USB_VENDOR_TARGET_32BIT:
+ udev->ep0.next_pkt_fnc = usb_32bit_pkt_rd;
+ udev->ep0.user_data=addr;
+ usb_send_control_data( udev, ep0_buffer, len);
+ break;
+
+ case USB_VENDOR_TARGET_SPI_FLASH:
+ udev->ep0.next_pkt_fnc = usb_spi_flash_pkt_rd;
+ udev->ep0.user_data=addr;
+ usb_send_control_data( udev, ep0_buffer, len);
+ break;
+
default:
return -1;
}