]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/gcc-tumbl.git/commitdiff
Backport from mainline:
authorwalt <walt@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 26 Mar 2013 06:36:20 +0000 (06:36 +0000)
committerwalt <walt@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 26 Mar 2013 06:36:20 +0000 (06:36 +0000)
2013-03-26  Walter Lee  <walt@tilera.com>

* config/tilegx/tilegx.h (PROFILE_BEFORE_PROLOGUE): Define.
* config/tilegx/tilepro.h (PROFILE_BEFORE_PROLOGUE): Define.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@197093 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/tilegx/tilegx.h
gcc/config/tilepro/tilepro.h

index bf5e577368675f534d878a62ba722e8be80bc89f..c7073f748dc52a33ad4f29be1095bd2ca8effd55 100644 (file)
@@ -1,3 +1,11 @@
+2013-03-26  Walter Lee  <walt@tilera.com>
+
+       Backport from mainline:
+       2013-03-26  Walter Lee  <walt@tilera.com>
+
+       * config/tilegx/tilegx.h (PROFILE_BEFORE_PROLOGUE): Define.
+       * config/tilegx/tilepro.h (PROFILE_BEFORE_PROLOGUE): Define.
+
 2013-03-26  Walter Lee  <walt@tilera.com>
 
        Backport from mainline:
index 081ecc1756af6afc163bd2e40b7d49ab065f4b88..2dbbb81fcb27c7465c147717e808cd497c23e1e6 100644 (file)
@@ -285,6 +285,8 @@ enum reg_class
 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
   ((OFFSET) = tilegx_initial_elimination_offset((FROM),(TO)))
 
+#define PROFILE_BEFORE_PROLOGUE 1
+
 #define FUNCTION_PROFILER(FILE, LABELNO) \
   tilegx_function_profiler (FILE, LABELNO)
 
index 930612d1fb4a5b9faf951e3e70bac20ad18e6129..88a0826f160255ed308ff501c8567c7b1aecbb49 100644 (file)
@@ -268,6 +268,8 @@ enum reg_class
 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
   ((OFFSET) = tilepro_initial_elimination_offset((FROM),(TO)))
 
+#define PROFILE_BEFORE_PROLOGUE 1
+
 #define FUNCTION_PROFILER(FILE, LABELNO) \
   tilepro_function_profiler (FILE, LABELNO)