4 // Description: Header file for TI MSC1210 microcontroller
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6 #ifndef __REG1210_H__
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7 #define __REG1210_H__
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37 sbit at 0x90+7 INT5;
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38 sbit at 0x90+7 SCK;
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39 sbit at 0x90+6 INT4;
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40 sbit at 0x90+6 MISO;
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41 sbit at 0x90+5 INT3;
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42 sbit at 0x90+5 MOSI;
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43 sbit at 0x90+4 INT2;
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45 sbit at 0x90+3 TXD1;
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46 sbit at 0x90+2 RXD1;
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47 sbit at 0x90+1 T2EX;
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56 sbit at 0x98+7 SM0_0;
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57 sbit at 0x98+6 SM1_0;
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58 sbit at 0x98+5 SM2_0;
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59 sbit at 0x98+4 REN_0;
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60 sbit at 0x98+3 TB8_0;
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61 sbit at 0x98+2 RB8_0;
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62 sbit at 0x98+1 TI_0;
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64 sbit at 0x98+0 RI_0;
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69 sfr at 0x9B SPIDATA;
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70 sfr at 0x9C SPIRCON;
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71 sfr at 0x9D SPITCON;
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72 sfr at 0x9E SPISTART;
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102 sbit at 0xB0+3 INT1;
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103 sbit at 0xB0+2 INT0;
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104 sbit at 0xB0+1 TXD;
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105 sbit at 0xB0+1 TXD0;
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106 sbit at 0xB0+0 RXD;
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107 sbit at 0xB0+0 RXD0;
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108 sfr at 0xB1 P2DDRL;
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109 sfr at 0xB2 P2DDRH;
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110 sfr at 0xB3 P3DDRL;
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111 sfr at 0xB4 P3DDRH;
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113 sbit at 0xB8+6 PS1;
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114 sbit at 0xB8+5 PT2;
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116 sbit at 0xB8+4 PS0;
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117 sbit at 0xB8+3 PT1;
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118 sbit at 0xB8+2 PX1;
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119 sbit at 0xB8+1 PT0;
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120 sbit at 0xB8+0 PX0;
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122 sbit at 0xc0+7 SM0_1;
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123 sbit at 0xc0+6 SM1_1;
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124 sbit at 0xc0+5 SM2_1;
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125 sbit at 0xc0+4 REN_1;
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126 sbit at 0xc0+3 TB8_1;
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127 sbit at 0xc0+2 RB8_1;
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128 sbit at 0xc0+1 TI_1;
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129 sbit at 0xc0+0 RI_1;
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133 sbit at 0xC8+7 TF2;
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134 sbit at 0xC8+6 EXF2;
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135 sbit at 0xC8+5 RCLK;
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136 sbit at 0xC8+4 TCLK;
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137 sbit at 0xC8+3 EXEN2;
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138 sbit at 0xC8+2 TR2;
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139 sbit at 0xC8+1 C_T2;
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140 sbit at 0xC8+0 CP_RL2;
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141 sfr at 0xCA RCAP2L;
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142 sfr at 0xCB RCAP2H;
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149 sbit at 0xD0+4 RS1;
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150 sbit at 0xD0+3 RS0;
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162 sbit at 0xD8+7 SMOD1;
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163 sbit at 0xD8+5 EAI;
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165 sbit at 0xD8+3 WDTI;
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166 sfr at 0xD9 ADRESL;
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167 sfr at 0xDA ADRESM;
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168 sfr at 0xDB ADRESH;
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169 sfr at 0xDC ADCON0;
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170 sfr at 0xDD ADCON1;
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171 sfr at 0xDE ADCON2;
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172 sfr at 0xDF ADCON3;
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180 sfr at 0xE7 LVDCON;
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182 sbit at 0xE8+4 EWDI;
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183 sbit at 0xE8+3 EX5;
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184 sbit at 0xE8+2 EX4;
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185 sbit at 0xE8+1 EX3;
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186 sbit at 0xE8+0 EX2;
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198 sbit at 0xF8+4 PWDI;
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199 sbit at 0xF8+3 PX5;
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200 sbit at 0xF8+2 PX4;
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201 sbit at 0xF8+1 PX3;
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202 sbit at 0xF8+0 PX2;
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203 sfr at 0xF9 SECINT;
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209 sfr at 0xFF WDTCON;
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211 /*-----------------*/
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212 /* Word Registers */
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213 /*-----------------*/
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215 sfr16 at 0xde DECIMATION;
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216 sfr16 at 0xcc THL2;
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217 sfr16 at 0xca RCAP2;
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218 sfr16 at 0xfc ONEMS;
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220 sfr16 at 0xac P0DDR;
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221 sfr16 at 0xae P1DDR;
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222 sfr16 at 0xb1 P2DDR;
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223 sfr16 at 0xb3 P3DDR;
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224 sfr16 at 0xaa BRKPT;
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227 #endif /*__REG1210_H__*/
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