]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/commitdiff
ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
authorNick Bowler <nbowler@elliptictech.com>
Mon, 5 Nov 2012 21:45:49 +0000 (16:45 -0500)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 7 Nov 2012 12:48:43 +0000 (13:48 +0100)
The main UART on the Xilinx ZC702 board is UART1, located at address
e0001000.  Add a Kconfig option to select this device as the low-level
debugging port.  This allows the really early boot printouts to reach
the USB serial adaptor on this board.

For consistency's sake, add a choice entry for UART0 even though it is
the the default if UART1 is not selected.

Signed-off-by: Nick Bowler <nbowler@elliptictech.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/Kconfig.debug
arch/arm/mach-zynq/common.c
arch/arm/mach-zynq/include/mach/zynq_soc.h

index b0f3857b3a4c647714a4d748726524e20f01bd4c..7754d51f2b19fc3f3be91355771de8b4569a7cef 100644 (file)
@@ -132,6 +132,23 @@ choice
                  their output to UART1 serial port on DaVinci TNETV107X
                  devices.
 
+       config DEBUG_ZYNQ_UART0
+               bool "Kernel low-level debugging on Xilinx Zynq using UART0"
+               depends on ARCH_ZYNQ
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to UART0 on the Zynq platform.
+
+       config DEBUG_ZYNQ_UART1
+               bool "Kernel low-level debugging on Xilinx Zynq using UART1"
+               depends on ARCH_ZYNQ
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to UART1 on the Zynq platform.
+
+                 If you have a ZC702 board and want early boot messages to
+                 appear on the USB serial adaptor, select this option.
+
        config DEBUG_DC21285_PORT
                bool "Kernel low-level debugging messages via footbridge serial port"
                depends on FOOTBRIDGE
index 6f058258b4916f3ba3901d50c03c34f892ea1853..f0eef848c0d0464bc798ea5f761eb25ba5f762e6 100644 (file)
@@ -85,9 +85,9 @@ static struct map_desc io_desc[] __initdata = {
 
 #ifdef CONFIG_DEBUG_LL
        {
-               .virtual        = UART0_VIRT,
-               .pfn            = __phys_to_pfn(UART0_PHYS),
-               .length         = UART0_SIZE,
+               .virtual        = LL_UART_VADDR,
+               .pfn            = __phys_to_pfn(LL_UART_PADDR),
+               .length         = UART_SIZE,
                .type           = MT_DEVICE,
        },
 #endif
index 1b8bf0ecbcb0c6f2dec279c52d0e88f5fb49d177..5ebbd8e6eeee6771b5bff400cc1a1b696c9561a9 100644 (file)
@@ -25,8 +25,9 @@
  * address that is known to work.
  */
 #define UART0_PHYS             0xE0000000
-#define UART0_SIZE             SZ_4K
-#define UART0_VIRT             0xF0001000
+#define UART1_PHYS             0xE0001000
+#define UART_SIZE              SZ_4K
+#define UART_VIRT              0xF0001000
 
 #define TTC0_PHYS              0xF8001000
 #define TTC0_SIZE              SZ_4K
 #define SCU_PERIPH_SIZE                SZ_8K
 #define SCU_PERIPH_VIRT                (TTC0_VIRT - SCU_PERIPH_SIZE)
 
+#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
+# define LL_UART_PADDR         UART1_PHYS
+#else
+# define LL_UART_PADDR         UART0_PHYS
+#endif
+
+#define LL_UART_VADDR          UART_VIRT
+
 /* The following are intended for the devices that are mapped early */
 
 #define TTC0_BASE                      IOMEM(TTC0_VIRT)
 #define SCU_PERIPH_BASE                        IOMEM(SCU_PERIPH_VIRT)
 
-#define LL_UART_PADDR  UART0_PHYS
-#define LL_UART_VADDR  UART0_VIRT
-
 #endif