2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
49 #define BRCMF_TRAP_INFO_SIZE 80
51 #define CBUF_LEN (128)
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
60 char *_buf_compat; /* Redundant pointer for backward compat. */
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
82 struct rte_log_le log_le;
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
95 #include <chipcommon.h>
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
212 * Software allocation of To SB Mailbox resources
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
225 * Software allocation of To Host Mailbox resources
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
247 * Software-defined protocol header
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
260 #define SDPCM_NEXTLEN_OFFSET 2
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
326 #define BRCMF_IDLE_INTERVAL 1
329 * Conversion of 802.1D priority to precedence level
331 static uint prio2prec(u32 prio)
333 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
339 u32 corecontrol; /* 0x00, rev8 */
340 u32 corestatus; /* rev8 */
342 u32 biststatus; /* rev8 */
345 u16 pcmciamesportaladdr; /* 0x010, rev8 */
347 u16 pcmciamesportalmask; /* rev8 */
349 u16 pcmciawrframebc; /* rev8 */
351 u16 pcmciaunderflowtimer; /* rev8 */
355 u32 intstatus; /* 0x020, rev8 */
356 u32 hostintmask; /* rev8 */
357 u32 intmask; /* rev8 */
358 u32 sbintstatus; /* rev8 */
359 u32 sbintmask; /* rev8 */
360 u32 funcintmask; /* rev4 */
362 u32 tosbmailbox; /* 0x040, rev8 */
363 u32 tohostmailbox; /* rev8 */
364 u32 tosbmailboxdata; /* rev8 */
365 u32 tohostmailboxdata; /* rev8 */
367 /* synchronized access to registers in SDIO clock domain */
368 u32 sdioaccess; /* 0x050, rev8 */
371 /* PCMCIA frame control */
372 u8 pcmciaframectrl; /* 0x060, rev8 */
374 u8 pcmciawatermark; /* rev8 */
377 /* interrupt batching control */
378 u32 intrcvlazy; /* 0x100, rev8 */
382 u32 cmd52rd; /* 0x110, rev8 */
383 u32 cmd52wr; /* rev8 */
384 u32 cmd53rd; /* rev8 */
385 u32 cmd53wr; /* rev8 */
386 u32 abort; /* rev8 */
387 u32 datacrcerror; /* rev8 */
388 u32 rdoutofsync; /* rev8 */
389 u32 wroutofsync; /* rev8 */
390 u32 writebusy; /* rev8 */
391 u32 readwait; /* rev8 */
392 u32 readterm; /* rev8 */
393 u32 writeterm; /* rev8 */
395 u32 clockctlstatus; /* rev8 */
398 u32 PAD[128]; /* DMA engines */
400 /* SDIO/PCMCIA CIS region */
401 char cis[512]; /* 0x400-0x5ff, rev6 */
403 /* PCMCIA function control registers */
404 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
407 /* PCMCIA backplane access */
408 u16 backplanecsr; /* 0x76E, rev6 */
409 u16 backplaneaddr0; /* rev6 */
410 u16 backplaneaddr1; /* rev6 */
411 u16 backplaneaddr2; /* rev6 */
412 u16 backplaneaddr3; /* rev6 */
413 u16 backplanedata0; /* rev6 */
414 u16 backplanedata1; /* rev6 */
415 u16 backplanedata2; /* rev6 */
416 u16 backplanedata3; /* rev6 */
419 /* sprom "size" & "blank" info */
420 u16 spromstatus; /* 0x7BE, rev2 */
427 /* Device console log buffer state */
428 struct brcmf_console {
429 uint count; /* Poll interval msec counter */
430 uint log_addr; /* Log struct address (fixed) */
431 struct rte_log_le log_le; /* Log struct (host copy) */
432 uint bufsize; /* Size of log buffer */
433 u8 *buf; /* Log buffer (host copy) */
434 uint last; /* Last buffer read index */
437 struct brcmf_trap_info {
451 __le32 r9; /* sb/v6 */
452 __le32 r10; /* sl/v7 */
453 __le32 r11; /* fp/v8 */
461 struct sdpcm_shared {
465 u32 assert_file_addr;
467 u32 console_addr; /* Address of struct rte_console */
473 struct sdpcm_shared_le {
476 __le32 assert_exp_addr;
477 __le32 assert_file_addr;
479 __le32 console_addr; /* Address of struct rte_console */
480 __le32 msgtrace_addr;
485 /* SDIO read frame info */
486 struct brcmf_sdio_read {
495 /* misc chip info needed by some of the routines */
496 /* Private data for SDIO bus interaction */
498 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
499 struct chip_info *ci; /* Chip info struct */
500 char *vars; /* Variables (from CIS and/or other) */
501 uint varsz; /* Size of variables buffer */
503 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
505 u32 hostintmask; /* Copy of Host Interrupt Mask */
506 atomic_t intstatus; /* Intstatus bits (events) pending */
507 atomic_t fcstate; /* State of dongle flow-control */
509 uint blocksize; /* Block size of SDIO transfers */
510 uint roundup; /* Max roundup limit */
512 struct pktq txq; /* Queue length used for flow-control */
513 u8 flowcontrol; /* per prio flow control bitmask */
514 u8 tx_seq; /* Transmit sequence number (next) */
515 u8 tx_max; /* Maximum transmit sequence allowed */
517 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
518 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
519 u8 rx_seq; /* Receive sequence number (expected) */
520 struct brcmf_sdio_read cur_read;
521 /* info of current read frame */
522 bool rxskip; /* Skip receive (awaiting NAK ACK) */
523 bool rxpending; /* Data frame pending in dongle */
525 uint rxbound; /* Rx frames to read before resched */
526 uint txbound; /* Tx frames to send before resched */
529 struct sk_buff *glomd; /* Packet containing glomming descriptor */
530 struct sk_buff_head glom; /* Packet list for glommed superframe */
531 uint glomerr; /* Glom packet read errors */
533 u8 *rxbuf; /* Buffer for receiving control packets */
534 uint rxblen; /* Allocated length of rxbuf */
535 u8 *rxctl; /* Aligned pointer into rxbuf */
536 u8 *rxctl_orig; /* pointer for freeing rxctl */
537 u8 *databuf; /* Buffer for receiving big glom packet */
538 u8 *dataptr; /* Aligned pointer into databuf */
539 uint rxlen; /* Length of valid data in buffer */
540 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
542 u8 sdpcm_ver; /* Bus protocol reported by dongle */
544 bool intr; /* Use interrupts */
545 bool poll; /* Use polling */
546 atomic_t ipend; /* Device interrupt is pending */
547 uint spurious; /* Count of spurious interrupts */
548 uint pollrate; /* Ticks between device polls */
549 uint polltick; /* Tick counter */
552 uint console_interval;
553 struct brcmf_console console; /* Console output polling support */
554 uint console_addr; /* Console address from shared struct */
557 uint clkstate; /* State of sd and backplane clock(s) */
558 bool activity; /* Activity flag for clock down */
559 s32 idletime; /* Control for activity timeout */
560 s32 idlecount; /* Activity timeout counter */
561 s32 idleclock; /* How to set bus driver when idle */
563 bool use_rxchain; /* If brcmf should use PKT chains */
564 bool rxflow_mode; /* Rx flow control mode */
565 bool rxflow; /* Is rx flow control on */
566 bool alp_only; /* Don't use HT clock (ALP only) */
570 bool ctrl_frame_stat;
573 wait_queue_head_t ctrl_wait;
574 wait_queue_head_t dcmd_resp_wait;
576 struct timer_list timer;
577 struct completion watchdog_wait;
578 struct task_struct *watchdog_tsk;
582 struct workqueue_struct *brcmf_wq;
583 struct work_struct datawork;
584 struct list_head dpc_tsklst;
585 spinlock_t dpc_tl_lock;
587 const struct firmware *firmware;
590 bool txoff; /* Transmit flow-controlled */
591 struct brcmf_sdio_count sdcnt;
597 #define CLK_PENDING 2 /* Not used yet */
601 static int qcount[NUMPRIO];
602 static int tx_packets[NUMPRIO];
605 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
607 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
609 /* Retry count for register access failures */
610 static const uint retry_limit = 2;
612 /* Limit on rounding up frames */
613 static const uint max_roundup = 512;
617 enum brcmf_sdio_frmtype {
618 BRCMF_SDIO_FT_NORMAL,
623 static void pkt_align(struct sk_buff *p, int len, int align)
626 datalign = (unsigned long)(p->data);
627 datalign = roundup(datalign, (align)) - datalign;
629 skb_pull(p, datalign);
633 /* To check if there's window offered */
634 static bool data_ok(struct brcmf_sdio *bus)
636 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
637 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
641 * Reads a register in the SDIO hardware block. This block occupies a series of
642 * adresses on the 32 bit backplane bus.
645 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
647 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
650 *regvar = brcmf_sdio_regrl(bus->sdiodev,
651 bus->ci->c_inf[idx].base + offset, &ret);
657 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
659 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
662 brcmf_sdio_regwl(bus->sdiodev,
663 bus->ci->c_inf[idx].base + reg_offset,
669 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
671 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
673 /* Turn backplane clock on or off */
674 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
677 u8 clkctl, clkreq, devctl;
678 unsigned long timeout;
680 brcmf_dbg(TRACE, "Enter\n");
685 /* Request HT Avail */
687 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
689 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
692 brcmf_err("HT Avail request error: %d\n", err);
696 /* Check current status */
697 clkctl = brcmf_sdio_regrb(bus->sdiodev,
698 SBSDIO_FUNC1_CHIPCLKCSR, &err);
700 brcmf_err("HT Avail read error: %d\n", err);
704 /* Go to pending and await interrupt if appropriate */
705 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
706 /* Allow only clock-available interrupt */
707 devctl = brcmf_sdio_regrb(bus->sdiodev,
708 SBSDIO_DEVICE_CTL, &err);
710 brcmf_err("Devctl error setting CA: %d\n",
715 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
716 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
718 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
719 bus->clkstate = CLK_PENDING;
722 } else if (bus->clkstate == CLK_PENDING) {
723 /* Cancel CA-only interrupt filter */
724 devctl = brcmf_sdio_regrb(bus->sdiodev,
725 SBSDIO_DEVICE_CTL, &err);
726 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
727 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
731 /* Otherwise, wait here (polling) for HT Avail */
733 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
734 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
735 clkctl = brcmf_sdio_regrb(bus->sdiodev,
736 SBSDIO_FUNC1_CHIPCLKCSR,
738 if (time_after(jiffies, timeout))
741 usleep_range(5000, 10000);
744 brcmf_err("HT Avail request error: %d\n", err);
747 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
748 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
749 PMU_MAX_TRANSITION_DLY, clkctl);
753 /* Mark clock available */
754 bus->clkstate = CLK_AVAIL;
755 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
758 if (!bus->alp_only) {
759 if (SBSDIO_ALPONLY(clkctl))
760 brcmf_err("HT Clock should be on\n");
762 #endif /* defined (DEBUG) */
764 bus->activity = true;
768 if (bus->clkstate == CLK_PENDING) {
769 /* Cancel CA-only interrupt filter */
770 devctl = brcmf_sdio_regrb(bus->sdiodev,
771 SBSDIO_DEVICE_CTL, &err);
772 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
773 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
777 bus->clkstate = CLK_SDONLY;
778 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
780 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
782 brcmf_err("Failed access turning clock off: %d\n",
790 /* Change idle/active SD state */
791 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
793 brcmf_dbg(TRACE, "Enter\n");
796 bus->clkstate = CLK_SDONLY;
798 bus->clkstate = CLK_NONE;
803 /* Transition SD and backplane clock readiness */
804 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
807 uint oldstate = bus->clkstate;
810 brcmf_dbg(TRACE, "Enter\n");
812 /* Early exit if we're already there */
813 if (bus->clkstate == target) {
814 if (target == CLK_AVAIL) {
815 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
816 bus->activity = true;
823 /* Make sure SD clock is available */
824 if (bus->clkstate == CLK_NONE)
825 brcmf_sdbrcm_sdclk(bus, true);
826 /* Now request HT Avail on the backplane */
827 brcmf_sdbrcm_htclk(bus, true, pendok);
828 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
829 bus->activity = true;
833 /* Remove HT request, or bring up SD clock */
834 if (bus->clkstate == CLK_NONE)
835 brcmf_sdbrcm_sdclk(bus, true);
836 else if (bus->clkstate == CLK_AVAIL)
837 brcmf_sdbrcm_htclk(bus, false, false);
839 brcmf_err("request for %d -> %d\n",
840 bus->clkstate, target);
841 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
845 /* Make sure to remove HT request */
846 if (bus->clkstate == CLK_AVAIL)
847 brcmf_sdbrcm_htclk(bus, false, false);
848 /* Now remove the SD clock */
849 brcmf_sdbrcm_sdclk(bus, false);
850 brcmf_sdbrcm_wd_timer(bus, 0);
854 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
860 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
867 brcmf_dbg(TRACE, "Enter\n");
869 /* Read mailbox data and ack that we did so */
870 ret = r_sdreg32(bus, &hmb_data,
871 offsetof(struct sdpcmd_regs, tohostmailboxdata));
874 w_sdreg32(bus, SMB_INT_ACK,
875 offsetof(struct sdpcmd_regs, tosbmailbox));
876 bus->sdcnt.f1regdata += 2;
878 /* Dongle recomposed rx frames, accept them again */
879 if (hmb_data & HMB_DATA_NAKHANDLED) {
880 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
883 brcmf_err("unexpected NAKHANDLED!\n");
886 intstatus |= I_HMB_FRAME_IND;
890 * DEVREADY does not occur with gSPI.
892 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
894 (hmb_data & HMB_DATA_VERSION_MASK) >>
895 HMB_DATA_VERSION_SHIFT;
896 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
897 brcmf_err("Version mismatch, dongle reports %d, "
899 bus->sdpcm_ver, SDPCM_PROT_VERSION);
901 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
906 * Flow Control has been moved into the RX headers and this out of band
907 * method isn't used any more.
908 * remaining backward compatible with older dongles.
910 if (hmb_data & HMB_DATA_FC) {
911 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
912 HMB_DATA_FCDATA_SHIFT;
914 if (fcbits & ~bus->flowcontrol)
915 bus->sdcnt.fc_xoff++;
917 if (bus->flowcontrol & ~fcbits)
920 bus->sdcnt.fc_rcvd++;
921 bus->flowcontrol = fcbits;
924 /* Shouldn't be any others */
925 if (hmb_data & ~(HMB_DATA_DEVREADY |
926 HMB_DATA_NAKHANDLED |
929 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
930 brcmf_err("Unknown mailbox data content: 0x%02x\n",
936 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
943 brcmf_err("%sterminate frame%s\n",
944 abort ? "abort command, " : "",
945 rtx ? ", send NAK" : "");
948 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
950 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
952 bus->sdcnt.f1regdata++;
954 /* Wait until the packet has been flushed (device/FIFO stable) */
955 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
956 hi = brcmf_sdio_regrb(bus->sdiodev,
957 SBSDIO_FUNC1_RFRAMEBCHI, &err);
958 lo = brcmf_sdio_regrb(bus->sdiodev,
959 SBSDIO_FUNC1_RFRAMEBCLO, &err);
960 bus->sdcnt.f1regdata += 2;
962 if ((hi == 0) && (lo == 0))
965 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
966 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
967 lastrbc, (hi << 8) + lo);
969 lastrbc = (hi << 8) + lo;
973 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
975 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
979 err = w_sdreg32(bus, SMB_NAK,
980 offsetof(struct sdpcmd_regs, tosbmailbox));
982 bus->sdcnt.f1regdata++;
987 /* Clear partial in any case */
988 bus->cur_read.len = 0;
990 /* If we can't reach the device, signal failure */
992 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
995 /* copy a buffer into a pkt buffer chain */
996 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1005 skb_queue_walk(&bus->glom, p) {
1006 n = min_t(uint, p->len, len);
1007 memcpy(p->data, buf, n);
1018 /* return total length of buffer chain */
1019 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1025 skb_queue_walk(&bus->glom, p)
1030 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1032 struct sk_buff *cur, *next;
1034 skb_queue_walk_safe(&bus->glom, cur, next) {
1035 skb_unlink(cur, &bus->glom);
1036 brcmu_pkt_buf_free_skb(cur);
1040 static int brcmf_sdio_hdparser(struct brcmf_sdio *bus, u8 *header,
1041 struct brcmf_sdio_read *rd,
1042 enum brcmf_sdio_frmtype type)
1045 u8 rx_seq, fc, tx_seq_max;
1048 * 4 bytes hardware header (frame tag)
1049 * Byte 0~1: Frame length
1050 * Byte 2~3: Checksum, bit-wise inverse of frame length
1052 len = get_unaligned_le16(header);
1053 checksum = get_unaligned_le16(header + sizeof(u16));
1054 /* All zero means no more to read */
1055 if (!(len | checksum)) {
1056 bus->rxpending = false;
1059 if ((u16)(~(len ^ checksum))) {
1060 brcmf_err("HW header checksum error\n");
1061 bus->sdcnt.rx_badhdr++;
1062 brcmf_sdbrcm_rxfail(bus, false, false);
1065 if (len < SDPCM_HDRLEN) {
1066 brcmf_err("HW header length error\n");
1069 if (type == BRCMF_SDIO_FT_SUPER &&
1070 (roundup(len, bus->blocksize) != rd->len)) {
1071 brcmf_err("HW superframe header length error\n");
1074 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1075 brcmf_err("HW subframe header length error\n");
1081 * 8 bytes hardware header
1082 * Byte 0: Rx sequence number
1083 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1084 * Byte 2: Length of next data frame
1085 * Byte 3: Data offset
1086 * Byte 4: Flow control bits
1087 * Byte 5: Maximum Sequence number allow for Tx
1088 * Byte 6~7: Reserved
1090 if (type == BRCMF_SDIO_FT_SUPER &&
1091 SDPCM_GLOMDESC(&header[SDPCM_FRAMETAG_LEN])) {
1092 brcmf_err("Glom descriptor found in superframe head\n");
1096 rx_seq = SDPCM_PACKET_SEQUENCE(&header[SDPCM_FRAMETAG_LEN]);
1097 rd->channel = SDPCM_PACKET_CHANNEL(&header[SDPCM_FRAMETAG_LEN]);
1098 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1099 type != BRCMF_SDIO_FT_SUPER) {
1100 brcmf_err("HW header length too long\n");
1101 bus->sdiodev->bus_if->dstats.rx_errors++;
1102 bus->sdcnt.rx_toolong++;
1103 brcmf_sdbrcm_rxfail(bus, false, false);
1107 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1108 brcmf_err("Wrong channel for superframe\n");
1112 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1113 rd->channel != SDPCM_EVENT_CHANNEL) {
1114 brcmf_err("Wrong channel for subframe\n");
1118 rd->dat_offset = SDPCM_DOFFSET_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1119 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1120 brcmf_err("seq %d: bad data offset\n", rx_seq);
1121 bus->sdcnt.rx_badhdr++;
1122 brcmf_sdbrcm_rxfail(bus, false, false);
1126 if (rd->seq_num != rx_seq) {
1127 brcmf_err("seq %d: sequence number error, expect %d\n",
1128 rx_seq, rd->seq_num);
1129 bus->sdcnt.rx_badseq++;
1130 rd->seq_num = rx_seq;
1132 /* no need to check the reset for subframe */
1133 if (type == BRCMF_SDIO_FT_SUB)
1135 rd->len_nxtfrm = header[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1136 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1137 /* only warm for NON glom packet */
1138 if (rd->channel != SDPCM_GLOM_CHANNEL)
1139 brcmf_err("seq %d: next length error\n", rx_seq);
1142 fc = SDPCM_FCMASK_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1143 if (bus->flowcontrol != fc) {
1144 if (~bus->flowcontrol & fc)
1145 bus->sdcnt.fc_xoff++;
1146 if (bus->flowcontrol & ~fc)
1147 bus->sdcnt.fc_xon++;
1148 bus->sdcnt.fc_rcvd++;
1149 bus->flowcontrol = fc;
1151 tx_seq_max = SDPCM_WINDOW_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1152 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1153 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1154 tx_seq_max = bus->tx_seq + 2;
1156 bus->tx_max = tx_seq_max;
1161 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1167 struct sk_buff *pfirst, *pnext;
1173 bool usechain = bus->use_rxchain;
1175 struct brcmf_sdio_read rd_new;
1177 /* If packets, issue read(s) and send up packet chain */
1178 /* Return sequence numbers consumed? */
1180 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1181 bus->glomd, skb_peek(&bus->glom));
1183 /* If there's a descriptor, generate the packet chain */
1185 pfirst = pnext = NULL;
1186 dlen = (u16) (bus->glomd->len);
1187 dptr = bus->glomd->data;
1188 if (!dlen || (dlen & 1)) {
1189 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1194 for (totlen = num = 0; dlen; num++) {
1195 /* Get (and move past) next length */
1196 sublen = get_unaligned_le16(dptr);
1197 dlen -= sizeof(u16);
1198 dptr += sizeof(u16);
1199 if ((sublen < SDPCM_HDRLEN) ||
1200 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1201 brcmf_err("descriptor len %d bad: %d\n",
1206 if (sublen % BRCMF_SDALIGN) {
1207 brcmf_err("sublen %d not multiple of %d\n",
1208 sublen, BRCMF_SDALIGN);
1213 /* For last frame, adjust read len so total
1214 is a block multiple */
1217 (roundup(totlen, bus->blocksize) - totlen);
1218 totlen = roundup(totlen, bus->blocksize);
1221 /* Allocate/chain packet for next subframe */
1222 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1223 if (pnext == NULL) {
1224 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1228 skb_queue_tail(&bus->glom, pnext);
1230 /* Adhere to start alignment requirements */
1231 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1234 /* If all allocations succeeded, save packet chain
1237 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1239 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1240 totlen != bus->cur_read.len) {
1241 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1242 bus->cur_read.len, totlen, rxseq);
1244 pfirst = pnext = NULL;
1246 brcmf_sdbrcm_free_glom(bus);
1250 /* Done with descriptor packet */
1251 brcmu_pkt_buf_free_skb(bus->glomd);
1253 bus->cur_read.len = 0;
1256 /* Ok -- either we just generated a packet chain,
1257 or had one from before */
1258 if (!skb_queue_empty(&bus->glom)) {
1259 if (BRCMF_GLOM_ON()) {
1260 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1261 skb_queue_walk(&bus->glom, pnext) {
1262 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1263 pnext, (u8 *) (pnext->data),
1264 pnext->len, pnext->len);
1268 pfirst = skb_peek(&bus->glom);
1269 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1271 /* Do an SDIO read for the superframe. Configurable iovar to
1272 * read directly into the chained packet, or allocate a large
1273 * packet and and copy into the chain.
1275 sdio_claim_host(bus->sdiodev->func[1]);
1277 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1278 bus->sdiodev->sbwad,
1279 SDIO_FUNC_2, F2SYNC, &bus->glom);
1280 } else if (bus->dataptr) {
1281 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1282 bus->sdiodev->sbwad,
1283 SDIO_FUNC_2, F2SYNC,
1284 bus->dataptr, dlen);
1285 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1286 if (sublen != dlen) {
1287 brcmf_err("FAILED TO COPY, dlen %d sublen %d\n",
1293 brcmf_err("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1297 sdio_release_host(bus->sdiodev->func[1]);
1298 bus->sdcnt.f2rxdata++;
1300 /* On failure, kill the superframe, allow a couple retries */
1302 brcmf_err("glom read of %d bytes failed: %d\n",
1304 bus->sdiodev->bus_if->dstats.rx_errors++;
1306 sdio_claim_host(bus->sdiodev->func[1]);
1307 if (bus->glomerr++ < 3) {
1308 brcmf_sdbrcm_rxfail(bus, true, true);
1311 brcmf_sdbrcm_rxfail(bus, true, false);
1312 bus->sdcnt.rxglomfail++;
1313 brcmf_sdbrcm_free_glom(bus);
1315 sdio_release_host(bus->sdiodev->func[1]);
1319 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1320 pfirst->data, min_t(int, pfirst->len, 48),
1323 rd_new.seq_num = rxseq;
1325 sdio_claim_host(bus->sdiodev->func[1]);
1326 errcode = brcmf_sdio_hdparser(bus, pfirst->data, &rd_new,
1327 BRCMF_SDIO_FT_SUPER);
1328 sdio_release_host(bus->sdiodev->func[1]);
1329 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1331 /* Remove superframe header, remember offset */
1332 skb_pull(pfirst, rd_new.dat_offset);
1333 sfdoff = rd_new.dat_offset;
1336 /* Validate all the subframe headers */
1337 skb_queue_walk(&bus->glom, pnext) {
1338 /* leave when invalid subframe is found */
1342 rd_new.len = pnext->len;
1343 rd_new.seq_num = rxseq++;
1344 sdio_claim_host(bus->sdiodev->func[1]);
1345 errcode = brcmf_sdio_hdparser(bus, pnext->data, &rd_new,
1347 sdio_release_host(bus->sdiodev->func[1]);
1348 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1349 pnext->data, 32, "subframe:\n");
1355 /* Terminate frame on error, request
1357 sdio_claim_host(bus->sdiodev->func[1]);
1358 if (bus->glomerr++ < 3) {
1359 /* Restore superframe header space */
1360 skb_push(pfirst, sfdoff);
1361 brcmf_sdbrcm_rxfail(bus, true, true);
1364 brcmf_sdbrcm_rxfail(bus, true, false);
1365 bus->sdcnt.rxglomfail++;
1366 brcmf_sdbrcm_free_glom(bus);
1368 sdio_release_host(bus->sdiodev->func[1]);
1369 bus->cur_read.len = 0;
1373 /* Basic SD framing looks ok - process each packet (header) */
1375 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1376 dptr = (u8 *) (pfirst->data);
1377 sublen = get_unaligned_le16(dptr);
1378 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1380 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1382 "Rx Subframe Data:\n");
1384 __skb_trim(pfirst, sublen);
1385 skb_pull(pfirst, doff);
1387 if (pfirst->len == 0) {
1388 skb_unlink(pfirst, &bus->glom);
1389 brcmu_pkt_buf_free_skb(pfirst);
1391 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1392 &ifidx, pfirst) != 0) {
1393 brcmf_err("rx protocol error\n");
1394 bus->sdiodev->bus_if->dstats.rx_errors++;
1395 skb_unlink(pfirst, &bus->glom);
1396 brcmu_pkt_buf_free_skb(pfirst);
1400 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1402 min_t(int, pfirst->len, 32),
1403 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1404 bus->glom.qlen, pfirst, pfirst->data,
1405 pfirst->len, pfirst->next,
1408 /* sent any remaining packets up */
1410 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1412 bus->sdcnt.rxglomframes++;
1413 bus->sdcnt.rxglompkts += bus->glom.qlen;
1418 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1421 DECLARE_WAITQUEUE(wait, current);
1422 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1424 /* Wait until control frame is available */
1425 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1426 set_current_state(TASK_INTERRUPTIBLE);
1428 while (!(*condition) && (!signal_pending(current) && timeout))
1429 timeout = schedule_timeout(timeout);
1431 if (signal_pending(current))
1434 set_current_state(TASK_RUNNING);
1435 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1440 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1442 if (waitqueue_active(&bus->dcmd_resp_wait))
1443 wake_up_interruptible(&bus->dcmd_resp_wait);
1448 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1451 u8 *buf = NULL, *rbuf;
1454 brcmf_dbg(TRACE, "Enter\n");
1457 buf = vzalloc(bus->rxblen);
1459 brcmf_err("no memory for control frame\n");
1463 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1465 rbuf += (BRCMF_SDALIGN - pad);
1467 /* Copy the already-read portion over */
1468 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1469 if (len <= BRCMF_FIRSTREAD)
1472 /* Raise rdlen to next SDIO block to avoid tail command */
1473 rdlen = len - BRCMF_FIRSTREAD;
1474 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1475 pad = bus->blocksize - (rdlen % bus->blocksize);
1476 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1477 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1479 } else if (rdlen % BRCMF_SDALIGN) {
1480 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1483 /* Satisfy length-alignment requirements */
1484 if (rdlen & (ALIGNMENT - 1))
1485 rdlen = roundup(rdlen, ALIGNMENT);
1487 /* Drop if the read is too big or it exceeds our maximum */
1488 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1489 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1490 rdlen, bus->sdiodev->bus_if->maxctl);
1491 bus->sdiodev->bus_if->dstats.rx_errors++;
1492 brcmf_sdbrcm_rxfail(bus, false, false);
1496 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1497 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1498 len, len - doff, bus->sdiodev->bus_if->maxctl);
1499 bus->sdiodev->bus_if->dstats.rx_errors++;
1500 bus->sdcnt.rx_toolong++;
1501 brcmf_sdbrcm_rxfail(bus, false, false);
1505 /* Read remain of frame body */
1506 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1507 bus->sdiodev->sbwad,
1509 F2SYNC, rbuf, rdlen);
1510 bus->sdcnt.f2rxdata++;
1512 /* Control frame failures need retransmission */
1514 brcmf_err("read %d control bytes failed: %d\n",
1516 bus->sdcnt.rxc_errors++;
1517 brcmf_sdbrcm_rxfail(bus, true, true);
1520 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1524 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1525 buf, len, "RxCtrl:\n");
1527 /* Point to valid data and indicate its length */
1528 spin_lock_bh(&bus->rxctl_lock);
1530 brcmf_err("last control frame is being processed.\n");
1531 spin_unlock_bh(&bus->rxctl_lock);
1535 bus->rxctl = buf + doff;
1536 bus->rxctl_orig = buf;
1537 bus->rxlen = len - doff;
1538 spin_unlock_bh(&bus->rxctl_lock);
1541 /* Awake any waiters */
1542 brcmf_sdbrcm_dcmd_resp_wake(bus);
1545 /* Pad read to blocksize for efficiency */
1546 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1548 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1549 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1550 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1551 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1553 } else if (*rdlen % BRCMF_SDALIGN) {
1554 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1558 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1560 struct sk_buff *pkt; /* Packet for event or data frames */
1561 u16 pad; /* Number of pad bytes to read */
1562 uint rxleft = 0; /* Remaining number of frames allowed */
1563 int sdret; /* Return code from calls */
1565 uint rxcount = 0; /* Total frames read */
1566 struct brcmf_sdio_read *rd = &bus->cur_read, rd_new;
1569 brcmf_dbg(TRACE, "Enter\n");
1571 /* Not finished unless we encounter no more frames indication */
1572 bus->rxpending = true;
1574 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1575 !bus->rxskip && rxleft &&
1576 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1577 rd->seq_num++, rxleft--) {
1579 /* Handle glomming separately */
1580 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1582 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1583 bus->glomd, skb_peek(&bus->glom));
1584 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1585 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1586 rd->seq_num += cnt - 1;
1587 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1591 rd->len_left = rd->len;
1592 /* read header first for unknow frame length */
1593 sdio_claim_host(bus->sdiodev->func[1]);
1595 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1596 bus->sdiodev->sbwad,
1597 SDIO_FUNC_2, F2SYNC,
1600 bus->sdcnt.f2rxhdrs++;
1602 brcmf_err("RXHEADER FAILED: %d\n",
1604 bus->sdcnt.rx_hdrfail++;
1605 brcmf_sdbrcm_rxfail(bus, true, true);
1606 sdio_release_host(bus->sdiodev->func[1]);
1610 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1611 bus->rxhdr, SDPCM_HDRLEN,
1614 if (brcmf_sdio_hdparser(bus, bus->rxhdr, rd,
1615 BRCMF_SDIO_FT_NORMAL)) {
1616 sdio_release_host(bus->sdiodev->func[1]);
1617 if (!bus->rxpending)
1623 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1624 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1627 /* prepare the descriptor for the next read */
1628 rd->len = rd->len_nxtfrm << 4;
1630 /* treat all packet as event if we don't know */
1631 rd->channel = SDPCM_EVENT_CHANNEL;
1632 sdio_release_host(bus->sdiodev->func[1]);
1635 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1636 rd->len - BRCMF_FIRSTREAD : 0;
1637 head_read = BRCMF_FIRSTREAD;
1640 brcmf_pad(bus, &pad, &rd->len_left);
1642 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1645 /* Give up on data, request rtx of events */
1646 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1647 bus->sdiodev->bus_if->dstats.rx_dropped++;
1648 brcmf_sdbrcm_rxfail(bus, false,
1649 RETRYCHAN(rd->channel));
1650 sdio_release_host(bus->sdiodev->func[1]);
1653 skb_pull(pkt, head_read);
1654 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1656 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1657 SDIO_FUNC_2, F2SYNC, pkt);
1658 bus->sdcnt.f2rxdata++;
1659 sdio_release_host(bus->sdiodev->func[1]);
1662 brcmf_err("read %d bytes from channel %d failed: %d\n",
1663 rd->len, rd->channel, sdret);
1664 brcmu_pkt_buf_free_skb(pkt);
1665 bus->sdiodev->bus_if->dstats.rx_errors++;
1666 sdio_claim_host(bus->sdiodev->func[1]);
1667 brcmf_sdbrcm_rxfail(bus, true,
1668 RETRYCHAN(rd->channel));
1669 sdio_release_host(bus->sdiodev->func[1]);
1674 skb_push(pkt, head_read);
1675 memcpy(pkt->data, bus->rxhdr, head_read);
1678 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1679 rd_new.seq_num = rd->seq_num;
1680 sdio_claim_host(bus->sdiodev->func[1]);
1681 if (brcmf_sdio_hdparser(bus, bus->rxhdr, &rd_new,
1682 BRCMF_SDIO_FT_NORMAL)) {
1684 brcmu_pkt_buf_free_skb(pkt);
1686 bus->sdcnt.rx_readahead_cnt++;
1687 if (rd->len != roundup(rd_new.len, 16)) {
1688 brcmf_err("frame length mismatch:read %d, should be %d\n",
1690 roundup(rd_new.len, 16) >> 4);
1692 brcmf_sdbrcm_rxfail(bus, true, true);
1693 sdio_release_host(bus->sdiodev->func[1]);
1694 brcmu_pkt_buf_free_skb(pkt);
1697 sdio_release_host(bus->sdiodev->func[1]);
1698 rd->len_nxtfrm = rd_new.len_nxtfrm;
1699 rd->channel = rd_new.channel;
1700 rd->dat_offset = rd_new.dat_offset;
1702 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1705 bus->rxhdr, SDPCM_HDRLEN,
1708 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1709 brcmf_err("readahead on control packet %d?\n",
1711 /* Force retry w/normal header read */
1713 sdio_claim_host(bus->sdiodev->func[1]);
1714 brcmf_sdbrcm_rxfail(bus, false, true);
1715 sdio_release_host(bus->sdiodev->func[1]);
1716 brcmu_pkt_buf_free_skb(pkt);
1721 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1722 pkt->data, rd->len, "Rx Data:\n");
1724 /* Save superframe descriptor and allocate packet frame */
1725 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1726 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1727 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1729 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1732 __skb_trim(pkt, rd->len);
1733 skb_pull(pkt, SDPCM_HDRLEN);
1736 brcmf_err("%s: glom superframe w/o "
1737 "descriptor!\n", __func__);
1738 sdio_claim_host(bus->sdiodev->func[1]);
1739 brcmf_sdbrcm_rxfail(bus, false, false);
1740 sdio_release_host(bus->sdiodev->func[1]);
1742 /* prepare the descriptor for the next read */
1743 rd->len = rd->len_nxtfrm << 4;
1745 /* treat all packet as event if we don't know */
1746 rd->channel = SDPCM_EVENT_CHANNEL;
1750 /* Fill in packet len and prio, deliver upward */
1751 __skb_trim(pkt, rd->len);
1752 skb_pull(pkt, rd->dat_offset);
1754 /* prepare the descriptor for the next read */
1755 rd->len = rd->len_nxtfrm << 4;
1757 /* treat all packet as event if we don't know */
1758 rd->channel = SDPCM_EVENT_CHANNEL;
1760 if (pkt->len == 0) {
1761 brcmu_pkt_buf_free_skb(pkt);
1763 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
1765 brcmf_err("rx protocol error\n");
1766 brcmu_pkt_buf_free_skb(pkt);
1767 bus->sdiodev->bus_if->dstats.rx_errors++;
1771 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
1774 rxcount = maxframes - rxleft;
1775 /* Message if we hit the limit */
1777 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1779 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1780 /* Back off rxseq if awaiting rtx, update rx_seq */
1783 bus->rx_seq = rd->seq_num;
1789 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1791 if (waitqueue_active(&bus->ctrl_wait))
1792 wake_up_interruptible(&bus->ctrl_wait);
1796 /* Writes a HW/SW header into the packet and sends it. */
1797 /* Assumes: (a) header space already there, (b) caller holds lock */
1798 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1799 uint chan, bool free_pkt)
1805 struct sk_buff *new;
1808 brcmf_dbg(TRACE, "Enter\n");
1810 frame = (u8 *) (pkt->data);
1812 /* Add alignment padding, allocate new packet if needed */
1813 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1815 if (skb_headroom(pkt) < pad) {
1816 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1817 skb_headroom(pkt), pad);
1818 bus->sdiodev->bus_if->tx_realloc++;
1819 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
1821 brcmf_err("couldn't allocate new %d-byte packet\n",
1822 pkt->len + BRCMF_SDALIGN);
1827 pkt_align(new, pkt->len, BRCMF_SDALIGN);
1828 memcpy(new->data, pkt->data, pkt->len);
1830 brcmu_pkt_buf_free_skb(pkt);
1831 /* free the pkt if canned one is not used */
1834 frame = (u8 *) (pkt->data);
1835 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
1839 frame = (u8 *) (pkt->data);
1840 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
1841 memset(frame, 0, pad + SDPCM_HDRLEN);
1844 /* precondition: pad < BRCMF_SDALIGN */
1846 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1847 len = (u16) (pkt->len);
1848 *(__le16 *) frame = cpu_to_le16(len);
1849 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
1851 /* Software tag: channel, sequence number, data offset */
1853 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1855 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1857 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1858 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1861 tx_packets[pkt->priority]++;
1864 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
1865 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1866 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
1867 frame, len, "Tx Frame:\n");
1868 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1870 chan == SDPCM_CONTROL_CHANNEL) ||
1872 chan != SDPCM_CONTROL_CHANNEL))) &&
1874 frame, min_t(u16, len, 16), "TxHdr:\n");
1876 /* Raise len to next SDIO block to eliminate tail command */
1877 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1878 u16 pad = bus->blocksize - (len % bus->blocksize);
1879 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1881 } else if (len % BRCMF_SDALIGN) {
1882 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1885 /* Some controllers have trouble with odd bytes -- round to even */
1886 if (len & (ALIGNMENT - 1))
1887 len = roundup(len, ALIGNMENT);
1889 sdio_claim_host(bus->sdiodev->func[1]);
1890 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1891 SDIO_FUNC_2, F2SYNC, pkt);
1892 bus->sdcnt.f2txdata++;
1895 /* On failure, abort the command and terminate the frame */
1896 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
1898 bus->sdcnt.tx_sderrs++;
1900 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1901 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1903 bus->sdcnt.f1regdata++;
1905 for (i = 0; i < 3; i++) {
1907 hi = brcmf_sdio_regrb(bus->sdiodev,
1908 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1909 lo = brcmf_sdio_regrb(bus->sdiodev,
1910 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1911 bus->sdcnt.f1regdata += 2;
1912 if ((hi == 0) && (lo == 0))
1917 sdio_release_host(bus->sdiodev->func[1]);
1919 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1922 /* restore pkt buffer pointer before calling tx complete routine */
1923 skb_pull(pkt, SDPCM_HDRLEN + pad);
1924 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
1927 brcmu_pkt_buf_free_skb(pkt);
1932 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
1934 struct sk_buff *pkt;
1936 int ret = 0, prec_out;
1941 brcmf_dbg(TRACE, "Enter\n");
1943 tx_prec_map = ~bus->flowcontrol;
1945 /* Send frames until the limit or some other event */
1946 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
1947 spin_lock_bh(&bus->txqlock);
1948 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1950 spin_unlock_bh(&bus->txqlock);
1953 spin_unlock_bh(&bus->txqlock);
1954 datalen = pkt->len - SDPCM_HDRLEN;
1956 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1958 bus->sdiodev->bus_if->dstats.tx_errors++;
1960 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
1962 /* In poll mode, need to check for other events */
1963 if (!bus->intr && cnt) {
1964 /* Check device status, signal pending interrupt */
1965 sdio_claim_host(bus->sdiodev->func[1]);
1966 ret = r_sdreg32(bus, &intstatus,
1967 offsetof(struct sdpcmd_regs,
1969 sdio_release_host(bus->sdiodev->func[1]);
1970 bus->sdcnt.f2txdata++;
1973 if (intstatus & bus->hostintmask)
1974 atomic_set(&bus->ipend, 1);
1978 /* Deflow-control stack if needed */
1979 if (bus->sdiodev->bus_if->drvr_up &&
1980 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
1981 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
1983 brcmf_txflowblock(bus->sdiodev->dev, false);
1989 static void brcmf_sdbrcm_bus_stop(struct device *dev)
1991 u32 local_hostintmask;
1994 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
1995 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
1996 struct brcmf_sdio *bus = sdiodev->bus;
1998 brcmf_dbg(TRACE, "Enter\n");
2000 if (bus->watchdog_tsk) {
2001 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2002 kthread_stop(bus->watchdog_tsk);
2003 bus->watchdog_tsk = NULL;
2006 sdio_claim_host(bus->sdiodev->func[1]);
2008 /* Enable clock for device interrupts */
2009 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2011 /* Disable and clear interrupts at the chip level also */
2012 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2013 local_hostintmask = bus->hostintmask;
2014 bus->hostintmask = 0;
2016 /* Change our idea of bus state */
2017 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2019 /* Force clocks on backplane to be sure F2 interrupt propagates */
2020 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2021 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2023 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2024 (saveclk | SBSDIO_FORCE_HT), &err);
2027 brcmf_err("Failed to force clock for F2: err %d\n", err);
2029 /* Turn off the bus (F2), free any pending packets */
2030 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2031 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2034 /* Clear any pending interrupts now that F2 is disabled */
2035 w_sdreg32(bus, local_hostintmask,
2036 offsetof(struct sdpcmd_regs, intstatus));
2038 /* Turn off the backplane clock (only) */
2039 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2040 sdio_release_host(bus->sdiodev->func[1]);
2042 /* Clear the data packet queues */
2043 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2045 /* Clear any held glomming stuff */
2047 brcmu_pkt_buf_free_skb(bus->glomd);
2048 brcmf_sdbrcm_free_glom(bus);
2050 /* Clear rx control and wake any waiters */
2051 spin_lock_bh(&bus->rxctl_lock);
2053 spin_unlock_bh(&bus->rxctl_lock);
2054 brcmf_sdbrcm_dcmd_resp_wake(bus);
2056 /* Reset some F2 state stuff */
2057 bus->rxskip = false;
2058 bus->tx_seq = bus->rx_seq = 0;
2061 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2062 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2064 unsigned long flags;
2066 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2067 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2068 enable_irq(bus->sdiodev->irq);
2069 bus->sdiodev->irq_en = true;
2071 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2074 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2077 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2079 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2081 struct list_head *new_hd;
2082 unsigned long flags;
2085 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2087 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2091 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2092 list_add_tail(new_hd, &bus->dpc_tsklst);
2093 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2096 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2103 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2104 addr = bus->ci->c_inf[idx].base +
2105 offsetof(struct sdpcmd_regs, intstatus);
2107 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2108 bus->sdcnt.f1regdata++;
2112 val &= bus->hostintmask;
2113 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2115 /* Clear interrupts */
2117 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2118 bus->sdcnt.f1regdata++;
2122 atomic_set(&bus->intstatus, 0);
2124 for_each_set_bit(n, &val, 32)
2125 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2131 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2134 unsigned long intstatus;
2135 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2136 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2137 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2140 brcmf_dbg(TRACE, "Enter\n");
2142 sdio_claim_host(bus->sdiodev->func[1]);
2144 /* If waiting for HTAVAIL, check status */
2145 if (bus->clkstate == CLK_PENDING) {
2146 u8 clkctl, devctl = 0;
2149 /* Check for inconsistent device control */
2150 devctl = brcmf_sdio_regrb(bus->sdiodev,
2151 SBSDIO_DEVICE_CTL, &err);
2153 brcmf_err("error reading DEVCTL: %d\n", err);
2154 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2158 /* Read CSR, if clock on switch to AVAIL, else ignore */
2159 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2160 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2162 brcmf_err("error reading CSR: %d\n",
2164 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2167 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2170 if (SBSDIO_HTAV(clkctl)) {
2171 devctl = brcmf_sdio_regrb(bus->sdiodev,
2172 SBSDIO_DEVICE_CTL, &err);
2174 brcmf_err("error reading DEVCTL: %d\n",
2176 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2178 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2179 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2182 brcmf_err("error writing DEVCTL: %d\n",
2184 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2186 bus->clkstate = CLK_AVAIL;
2190 /* Make sure backplane clock is on */
2191 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2193 /* Pending interrupt indicates new device status */
2194 if (atomic_read(&bus->ipend) > 0) {
2195 atomic_set(&bus->ipend, 0);
2196 err = brcmf_sdio_intr_rstatus(bus);
2199 /* Start with leftover status bits */
2200 intstatus = atomic_xchg(&bus->intstatus, 0);
2202 /* Handle flow-control change: read new state in case our ack
2203 * crossed another change interrupt. If change still set, assume
2204 * FC ON for safety, let next loop through do the debounce.
2206 if (intstatus & I_HMB_FC_CHANGE) {
2207 intstatus &= ~I_HMB_FC_CHANGE;
2208 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2209 offsetof(struct sdpcmd_regs, intstatus));
2211 err = r_sdreg32(bus, &newstatus,
2212 offsetof(struct sdpcmd_regs, intstatus));
2213 bus->sdcnt.f1regdata += 2;
2214 atomic_set(&bus->fcstate,
2215 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2216 intstatus |= (newstatus & bus->hostintmask);
2219 /* Handle host mailbox indication */
2220 if (intstatus & I_HMB_HOST_INT) {
2221 intstatus &= ~I_HMB_HOST_INT;
2222 intstatus |= brcmf_sdbrcm_hostmail(bus);
2225 sdio_release_host(bus->sdiodev->func[1]);
2227 /* Generally don't ask for these, can get CRC errors... */
2228 if (intstatus & I_WR_OOSYNC) {
2229 brcmf_err("Dongle reports WR_OOSYNC\n");
2230 intstatus &= ~I_WR_OOSYNC;
2233 if (intstatus & I_RD_OOSYNC) {
2234 brcmf_err("Dongle reports RD_OOSYNC\n");
2235 intstatus &= ~I_RD_OOSYNC;
2238 if (intstatus & I_SBINT) {
2239 brcmf_err("Dongle reports SBINT\n");
2240 intstatus &= ~I_SBINT;
2243 /* Would be active due to wake-wlan in gSPI */
2244 if (intstatus & I_CHIPACTIVE) {
2245 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2246 intstatus &= ~I_CHIPACTIVE;
2249 /* Ignore frame indications if rxskip is set */
2251 intstatus &= ~I_HMB_FRAME_IND;
2253 /* On frame indication, read available frames */
2254 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2255 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2256 if (!bus->rxpending)
2257 intstatus &= ~I_HMB_FRAME_IND;
2258 rxlimit -= min(framecnt, rxlimit);
2261 /* Keep still-pending events for next scheduling */
2263 for_each_set_bit(n, &intstatus, 32)
2264 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2267 brcmf_sdbrcm_clrintr(bus);
2269 if (data_ok(bus) && bus->ctrl_frame_stat &&
2270 (bus->clkstate == CLK_AVAIL)) {
2273 sdio_claim_host(bus->sdiodev->func[1]);
2274 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2275 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2276 (u32) bus->ctrl_frame_len);
2279 /* On failure, abort the command and
2280 terminate the frame */
2281 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2283 bus->sdcnt.tx_sderrs++;
2285 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2287 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2289 bus->sdcnt.f1regdata++;
2291 for (i = 0; i < 3; i++) {
2293 hi = brcmf_sdio_regrb(bus->sdiodev,
2294 SBSDIO_FUNC1_WFRAMEBCHI,
2296 lo = brcmf_sdio_regrb(bus->sdiodev,
2297 SBSDIO_FUNC1_WFRAMEBCLO,
2299 bus->sdcnt.f1regdata += 2;
2300 if ((hi == 0) && (lo == 0))
2305 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2307 sdio_release_host(bus->sdiodev->func[1]);
2308 bus->ctrl_frame_stat = false;
2309 brcmf_sdbrcm_wait_event_wakeup(bus);
2311 /* Send queued frames (limit 1 if rx may still be pending) */
2312 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2313 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2315 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2317 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2318 txlimit -= framecnt;
2321 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2322 brcmf_err("failed backplane access over SDIO, halting operation\n");
2323 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2324 atomic_set(&bus->intstatus, 0);
2325 } else if (atomic_read(&bus->intstatus) ||
2326 atomic_read(&bus->ipend) > 0 ||
2327 (!atomic_read(&bus->fcstate) &&
2328 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2329 data_ok(bus)) || PKT_AVAILABLE()) {
2330 brcmf_sdbrcm_adddpctsk(bus);
2333 /* If we're done for now, turn off clock request. */
2334 if ((bus->clkstate != CLK_PENDING)
2335 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2336 bus->activity = false;
2337 sdio_claim_host(bus->sdiodev->func[1]);
2338 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2339 sdio_release_host(bus->sdiodev->func[1]);
2343 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2347 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2348 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2349 struct brcmf_sdio *bus = sdiodev->bus;
2350 unsigned long flags;
2352 brcmf_dbg(TRACE, "Enter\n");
2356 /* Add space for the header */
2357 skb_push(pkt, SDPCM_HDRLEN);
2358 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2360 prec = prio2prec((pkt->priority & PRIOMASK));
2362 /* Check for existing queue, current flow-control,
2363 pending event, or pending clock */
2364 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2365 bus->sdcnt.fcqueued++;
2367 /* Priority based enq */
2368 spin_lock_bh(&bus->txqlock);
2369 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2370 skb_pull(pkt, SDPCM_HDRLEN);
2371 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2372 brcmu_pkt_buf_free_skb(pkt);
2373 brcmf_err("out of bus->txq !!!\n");
2378 spin_unlock_bh(&bus->txqlock);
2380 if (pktq_len(&bus->txq) >= TXHI) {
2382 brcmf_txflowblock(bus->sdiodev->dev, true);
2386 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2387 qcount[prec] = pktq_plen(&bus->txq, prec);
2390 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2391 if (list_empty(&bus->dpc_tsklst)) {
2392 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2394 brcmf_sdbrcm_adddpctsk(bus);
2395 queue_work(bus->brcmf_wq, &bus->datawork);
2397 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2404 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2411 /* Determine initial transfer parameters */
2412 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2413 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2414 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2418 sdio_claim_host(bus->sdiodev->func[1]);
2420 /* Set the backplane window to include the start address */
2421 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2423 brcmf_err("window change failed\n");
2427 /* Do the transfer(s) */
2429 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2430 write ? "write" : "read", dsize,
2431 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2432 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2433 sdaddr, data, dsize);
2435 brcmf_err("membytes transfer failed\n");
2439 /* Adjust for next transfer (if any) */
2444 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2447 brcmf_err("window change failed\n");
2451 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2456 /* Return the window to backplane enumeration space for core access */
2457 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2458 brcmf_err("FAILED to set window back to 0x%x\n",
2459 bus->sdiodev->sbwad);
2461 sdio_release_host(bus->sdiodev->func[1]);
2467 #define CONSOLE_LINE_MAX 192
2469 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2471 struct brcmf_console *c = &bus->console;
2472 u8 line[CONSOLE_LINE_MAX], ch;
2476 /* Don't do anything until FWREADY updates console address */
2477 if (bus->console_addr == 0)
2480 /* Read console log struct */
2481 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2482 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2487 /* Allocate console buffer (one time only) */
2488 if (c->buf == NULL) {
2489 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2490 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2495 idx = le32_to_cpu(c->log_le.idx);
2497 /* Protect against corrupt value */
2498 if (idx > c->bufsize)
2501 /* Skip reading the console buffer if the index pointer
2506 /* Read the console buffer */
2507 addr = le32_to_cpu(c->log_le.buf);
2508 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2512 while (c->last != idx) {
2513 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2514 if (c->last == idx) {
2515 /* This would output a partial line.
2517 * the buffer pointer and output this
2518 * line next time around.
2523 c->last = c->bufsize - n;
2526 ch = c->buf[c->last];
2527 c->last = (c->last + 1) % c->bufsize;
2534 if (line[n - 1] == '\r')
2537 pr_debug("CONSOLE: %s\n", line);
2546 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2551 bus->ctrl_frame_stat = false;
2552 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2553 SDIO_FUNC_2, F2SYNC, frame, len);
2556 /* On failure, abort the command and terminate the frame */
2557 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2559 bus->sdcnt.tx_sderrs++;
2561 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2563 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2565 bus->sdcnt.f1regdata++;
2567 for (i = 0; i < 3; i++) {
2569 hi = brcmf_sdio_regrb(bus->sdiodev,
2570 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2571 lo = brcmf_sdio_regrb(bus->sdiodev,
2572 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2573 bus->sdcnt.f1regdata += 2;
2574 if (hi == 0 && lo == 0)
2580 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2586 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2594 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2595 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2596 struct brcmf_sdio *bus = sdiodev->bus;
2597 unsigned long flags;
2599 brcmf_dbg(TRACE, "Enter\n");
2601 /* Back the pointer to make a room for bus header */
2602 frame = msg - SDPCM_HDRLEN;
2603 len = (msglen += SDPCM_HDRLEN);
2605 /* Add alignment padding (optional for ctl frames) */
2606 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2611 memset(frame, 0, doff + SDPCM_HDRLEN);
2613 /* precondition: doff < BRCMF_SDALIGN */
2614 doff += SDPCM_HDRLEN;
2616 /* Round send length to next SDIO block */
2617 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2618 u16 pad = bus->blocksize - (len % bus->blocksize);
2619 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2621 } else if (len % BRCMF_SDALIGN) {
2622 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2625 /* Satisfy length-alignment requirements */
2626 if (len & (ALIGNMENT - 1))
2627 len = roundup(len, ALIGNMENT);
2629 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2631 /* Make sure backplane clock is on */
2632 sdio_claim_host(bus->sdiodev->func[1]);
2633 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2634 sdio_release_host(bus->sdiodev->func[1]);
2636 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2637 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2638 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2640 /* Software tag: channel, sequence number, data offset */
2642 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2644 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2645 SDPCM_DOFFSET_MASK);
2646 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2647 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2649 if (!data_ok(bus)) {
2650 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2651 bus->tx_max, bus->tx_seq);
2652 bus->ctrl_frame_stat = true;
2654 bus->ctrl_frame_buf = frame;
2655 bus->ctrl_frame_len = len;
2657 wait_event_interruptible_timeout(bus->ctrl_wait,
2658 !bus->ctrl_frame_stat,
2659 msecs_to_jiffies(2000));
2661 if (!bus->ctrl_frame_stat) {
2662 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2665 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2671 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2672 frame, len, "Tx Frame:\n");
2673 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2675 frame, min_t(u16, len, 16), "TxHdr:\n");
2678 sdio_claim_host(bus->sdiodev->func[1]);
2679 ret = brcmf_tx_frame(bus, frame, len);
2680 sdio_release_host(bus->sdiodev->func[1]);
2681 } while (ret < 0 && retries++ < TXRETRIES);
2684 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2685 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2686 list_empty(&bus->dpc_tsklst)) {
2687 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2689 bus->activity = false;
2690 sdio_claim_host(bus->sdiodev->func[1]);
2691 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2692 sdio_release_host(bus->sdiodev->func[1]);
2694 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2698 bus->sdcnt.tx_ctlerrs++;
2700 bus->sdcnt.tx_ctlpkts++;
2702 return ret ? -EIO : 0;
2706 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2708 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2711 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2712 struct sdpcm_shared *sh)
2717 struct sdpcm_shared_le sh_le;
2720 shaddr = bus->ramsize - 4;
2723 * Read last word in socram to determine
2724 * address of sdpcm_shared structure
2726 sdio_claim_host(bus->sdiodev->func[1]);
2727 rv = brcmf_sdbrcm_membytes(bus, false, shaddr,
2729 sdio_claim_host(bus->sdiodev->func[1]);
2733 addr = le32_to_cpu(addr_le);
2735 brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
2738 * Check if addr is valid.
2739 * NVRAM length at the end of memory should have been overwritten.
2741 if (!brcmf_sdio_valid_shared_address(addr)) {
2742 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2747 /* Read hndrte_shared structure */
2748 sdio_claim_host(bus->sdiodev->func[1]);
2749 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le,
2750 sizeof(struct sdpcm_shared_le));
2751 sdio_release_host(bus->sdiodev->func[1]);
2756 sh->flags = le32_to_cpu(sh_le.flags);
2757 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2758 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2759 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2760 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2761 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2762 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2764 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2765 brcmf_err("sdpcm_shared version mismatch: dhd %d dongle %d\n",
2766 SDPCM_SHARED_VERSION,
2767 sh->flags & SDPCM_SHARED_VERSION_MASK);
2774 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2775 struct sdpcm_shared *sh, char __user *data,
2778 u32 addr, console_ptr, console_size, console_index;
2779 char *conbuf = NULL;
2785 /* obtain console information from device memory */
2786 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2787 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2788 (u8 *)&sh_val, sizeof(u32));
2791 console_ptr = le32_to_cpu(sh_val);
2793 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2794 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2795 (u8 *)&sh_val, sizeof(u32));
2798 console_size = le32_to_cpu(sh_val);
2800 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2801 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2802 (u8 *)&sh_val, sizeof(u32));
2805 console_index = le32_to_cpu(sh_val);
2807 /* allocate buffer for console data */
2808 if (console_size <= CONSOLE_BUFFER_MAX)
2809 conbuf = vzalloc(console_size+1);
2814 /* obtain the console data from device */
2815 conbuf[console_size] = '\0';
2816 rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf,
2821 rv = simple_read_from_buffer(data, count, &pos,
2822 conbuf + console_index,
2823 console_size - console_index);
2828 if (console_index > 0) {
2830 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2831 conbuf, console_index - 1);
2841 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2842 char __user *data, size_t count)
2846 struct brcmf_trap_info tr;
2850 if ((sh->flags & SDPCM_SHARED_TRAP) == 0)
2853 sdio_claim_host(bus->sdiodev->func[1]);
2854 error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr,
2855 sizeof(struct brcmf_trap_info));
2859 nbytes = brcmf_sdio_dump_console(bus, sh, data, count);
2860 sdio_release_host(bus->sdiodev->func[1]);
2864 res = scnprintf(buf, sizeof(buf),
2865 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2866 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2867 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2868 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2869 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2870 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2871 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2872 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2873 le32_to_cpu(tr.pc), sh->trap_addr,
2874 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2875 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2876 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2877 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2879 error = simple_read_from_buffer(data+nbytes, count, &pos, buf, res);
2887 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2888 struct sdpcm_shared *sh, char __user *data,
2893 char file[80] = "?";
2894 char expr[80] = "<???>";
2898 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2899 brcmf_dbg(INFO, "firmware not built with -assert\n");
2901 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2902 brcmf_dbg(INFO, "no assert in dongle\n");
2906 sdio_claim_host(bus->sdiodev->func[1]);
2907 if (sh->assert_file_addr != 0) {
2908 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr,
2913 if (sh->assert_exp_addr != 0) {
2914 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr,
2919 sdio_release_host(bus->sdiodev->func[1]);
2921 res = scnprintf(buf, sizeof(buf),
2922 "dongle assert: %s:%d: assert(%s)\n",
2923 file, sh->assert_line, expr);
2924 return simple_read_from_buffer(data, count, &pos, buf, res);
2927 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2930 struct sdpcm_shared sh;
2932 error = brcmf_sdio_readshared(bus, &sh);
2937 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2938 brcmf_dbg(INFO, "firmware not built with -assert\n");
2939 else if (sh.flags & SDPCM_SHARED_ASSERT)
2940 brcmf_err("assertion in dongle\n");
2942 if (sh.flags & SDPCM_SHARED_TRAP)
2943 brcmf_err("firmware trap in dongle\n");
2948 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
2949 size_t count, loff_t *ppos)
2952 struct sdpcm_shared sh;
2959 error = brcmf_sdio_readshared(bus, &sh);
2963 error = brcmf_sdio_assert_info(bus, &sh, data, count);
2968 error = brcmf_sdio_trap_info(bus, &sh, data, count);
2978 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
2979 size_t count, loff_t *ppos)
2981 struct brcmf_sdio *bus = f->private_data;
2984 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
2987 return (ssize_t)res;
2990 static const struct file_operations brcmf_sdio_forensic_ops = {
2991 .owner = THIS_MODULE,
2992 .open = simple_open,
2993 .read = brcmf_sdio_forensic_read
2996 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2998 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
2999 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3001 if (IS_ERR_OR_NULL(dentry))
3004 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3005 &brcmf_sdio_forensic_ops);
3006 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3009 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3014 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3020 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3026 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3027 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3028 struct brcmf_sdio *bus = sdiodev->bus;
3030 brcmf_dbg(TRACE, "Enter\n");
3032 /* Wait until control frame is available */
3033 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3035 spin_lock_bh(&bus->rxctl_lock);
3037 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3039 buf = bus->rxctl_orig;
3040 bus->rxctl_orig = NULL;
3042 spin_unlock_bh(&bus->rxctl_lock);
3046 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3048 } else if (timeleft == 0) {
3049 brcmf_err("resumed on timeout\n");
3050 brcmf_sdbrcm_checkdied(bus);
3051 } else if (pending) {
3052 brcmf_dbg(CTL, "cancelled\n");
3053 return -ERESTARTSYS;
3055 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3056 brcmf_sdbrcm_checkdied(bus);
3060 bus->sdcnt.rx_ctlpkts++;
3062 bus->sdcnt.rx_ctlerrs++;
3064 return rxlen ? (int)rxlen : -ETIMEDOUT;
3067 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3074 char *nvram_ularray;
3077 /* Even if there are no vars are to be written, we still
3078 need to set the ramsize. */
3079 varaddr = (bus->ramsize - 4) - bus->varsz;
3082 /* Write the vars list */
3083 bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr,
3084 bus->vars, bus->varsz);
3086 /* Verify NVRAM bytes */
3087 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n",
3089 nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC);
3093 /* Upload image to verify downloaded contents. */
3094 memset(nvram_ularray, 0xaa, bus->varsz);
3096 /* Read the vars list to temp buffer for comparison */
3097 bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr,
3098 nvram_ularray, bus->varsz);
3100 brcmf_err("error %d on reading %d nvram bytes at 0x%08x\n",
3101 bcmerror, bus->varsz, varaddr);
3103 /* Compare the org NVRAM with the one read from RAM */
3104 if (memcmp(bus->vars, nvram_ularray, bus->varsz))
3105 brcmf_err("Downloaded NVRAM image is corrupted\n");
3107 brcmf_err("Download/Upload/Compare of NVRAM ok\n");
3109 kfree(nvram_ularray);
3113 /* adjust to the user specified RAM */
3114 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3115 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3116 varaddr, bus->varsz);
3119 * Determine the length token:
3120 * Varsize, converted to words, in lower 16-bits, checksum
3125 varsizew_le = cpu_to_le32(0);
3127 varsizew = bus->varsz / 4;
3128 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3129 varsizew_le = cpu_to_le32(varsizew);
3132 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3133 bus->varsz, varsizew);
3135 /* Write the length token to the last word */
3136 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3137 (u8 *)&varsizew_le, 4);
3142 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3145 struct chip_info *ci = bus->ci;
3147 /* To enter download state, disable ARM and reset SOCRAM.
3148 * To exit download state, simply reset ARM (default is RAM boot).
3151 bus->alp_only = true;
3153 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3155 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3157 /* Clear the top bit of memory */
3160 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3164 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3165 brcmf_err("SOCRAM core is down after reset?\n");
3170 bcmerror = brcmf_sdbrcm_write_vars(bus);
3172 brcmf_err("no vars written to RAM\n");
3176 w_sdreg32(bus, 0xFFFFFFFF,
3177 offsetof(struct sdpcmd_regs, intstatus));
3179 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3181 /* Allow HT Clock now that the ARM is running. */
3182 bus->alp_only = false;
3184 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3190 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3192 if (bus->firmware->size < bus->fw_ptr + len)
3193 len = bus->firmware->size - bus->fw_ptr;
3195 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3200 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3204 u8 *memblock = NULL, *memptr;
3207 brcmf_dbg(INFO, "Enter\n");
3209 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3210 &bus->sdiodev->func[2]->dev);
3212 brcmf_err("Fail to request firmware %d\n", ret);
3217 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3218 if (memblock == NULL) {
3222 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3223 memptr += (BRCMF_SDALIGN -
3224 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3226 /* Download image */
3228 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3229 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3231 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3232 ret, MEMBLOCK, offset);
3242 release_firmware(bus->firmware);
3249 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3250 * and ending in a NUL.
3251 * Removes carriage returns, empty lines, comment lines, and converts
3253 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3257 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3264 uint buf_len, n, len;
3266 len = bus->firmware->size;
3267 varbuf = vmalloc(len);
3271 memcpy(varbuf, bus->firmware->data, len);
3274 findNewline = false;
3277 for (n = 0; n < len; n++) {
3280 if (varbuf[n] == '\r')
3282 if (findNewline && varbuf[n] != '\n')
3284 findNewline = false;
3285 if (varbuf[n] == '#') {
3289 if (varbuf[n] == '\n') {
3299 buf_len = dp - varbuf;
3300 while (dp < varbuf + n)
3304 /* roundup needed for download to device */
3305 bus->varsz = roundup(buf_len + 1, 4);
3306 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3307 if (bus->vars == NULL) {
3313 /* copy the processed variables and add null termination */
3314 memcpy(bus->vars, varbuf, buf_len);
3315 bus->vars[buf_len] = 0;
3321 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3325 if (bus->sdiodev->bus_if->drvr_up)
3328 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3329 &bus->sdiodev->func[2]->dev);
3331 brcmf_err("Fail to request nvram %d\n", ret);
3335 ret = brcmf_process_nvram_vars(bus);
3337 release_firmware(bus->firmware);
3342 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3346 /* Keep arm in reset */
3347 if (brcmf_sdbrcm_download_state(bus, true)) {
3348 brcmf_err("error placing ARM core in reset\n");
3352 /* External image takes precedence if specified */
3353 if (brcmf_sdbrcm_download_code_file(bus)) {
3354 brcmf_err("dongle image file download failed\n");
3358 /* External nvram takes precedence if specified */
3359 if (brcmf_sdbrcm_download_nvram(bus))
3360 brcmf_err("dongle nvram file download failed\n");
3362 /* Take arm out of reset */
3363 if (brcmf_sdbrcm_download_state(bus, false)) {
3364 brcmf_err("error getting out of ARM core reset\n");
3375 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3379 sdio_claim_host(bus->sdiodev->func[1]);
3381 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3383 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3385 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3387 sdio_release_host(bus->sdiodev->func[1]);
3392 static int brcmf_sdbrcm_bus_init(struct device *dev)
3394 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3395 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3396 struct brcmf_sdio *bus = sdiodev->bus;
3397 unsigned long timeout;
3402 brcmf_dbg(TRACE, "Enter\n");
3404 /* try to download image and nvram to the dongle */
3405 if (bus_if->state == BRCMF_BUS_DOWN) {
3406 if (!(brcmf_sdbrcm_download_firmware(bus)))
3410 if (!bus->sdiodev->bus_if->drvr)
3413 /* Start the watchdog timer */
3414 bus->sdcnt.tickcnt = 0;
3415 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3417 sdio_claim_host(bus->sdiodev->func[1]);
3419 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3420 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3421 if (bus->clkstate != CLK_AVAIL)
3424 /* Force clocks on backplane to be sure F2 interrupt propagates */
3425 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3426 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3428 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3429 (saveclk | SBSDIO_FORCE_HT), &err);
3432 brcmf_err("Failed to force clock for F2: err %d\n", err);
3436 /* Enable function 2 (frame transfers) */
3437 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3438 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3439 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3441 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3443 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3445 while (enable != ready) {
3446 ready = brcmf_sdio_regrb(bus->sdiodev,
3447 SDIO_CCCR_IORx, NULL);
3448 if (time_after(jiffies, timeout))
3450 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3451 /* prevent busy waiting if it takes too long */
3452 msleep_interruptible(20);
3455 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3457 /* If F2 successfully enabled, set core and enable interrupts */
3458 if (ready == enable) {
3459 /* Set up the interrupt mask and enable interrupts */
3460 bus->hostintmask = HOSTINTMASK;
3461 w_sdreg32(bus, bus->hostintmask,
3462 offsetof(struct sdpcmd_regs, hostintmask));
3464 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3466 /* Disable F2 again */
3467 enable = SDIO_FUNC_ENABLE_1;
3468 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3472 /* Restore previous clock setting */
3473 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3476 ret = brcmf_sdio_intr_register(bus->sdiodev);
3478 brcmf_err("intr register failed:%d\n", ret);
3481 /* If we didn't come up, turn off backplane clock */
3482 if (bus_if->state != BRCMF_BUS_DATA)
3483 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3486 sdio_release_host(bus->sdiodev->func[1]);
3491 void brcmf_sdbrcm_isr(void *arg)
3493 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3495 brcmf_dbg(TRACE, "Enter\n");
3498 brcmf_err("bus is null pointer, exiting\n");
3502 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3503 brcmf_err("bus is down. we have nothing to do\n");
3506 /* Count the interrupt call */
3507 bus->sdcnt.intrcount++;
3509 atomic_set(&bus->ipend, 1);
3511 if (brcmf_sdio_intr_rstatus(bus)) {
3512 brcmf_err("failed backplane access\n");
3513 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3516 /* Disable additional interrupts (is this needed now)? */
3518 brcmf_err("isr w/o interrupt configured!\n");
3520 brcmf_sdbrcm_adddpctsk(bus);
3521 queue_work(bus->brcmf_wq, &bus->datawork);
3524 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3527 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3529 unsigned long flags;
3531 brcmf_dbg(TIMER, "Enter\n");
3533 /* Poll period: check device if appropriate. */
3534 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3537 /* Reset poll tick */
3540 /* Check device if no interrupts */
3542 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3544 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3545 if (list_empty(&bus->dpc_tsklst)) {
3547 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3549 sdio_claim_host(bus->sdiodev->func[1]);
3550 devpend = brcmf_sdio_regrb(bus->sdiodev,
3553 sdio_release_host(bus->sdiodev->func[1]);
3555 devpend & (INTR_STATUS_FUNC1 |
3558 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3562 /* If there is something, make like the ISR and
3565 bus->sdcnt.pollcnt++;
3566 atomic_set(&bus->ipend, 1);
3568 brcmf_sdbrcm_adddpctsk(bus);
3569 queue_work(bus->brcmf_wq, &bus->datawork);
3573 /* Update interrupt tracking */
3574 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3577 /* Poll for console output periodically */
3578 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3579 bus->console_interval != 0) {
3580 bus->console.count += BRCMF_WD_POLL_MS;
3581 if (bus->console.count >= bus->console_interval) {
3582 bus->console.count -= bus->console_interval;
3583 sdio_claim_host(bus->sdiodev->func[1]);
3584 /* Make sure backplane clock is on */
3585 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3586 if (brcmf_sdbrcm_readconsole(bus) < 0)
3588 bus->console_interval = 0;
3589 sdio_release_host(bus->sdiodev->func[1]);
3594 /* On idle timeout clear activity flag and/or turn off clock */
3595 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3596 if (++bus->idlecount >= bus->idletime) {
3598 if (bus->activity) {
3599 bus->activity = false;
3600 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3602 sdio_claim_host(bus->sdiodev->func[1]);
3603 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3604 sdio_release_host(bus->sdiodev->func[1]);
3609 return (atomic_read(&bus->ipend) > 0);
3612 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3614 if (chipid == BCM43241_CHIP_ID)
3616 if (chipid == BCM4329_CHIP_ID)
3618 if (chipid == BCM4330_CHIP_ID)
3620 if (chipid == BCM4334_CHIP_ID)
3625 static void brcmf_sdio_dataworker(struct work_struct *work)
3627 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3629 struct list_head *cur_hd, *tmp_hd;
3630 unsigned long flags;
3632 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3633 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
3634 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3636 brcmf_sdbrcm_dpc(bus);
3638 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3642 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3645 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3647 brcmf_dbg(TRACE, "Enter\n");
3650 bus->rxctl = bus->rxbuf = NULL;
3653 kfree(bus->databuf);
3654 bus->databuf = NULL;
3657 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3659 brcmf_dbg(TRACE, "Enter\n");
3661 if (bus->sdiodev->bus_if->maxctl) {
3663 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3664 ALIGNMENT) + BRCMF_SDALIGN;
3665 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3670 /* Allocate buffer to receive glomed packet */
3671 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3672 if (!(bus->databuf)) {
3673 /* release rxbuf which was already located as above */
3679 /* Align the buffer */
3680 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3681 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3682 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3684 bus->dataptr = bus->databuf;
3693 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3701 bus->alp_only = true;
3703 sdio_claim_host(bus->sdiodev->func[1]);
3705 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3706 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3709 * Force PLL off until brcmf_sdio_chip_attach()
3710 * programs PLL control regs
3713 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3714 BRCMF_INIT_CLKCTL1, &err);
3716 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3717 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3719 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3720 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3721 err, BRCMF_INIT_CLKCTL1, clkctl);
3725 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3726 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3730 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3731 brcmf_err("unsupported chip: 0x%04x\n", bus->ci->chip);
3735 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3736 SDIO_DRIVE_STRENGTH);
3738 /* Get info on the SOCRAM cores... */
3739 bus->ramsize = bus->ci->ramsize;
3740 if (!(bus->ramsize)) {
3741 brcmf_err("failed to find SOCRAM memory!\n");
3745 /* Set core control so an SDIO reset does a backplane reset */
3746 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3747 reg_addr = bus->ci->c_inf[idx].base +
3748 offsetof(struct sdpcmd_regs, corecontrol);
3749 reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL);
3750 brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);
3752 sdio_release_host(bus->sdiodev->func[1]);
3754 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3756 /* Locate an appropriately-aligned portion of hdrbuf */
3757 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3760 /* Set the poll and/or interrupt flags */
3769 sdio_release_host(bus->sdiodev->func[1]);
3773 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3775 brcmf_dbg(TRACE, "Enter\n");
3777 sdio_claim_host(bus->sdiodev->func[1]);
3779 /* Disable F2 to clear any intermediate frame state on the dongle */
3780 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3781 SDIO_FUNC_ENABLE_1, NULL);
3783 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3784 bus->rxflow = false;
3786 /* Done with backplane-dependent accesses, can drop clock... */
3787 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3789 sdio_release_host(bus->sdiodev->func[1]);
3791 /* ...and initialize clock/power states */
3792 bus->clkstate = CLK_SDONLY;
3793 bus->idletime = BRCMF_IDLE_INTERVAL;
3794 bus->idleclock = BRCMF_IDLE_ACTIVE;
3796 /* Query the F2 block size, set roundup accordingly */
3797 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3798 bus->roundup = min(max_roundup, bus->blocksize);
3800 /* bus module does not support packet chaining */
3801 bus->use_rxchain = false;
3802 bus->sd_rxchain = false;
3808 brcmf_sdbrcm_watchdog_thread(void *data)
3810 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3812 allow_signal(SIGTERM);
3813 /* Run until signal received */
3815 if (kthread_should_stop())
3817 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3818 brcmf_sdbrcm_bus_watchdog(bus);
3819 /* Count the tick for reference */
3820 bus->sdcnt.tickcnt++;
3828 brcmf_sdbrcm_watchdog(unsigned long data)
3830 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3832 if (bus->watchdog_tsk) {
3833 complete(&bus->watchdog_wait);
3834 /* Reschedule the watchdog */
3835 if (bus->wd_timer_valid)
3836 mod_timer(&bus->timer,
3837 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3841 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3843 brcmf_dbg(TRACE, "Enter\n");
3846 sdio_claim_host(bus->sdiodev->func[1]);
3847 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3848 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3849 sdio_release_host(bus->sdiodev->func[1]);
3850 brcmf_sdio_chip_detach(&bus->ci);
3851 if (bus->vars && bus->varsz)
3856 brcmf_dbg(TRACE, "Disconnected\n");
3859 /* Detach and free everything */
3860 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3862 brcmf_dbg(TRACE, "Enter\n");
3865 /* De-register interrupt handler */
3866 brcmf_sdio_intr_unregister(bus->sdiodev);
3868 cancel_work_sync(&bus->datawork);
3870 destroy_workqueue(bus->brcmf_wq);
3872 if (bus->sdiodev->bus_if->drvr) {
3873 brcmf_detach(bus->sdiodev->dev);
3874 brcmf_sdbrcm_release_dongle(bus);
3877 brcmf_sdbrcm_release_malloc(bus);
3882 brcmf_dbg(TRACE, "Disconnected\n");
3885 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3886 .stop = brcmf_sdbrcm_bus_stop,
3887 .init = brcmf_sdbrcm_bus_init,
3888 .txdata = brcmf_sdbrcm_bus_txdata,
3889 .txctl = brcmf_sdbrcm_bus_txctl,
3890 .rxctl = brcmf_sdbrcm_bus_rxctl,
3893 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3896 struct brcmf_sdio *bus;
3897 struct brcmf_bus_dcmd *dlst;
3899 u32 dngl_txglomalign;
3902 brcmf_dbg(TRACE, "Enter\n");
3904 /* We make an assumption about address window mappings:
3905 * regsva == SI_ENUM_BASE*/
3907 /* Allocate private bus interface state */
3908 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3912 bus->sdiodev = sdiodev;
3914 skb_queue_head_init(&bus->glom);
3915 bus->txbound = BRCMF_TXBOUND;
3916 bus->rxbound = BRCMF_RXBOUND;
3917 bus->txminmax = BRCMF_TXMINMAX;
3918 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3920 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3921 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3922 if (bus->brcmf_wq == NULL) {
3923 brcmf_err("insufficient memory to create txworkqueue\n");
3927 /* attempt to attach to the dongle */
3928 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3929 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
3933 spin_lock_init(&bus->rxctl_lock);
3934 spin_lock_init(&bus->txqlock);
3935 init_waitqueue_head(&bus->ctrl_wait);
3936 init_waitqueue_head(&bus->dcmd_resp_wait);
3938 /* Set up the watchdog timer */
3939 init_timer(&bus->timer);
3940 bus->timer.data = (unsigned long)bus;
3941 bus->timer.function = brcmf_sdbrcm_watchdog;
3943 /* Initialize watchdog thread */
3944 init_completion(&bus->watchdog_wait);
3945 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3946 bus, "brcmf_watchdog");
3947 if (IS_ERR(bus->watchdog_tsk)) {
3948 pr_warn("brcmf_watchdog thread failed to start\n");
3949 bus->watchdog_tsk = NULL;
3951 /* Initialize DPC thread */
3952 INIT_LIST_HEAD(&bus->dpc_tsklst);
3953 spin_lock_init(&bus->dpc_tl_lock);
3955 /* Assign bus interface call back */
3956 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3957 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3959 /* Attach to the brcmf/OS/network interface */
3960 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3962 brcmf_err("brcmf_attach failed\n");
3966 /* Allocate buffers */
3967 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3968 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
3972 if (!(brcmf_sdbrcm_probe_init(bus))) {
3973 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
3977 brcmf_sdio_debugfs_create(bus);
3978 brcmf_dbg(INFO, "completed!!\n");
3980 /* sdio bus core specific dcmd */
3981 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3982 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
3984 if (bus->ci->c_inf[idx].rev < 12) {
3985 /* for sdio core rev < 12, disable txgloming */
3987 dlst->name = "bus:txglom";
3988 dlst->param = (char *)&dngl_txglom;
3989 dlst->param_len = sizeof(u32);
3991 /* otherwise, set txglomalign */
3992 dngl_txglomalign = bus->sdiodev->bus_if->align;
3993 dlst->name = "bus:txglomalign";
3994 dlst->param = (char *)&dngl_txglomalign;
3995 dlst->param_len = sizeof(u32);
3997 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
4000 /* if firmware path present try to download and bring up bus */
4001 ret = brcmf_bus_start(bus->sdiodev->dev);
4003 brcmf_err("dongle is not responding\n");
4010 brcmf_sdbrcm_release(bus);
4014 void brcmf_sdbrcm_disconnect(void *ptr)
4016 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4018 brcmf_dbg(TRACE, "Enter\n");
4021 brcmf_sdbrcm_release(bus);
4023 brcmf_dbg(TRACE, "Disconnected\n");
4027 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4029 /* Totally stop the timer */
4030 if (!wdtick && bus->wd_timer_valid) {
4031 del_timer_sync(&bus->timer);
4032 bus->wd_timer_valid = false;
4033 bus->save_ms = wdtick;
4037 /* don't start the wd until fw is loaded */
4038 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4042 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4043 if (bus->wd_timer_valid)
4044 /* Stop timer and restart at new value */
4045 del_timer_sync(&bus->timer);
4047 /* Create timer again when watchdog period is
4048 dynamically changed or in the first instance
4050 bus->timer.expires =
4051 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4052 add_timer(&bus->timer);
4055 /* Re arm the timer, at last watchdog period */
4056 mod_timer(&bus->timer,
4057 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4060 bus->wd_timer_valid = true;
4061 bus->save_ms = wdtick;