]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/blob - drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c
Merge branch 'akpm' (Andrew's patch-bomb)
[can-eth-gw-linux.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic_ctx.c
1 /*
2  * QLogic qlcnic NIC Driver
3  * Copyright (c)  2009-2010 QLogic Corporation
4  *
5  * See LICENSE.qlcnic for copyright and licensing details.
6  */
7
8 #include "qlcnic.h"
9
10 static int qlcnic_is_valid_nic_func(struct qlcnic_adapter *adapter, u8 pci_func)
11 {
12         int i;
13
14         for (i = 0; i < adapter->ahw->act_pci_func; i++) {
15                 if (adapter->npars[i].pci_func == pci_func)
16                         return i;
17         }
18
19         return -1;
20 }
21
22 static u32
23 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
24 {
25         u32 rsp;
26         int timeout = 0;
27
28         do {
29                 /* give atleast 1ms for firmware to respond */
30                 mdelay(1);
31
32                 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
33                         return QLCNIC_CDRP_RSP_TIMEOUT;
34
35                 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
36         } while (!QLCNIC_CDRP_IS_RSP(rsp));
37
38         return rsp;
39 }
40
41 void
42 qlcnic_issue_cmd(struct qlcnic_adapter *adapter, struct qlcnic_cmd_args *cmd)
43 {
44         u32 rsp;
45         u32 signature;
46         struct pci_dev *pdev = adapter->pdev;
47         struct qlcnic_hardware_context *ahw = adapter->ahw;
48
49         signature = QLCNIC_CDRP_SIGNATURE_MAKE(ahw->pci_func,
50                                                adapter->ahw->fw_hal_version);
51
52         /* Acquire semaphore before accessing CRB */
53         if (qlcnic_api_lock(adapter)) {
54                 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
55                 return;
56         }
57
58         QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
59         QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, cmd->req.arg1);
60         QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, cmd->req.arg2);
61         QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, cmd->req.arg3);
62         QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET,
63                 QLCNIC_CDRP_FORM_CMD(cmd->req.cmd));
64
65         rsp = qlcnic_poll_rsp(adapter);
66
67         if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
68                 dev_err(&pdev->dev, "CDRP response timeout.\n");
69                 cmd->rsp.cmd = QLCNIC_RCODE_TIMEOUT;
70         } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
71                 cmd->rsp.cmd = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
72                 switch (cmd->rsp.cmd) {
73                 case QLCNIC_RCODE_INVALID_ARGS:
74                         dev_err(&pdev->dev, "CDRP invalid args: 0x%x.\n",
75                                 cmd->rsp.cmd);
76                         break;
77                 case QLCNIC_RCODE_NOT_SUPPORTED:
78                 case QLCNIC_RCODE_NOT_IMPL:
79                         dev_err(&pdev->dev,
80                                 "CDRP command not supported: 0x%x.\n",
81                                 cmd->rsp.cmd);
82                         break;
83                 case QLCNIC_RCODE_NOT_PERMITTED:
84                         dev_err(&pdev->dev,
85                                 "CDRP requested action not permitted: 0x%x.\n",
86                                 cmd->rsp.cmd);
87                         break;
88                 case QLCNIC_RCODE_INVALID:
89                         dev_err(&pdev->dev,
90                                 "CDRP invalid or unknown cmd received: 0x%x.\n",
91                                 cmd->rsp.cmd);
92                         break;
93                 case QLCNIC_RCODE_TIMEOUT:
94                         dev_err(&pdev->dev, "CDRP command timeout: 0x%x.\n",
95                                 cmd->rsp.cmd);
96                         break;
97                 default:
98                         dev_err(&pdev->dev, "CDRP command failed: 0x%x.\n",
99                                 cmd->rsp.cmd);
100                 }
101         } else if (rsp == QLCNIC_CDRP_RSP_OK) {
102                 cmd->rsp.cmd = QLCNIC_RCODE_SUCCESS;
103                 if (cmd->rsp.arg2)
104                         cmd->rsp.arg2 = QLCRD32(adapter,
105                                 QLCNIC_ARG2_CRB_OFFSET);
106                 if (cmd->rsp.arg3)
107                         cmd->rsp.arg3 = QLCRD32(adapter,
108                                 QLCNIC_ARG3_CRB_OFFSET);
109         }
110         if (cmd->rsp.arg1)
111                 cmd->rsp.arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
112
113         /* Release semaphore */
114         qlcnic_api_unlock(adapter);
115
116 }
117
118 static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u32 temp_size)
119 {
120         uint64_t sum = 0;
121         int count = temp_size / sizeof(uint32_t);
122         while (count-- > 0)
123                 sum += *temp_buffer++;
124         while (sum >> 32)
125                 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
126         return ~sum;
127 }
128
129 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
130 {
131         int err, i;
132         void *tmp_addr;
133         u32 temp_size, version, csum, *template;
134         __le32 *tmp_buf;
135         struct qlcnic_cmd_args cmd;
136         struct qlcnic_hardware_context *ahw;
137         struct qlcnic_dump_template_hdr *tmpl_hdr, *tmp_tmpl;
138         dma_addr_t tmp_addr_t = 0;
139
140         ahw = adapter->ahw;
141         memset(&cmd, 0, sizeof(cmd));
142         cmd.req.cmd = QLCNIC_CDRP_CMD_TEMP_SIZE;
143         memset(&cmd.rsp, 1, sizeof(struct _cdrp_cmd));
144         qlcnic_issue_cmd(adapter, &cmd);
145         if (cmd.rsp.cmd != QLCNIC_RCODE_SUCCESS) {
146                 dev_info(&adapter->pdev->dev,
147                         "Can't get template size %d\n", cmd.rsp.cmd);
148                 err = -EIO;
149                 return err;
150         }
151         temp_size = cmd.rsp.arg2;
152         version = cmd.rsp.arg3;
153         if (!temp_size)
154                 return -EIO;
155
156         tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
157                         &tmp_addr_t, GFP_KERNEL);
158         if (!tmp_addr) {
159                 dev_err(&adapter->pdev->dev,
160                         "Can't get memory for FW dump template\n");
161                 return -ENOMEM;
162         }
163         memset(&cmd.rsp, 0, sizeof(struct _cdrp_cmd));
164         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_TEMP_HDR;
165         cmd.req.arg1 = LSD(tmp_addr_t);
166         cmd.req.arg2 = MSD(tmp_addr_t);
167         cmd.req.arg3 = temp_size;
168         qlcnic_issue_cmd(adapter, &cmd);
169
170         err = cmd.rsp.cmd;
171         if (err != QLCNIC_RCODE_SUCCESS) {
172                 dev_err(&adapter->pdev->dev,
173                         "Failed to get mini dump template header %d\n", err);
174                 err = -EIO;
175                 goto error;
176         }
177         tmp_tmpl = tmp_addr;
178         ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
179         if (!ahw->fw_dump.tmpl_hdr) {
180                 err = -EIO;
181                 goto error;
182         }
183         tmp_buf = tmp_addr;
184         template = (u32 *) ahw->fw_dump.tmpl_hdr;
185         for (i = 0; i < temp_size/sizeof(u32); i++)
186                 *template++ = __le32_to_cpu(*tmp_buf++);
187
188         csum = qlcnic_temp_checksum((u32 *)ahw->fw_dump.tmpl_hdr, temp_size);
189         if (csum) {
190                 dev_err(&adapter->pdev->dev,
191                         "Template header checksum validation failed\n");
192                 err = -EIO;
193                 goto error;
194         }
195
196         tmpl_hdr = ahw->fw_dump.tmpl_hdr;
197         tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
198         ahw->fw_dump.enable = 1;
199 error:
200         dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
201         return err;
202 }
203
204 int
205 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
206 {
207         struct qlcnic_cmd_args cmd;
208         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
209
210         memset(&cmd, 0, sizeof(cmd));
211         cmd.req.cmd = QLCNIC_CDRP_CMD_SET_MTU;
212         cmd.req.arg1 = recv_ctx->context_id;
213         cmd.req.arg2 = mtu;
214         cmd.req.arg3 = 0;
215         if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
216                 qlcnic_issue_cmd(adapter, &cmd);
217                 if (cmd.rsp.cmd) {
218                         dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
219                         return -EIO;
220                 }
221         }
222
223         return 0;
224 }
225
226 static int
227 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
228 {
229         void *addr;
230         struct qlcnic_hostrq_rx_ctx *prq;
231         struct qlcnic_cardrsp_rx_ctx *prsp;
232         struct qlcnic_hostrq_rds_ring *prq_rds;
233         struct qlcnic_hostrq_sds_ring *prq_sds;
234         struct qlcnic_cardrsp_rds_ring *prsp_rds;
235         struct qlcnic_cardrsp_sds_ring *prsp_sds;
236         struct qlcnic_host_rds_ring *rds_ring;
237         struct qlcnic_host_sds_ring *sds_ring;
238         struct qlcnic_cmd_args cmd;
239
240         dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
241         u64 phys_addr;
242
243         u8 i, nrds_rings, nsds_rings;
244         size_t rq_size, rsp_size;
245         u32 cap, reg, val, reg2;
246         int err;
247         u16 temp;
248
249         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
250
251         nrds_rings = adapter->max_rds_rings;
252         nsds_rings = adapter->max_sds_rings;
253
254         rq_size =
255                 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
256                                                 nsds_rings);
257         rsp_size =
258                 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
259                                                 nsds_rings);
260
261         addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
262                         &hostrq_phys_addr, GFP_KERNEL);
263         if (addr == NULL)
264                 return -ENOMEM;
265         prq = addr;
266
267         addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
268                         &cardrsp_phys_addr, GFP_KERNEL);
269         if (addr == NULL) {
270                 err = -ENOMEM;
271                 goto out_free_rq;
272         }
273         prsp = addr;
274
275         prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
276
277         cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
278                                                 | QLCNIC_CAP0_VALIDOFF);
279         cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
280
281         if (adapter->flags & QLCNIC_FW_LRO_MSS_CAP)
282                 cap |= QLCNIC_CAP0_LRO_MSS;
283
284         temp = offsetof(struct qlcnic_hostrq_rx_ctx, msix_handler);
285         prq->valid_field_offset = cpu_to_le16(temp);
286         prq->txrx_sds_binding = nsds_rings - 1;
287
288         prq->capabilities[0] = cpu_to_le32(cap);
289         prq->host_int_crb_mode =
290                 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
291         prq->host_rds_crb_mode =
292                 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
293
294         prq->num_rds_rings = cpu_to_le16(nrds_rings);
295         prq->num_sds_rings = cpu_to_le16(nsds_rings);
296         prq->rds_ring_offset = 0;
297
298         val = le32_to_cpu(prq->rds_ring_offset) +
299                 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
300         prq->sds_ring_offset = cpu_to_le32(val);
301
302         prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
303                         le32_to_cpu(prq->rds_ring_offset));
304
305         for (i = 0; i < nrds_rings; i++) {
306
307                 rds_ring = &recv_ctx->rds_rings[i];
308                 rds_ring->producer = 0;
309
310                 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
311                 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
312                 prq_rds[i].ring_kind = cpu_to_le32(i);
313                 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
314         }
315
316         prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
317                         le32_to_cpu(prq->sds_ring_offset));
318
319         for (i = 0; i < nsds_rings; i++) {
320
321                 sds_ring = &recv_ctx->sds_rings[i];
322                 sds_ring->consumer = 0;
323                 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
324
325                 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
326                 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
327                 prq_sds[i].msi_index = cpu_to_le16(i);
328         }
329
330         phys_addr = hostrq_phys_addr;
331         memset(&cmd, 0, sizeof(cmd));
332         cmd.req.arg1 = (u32) (phys_addr >> 32);
333         cmd.req.arg2 = (u32) (phys_addr & 0xffffffff);
334         cmd.req.arg3 = rq_size;
335         cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_RX_CTX;
336         qlcnic_issue_cmd(adapter, &cmd);
337         err = cmd.rsp.cmd;
338         if (err) {
339                 dev_err(&adapter->pdev->dev,
340                         "Failed to create rx ctx in firmware%d\n", err);
341                 goto out_free_rsp;
342         }
343
344
345         prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
346                          &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
347
348         for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
349                 rds_ring = &recv_ctx->rds_rings[i];
350
351                 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
352                 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
353         }
354
355         prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
356                         &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
357
358         for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
359                 sds_ring = &recv_ctx->sds_rings[i];
360
361                 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
362                 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
363
364                 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
365                 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
366         }
367
368         recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
369         recv_ctx->context_id = le16_to_cpu(prsp->context_id);
370         recv_ctx->virt_port = prsp->virt_port;
371
372 out_free_rsp:
373         dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
374                 cardrsp_phys_addr);
375 out_free_rq:
376         dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
377         return err;
378 }
379
380 static void
381 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
382 {
383         struct qlcnic_cmd_args cmd;
384         struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
385
386         memset(&cmd, 0, sizeof(cmd));
387         cmd.req.arg1 = recv_ctx->context_id;
388         cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
389         cmd.req.arg3 = 0;
390         cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_RX_CTX;
391         qlcnic_issue_cmd(adapter, &cmd);
392         if (cmd.rsp.cmd)
393                 dev_err(&adapter->pdev->dev,
394                         "Failed to destroy rx ctx in firmware\n");
395
396         recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
397 }
398
399 static int
400 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
401 {
402         struct qlcnic_hostrq_tx_ctx     *prq;
403         struct qlcnic_hostrq_cds_ring   *prq_cds;
404         struct qlcnic_cardrsp_tx_ctx    *prsp;
405         void    *rq_addr, *rsp_addr;
406         size_t  rq_size, rsp_size;
407         u32     temp;
408         struct qlcnic_cmd_args cmd;
409         int     err;
410         u64     phys_addr;
411         dma_addr_t      rq_phys_addr, rsp_phys_addr;
412         struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
413
414         /* reset host resources */
415         tx_ring->producer = 0;
416         tx_ring->sw_consumer = 0;
417         *(tx_ring->hw_consumer) = 0;
418
419         rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
420         rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
421                         &rq_phys_addr, GFP_KERNEL);
422         if (!rq_addr)
423                 return -ENOMEM;
424
425         rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
426         rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
427                         &rsp_phys_addr, GFP_KERNEL);
428         if (!rsp_addr) {
429                 err = -ENOMEM;
430                 goto out_free_rq;
431         }
432
433         memset(rq_addr, 0, rq_size);
434         prq = rq_addr;
435
436         memset(rsp_addr, 0, rsp_size);
437         prsp = rsp_addr;
438
439         prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
440
441         temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
442                                         QLCNIC_CAP0_LSO);
443         prq->capabilities[0] = cpu_to_le32(temp);
444
445         prq->host_int_crb_mode =
446                 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
447
448         prq->interrupt_ctl = 0;
449         prq->msi_index = 0;
450         prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
451
452         prq_cds = &prq->cds_ring;
453
454         prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
455         prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
456
457         phys_addr = rq_phys_addr;
458         memset(&cmd, 0, sizeof(cmd));
459         cmd.req.arg1 = (u32)(phys_addr >> 32);
460         cmd.req.arg2 = ((u32)phys_addr & 0xffffffff);
461         cmd.req.arg3 = rq_size;
462         cmd.req.cmd = QLCNIC_CDRP_CMD_CREATE_TX_CTX;
463         qlcnic_issue_cmd(adapter, &cmd);
464         err = cmd.rsp.cmd;
465
466         if (err == QLCNIC_RCODE_SUCCESS) {
467                 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
468                 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
469
470                 adapter->tx_ring->ctx_id = le16_to_cpu(prsp->context_id);
471         } else {
472                 dev_err(&adapter->pdev->dev,
473                         "Failed to create tx ctx in firmware%d\n", err);
474                 err = -EIO;
475         }
476
477         dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
478                 rsp_phys_addr);
479
480 out_free_rq:
481         dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
482
483         return err;
484 }
485
486 static void
487 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
488 {
489         struct qlcnic_cmd_args cmd;
490
491         memset(&cmd, 0, sizeof(cmd));
492         cmd.req.arg1 = adapter->tx_ring->ctx_id;
493         cmd.req.arg2 = QLCNIC_DESTROY_CTX_RESET;
494         cmd.req.arg3 = 0;
495         cmd.req.cmd = QLCNIC_CDRP_CMD_DESTROY_TX_CTX;
496         qlcnic_issue_cmd(adapter, &cmd);
497         if (cmd.rsp.cmd)
498                 dev_err(&adapter->pdev->dev,
499                         "Failed to destroy tx ctx in firmware\n");
500 }
501
502 int
503 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
504 {
505         struct qlcnic_cmd_args cmd;
506
507         memset(&cmd, 0, sizeof(cmd));
508         cmd.req.arg1 = config;
509         cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIG_PORT;
510         qlcnic_issue_cmd(adapter, &cmd);
511
512         return cmd.rsp.cmd;
513 }
514
515 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
516 {
517         void *addr;
518         int err;
519         int ring;
520         struct qlcnic_recv_context *recv_ctx;
521         struct qlcnic_host_rds_ring *rds_ring;
522         struct qlcnic_host_sds_ring *sds_ring;
523         struct qlcnic_host_tx_ring *tx_ring;
524
525         struct pci_dev *pdev = adapter->pdev;
526
527         recv_ctx = adapter->recv_ctx;
528         tx_ring = adapter->tx_ring;
529
530         tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
531                 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
532         if (tx_ring->hw_consumer == NULL) {
533                 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
534                 return -ENOMEM;
535         }
536
537         /* cmd desc ring */
538         addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
539                         &tx_ring->phys_addr, GFP_KERNEL);
540
541         if (addr == NULL) {
542                 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
543                 err = -ENOMEM;
544                 goto err_out_free;
545         }
546
547         tx_ring->desc_head = addr;
548
549         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
550                 rds_ring = &recv_ctx->rds_rings[ring];
551                 addr = dma_alloc_coherent(&adapter->pdev->dev,
552                                 RCV_DESC_RINGSIZE(rds_ring),
553                                 &rds_ring->phys_addr, GFP_KERNEL);
554                 if (addr == NULL) {
555                         dev_err(&pdev->dev,
556                                 "failed to allocate rds ring [%d]\n", ring);
557                         err = -ENOMEM;
558                         goto err_out_free;
559                 }
560                 rds_ring->desc_head = addr;
561
562         }
563
564         for (ring = 0; ring < adapter->max_sds_rings; ring++) {
565                 sds_ring = &recv_ctx->sds_rings[ring];
566
567                 addr = dma_alloc_coherent(&adapter->pdev->dev,
568                                 STATUS_DESC_RINGSIZE(sds_ring),
569                                 &sds_ring->phys_addr, GFP_KERNEL);
570                 if (addr == NULL) {
571                         dev_err(&pdev->dev,
572                                 "failed to allocate sds ring [%d]\n", ring);
573                         err = -ENOMEM;
574                         goto err_out_free;
575                 }
576                 sds_ring->desc_head = addr;
577         }
578
579         return 0;
580
581 err_out_free:
582         qlcnic_free_hw_resources(adapter);
583         return err;
584 }
585
586
587 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
588 {
589         int err;
590
591         if (adapter->flags & QLCNIC_NEED_FLR) {
592                 pci_reset_function(adapter->pdev);
593                 adapter->flags &= ~QLCNIC_NEED_FLR;
594         }
595
596         err = qlcnic_fw_cmd_create_rx_ctx(adapter);
597         if (err)
598                 return err;
599
600         err = qlcnic_fw_cmd_create_tx_ctx(adapter);
601         if (err) {
602                 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
603                 return err;
604         }
605
606         set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
607         return 0;
608 }
609
610 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
611 {
612         if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
613                 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
614                 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
615
616                 /* Allow dma queues to drain after context reset */
617                 mdelay(20);
618         }
619 }
620
621 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
622 {
623         struct qlcnic_recv_context *recv_ctx;
624         struct qlcnic_host_rds_ring *rds_ring;
625         struct qlcnic_host_sds_ring *sds_ring;
626         struct qlcnic_host_tx_ring *tx_ring;
627         int ring;
628
629         recv_ctx = adapter->recv_ctx;
630
631         tx_ring = adapter->tx_ring;
632         if (tx_ring->hw_consumer != NULL) {
633                 dma_free_coherent(&adapter->pdev->dev,
634                                 sizeof(u32),
635                                 tx_ring->hw_consumer,
636                                 tx_ring->hw_cons_phys_addr);
637                 tx_ring->hw_consumer = NULL;
638         }
639
640         if (tx_ring->desc_head != NULL) {
641                 dma_free_coherent(&adapter->pdev->dev,
642                                 TX_DESC_RINGSIZE(tx_ring),
643                                 tx_ring->desc_head, tx_ring->phys_addr);
644                 tx_ring->desc_head = NULL;
645         }
646
647         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
648                 rds_ring = &recv_ctx->rds_rings[ring];
649
650                 if (rds_ring->desc_head != NULL) {
651                         dma_free_coherent(&adapter->pdev->dev,
652                                         RCV_DESC_RINGSIZE(rds_ring),
653                                         rds_ring->desc_head,
654                                         rds_ring->phys_addr);
655                         rds_ring->desc_head = NULL;
656                 }
657         }
658
659         for (ring = 0; ring < adapter->max_sds_rings; ring++) {
660                 sds_ring = &recv_ctx->sds_rings[ring];
661
662                 if (sds_ring->desc_head != NULL) {
663                         dma_free_coherent(&adapter->pdev->dev,
664                                 STATUS_DESC_RINGSIZE(sds_ring),
665                                 sds_ring->desc_head,
666                                 sds_ring->phys_addr);
667                         sds_ring->desc_head = NULL;
668                 }
669         }
670 }
671
672
673 /* Get MAC address of a NIC partition */
674 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
675 {
676         int err;
677         struct qlcnic_cmd_args cmd;
678
679         memset(&cmd, 0, sizeof(cmd));
680         cmd.req.arg1 = adapter->ahw->pci_func | BIT_8;
681         cmd.req.cmd = QLCNIC_CDRP_CMD_MAC_ADDRESS;
682         cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
683         qlcnic_issue_cmd(adapter, &cmd);
684         err = cmd.rsp.cmd;
685
686         if (err == QLCNIC_RCODE_SUCCESS)
687                 qlcnic_fetch_mac(cmd.rsp.arg1, cmd.rsp.arg2, 0, mac);
688         else {
689                 dev_err(&adapter->pdev->dev,
690                         "Failed to get mac address%d\n", err);
691                 err = -EIO;
692         }
693
694         return err;
695 }
696
697 /* Get info of a NIC partition */
698 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
699                                 struct qlcnic_info *npar_info, u8 func_id)
700 {
701         int     err;
702         dma_addr_t nic_dma_t;
703         struct qlcnic_info_le *nic_info;
704         void *nic_info_addr;
705         struct qlcnic_cmd_args cmd;
706         size_t  nic_size = sizeof(struct qlcnic_info_le);
707
708         nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
709                                 &nic_dma_t, GFP_KERNEL);
710         if (!nic_info_addr)
711                 return -ENOMEM;
712         memset(nic_info_addr, 0, nic_size);
713
714         nic_info = nic_info_addr;
715         memset(&cmd, 0, sizeof(cmd));
716         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_NIC_INFO;
717         cmd.req.arg1 = MSD(nic_dma_t);
718         cmd.req.arg2 = LSD(nic_dma_t);
719         cmd.req.arg3 = (func_id << 16 | nic_size);
720         qlcnic_issue_cmd(adapter, &cmd);
721         err = cmd.rsp.cmd;
722
723         if (err == QLCNIC_RCODE_SUCCESS) {
724                 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
725                 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
726                 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
727                 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
728                 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
729                 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
730                 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
731                 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
732                 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
733                 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
734
735                 dev_info(&adapter->pdev->dev,
736                         "phy port: %d switch_mode: %d,\n"
737                         "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
738                         "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
739                         npar_info->phys_port, npar_info->switch_mode,
740                         npar_info->max_tx_ques, npar_info->max_rx_ques,
741                         npar_info->min_tx_bw, npar_info->max_tx_bw,
742                         npar_info->max_mtu, npar_info->capabilities);
743         } else {
744                 dev_err(&adapter->pdev->dev,
745                         "Failed to get nic info%d\n", err);
746                 err = -EIO;
747         }
748
749         dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
750                 nic_dma_t);
751         return err;
752 }
753
754 /* Configure a NIC partition */
755 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
756 {
757         int err = -EIO;
758         dma_addr_t nic_dma_t;
759         void *nic_info_addr;
760         struct qlcnic_cmd_args cmd;
761         struct qlcnic_info_le *nic_info;
762         size_t nic_size = sizeof(struct qlcnic_info_le);
763
764         if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
765                 return err;
766
767         nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
768                         &nic_dma_t, GFP_KERNEL);
769         if (!nic_info_addr)
770                 return -ENOMEM;
771
772         memset(nic_info_addr, 0, nic_size);
773         nic_info = nic_info_addr;
774
775         nic_info->pci_func = cpu_to_le16(nic->pci_func);
776         nic_info->op_mode = cpu_to_le16(nic->op_mode);
777         nic_info->phys_port = cpu_to_le16(nic->phys_port);
778         nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
779         nic_info->capabilities = cpu_to_le32(nic->capabilities);
780         nic_info->max_mac_filters = nic->max_mac_filters;
781         nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
782         nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
783         nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
784         nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
785
786         memset(&cmd, 0, sizeof(cmd));
787         cmd.req.cmd = QLCNIC_CDRP_CMD_SET_NIC_INFO;
788         cmd.req.arg1 = MSD(nic_dma_t);
789         cmd.req.arg2 = LSD(nic_dma_t);
790         cmd.req.arg3 = ((nic->pci_func << 16) | nic_size);
791         qlcnic_issue_cmd(adapter, &cmd);
792         err = cmd.rsp.cmd;
793
794         if (err != QLCNIC_RCODE_SUCCESS) {
795                 dev_err(&adapter->pdev->dev,
796                         "Failed to set nic info%d\n", err);
797                 err = -EIO;
798         }
799
800         dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
801                 nic_dma_t);
802         return err;
803 }
804
805 /* Get PCI Info of a partition */
806 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
807                                 struct qlcnic_pci_info *pci_info)
808 {
809         int err = 0, i;
810         struct qlcnic_cmd_args cmd;
811         dma_addr_t pci_info_dma_t;
812         struct qlcnic_pci_info_le *npar;
813         void *pci_info_addr;
814         size_t npar_size = sizeof(struct qlcnic_pci_info_le);
815         size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
816
817         pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
818                         &pci_info_dma_t, GFP_KERNEL);
819         if (!pci_info_addr)
820                 return -ENOMEM;
821         memset(pci_info_addr, 0, pci_size);
822
823         npar = pci_info_addr;
824         memset(&cmd, 0, sizeof(cmd));
825         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_PCI_INFO;
826         cmd.req.arg1 = MSD(pci_info_dma_t);
827         cmd.req.arg2 = LSD(pci_info_dma_t);
828         cmd.req.arg3 = pci_size;
829         qlcnic_issue_cmd(adapter, &cmd);
830         err = cmd.rsp.cmd;
831
832         adapter->ahw->act_pci_func = 0;
833         if (err == QLCNIC_RCODE_SUCCESS) {
834                 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
835                         pci_info->id = le16_to_cpu(npar->id);
836                         pci_info->active = le16_to_cpu(npar->active);
837                         pci_info->type = le16_to_cpu(npar->type);
838                         if (pci_info->type == QLCNIC_TYPE_NIC)
839                                 adapter->ahw->act_pci_func++;
840                         pci_info->default_port =
841                                 le16_to_cpu(npar->default_port);
842                         pci_info->tx_min_bw =
843                                 le16_to_cpu(npar->tx_min_bw);
844                         pci_info->tx_max_bw =
845                                 le16_to_cpu(npar->tx_max_bw);
846                         memcpy(pci_info->mac, npar->mac, ETH_ALEN);
847                 }
848         } else {
849                 dev_err(&adapter->pdev->dev,
850                         "Failed to get PCI Info%d\n", err);
851                 err = -EIO;
852         }
853
854         dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
855                 pci_info_dma_t);
856         return err;
857 }
858
859 /* Configure eSwitch for port mirroring */
860 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
861                                 u8 enable_mirroring, u8 pci_func)
862 {
863         int err = -EIO;
864         u32 arg1;
865         struct qlcnic_cmd_args cmd;
866
867         if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC ||
868             !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
869                 return err;
870
871         arg1 = id | (enable_mirroring ? BIT_4 : 0);
872         arg1 |= pci_func << 8;
873
874         memset(&cmd, 0, sizeof(cmd));
875         cmd.req.cmd = QLCNIC_CDRP_CMD_SET_PORTMIRRORING;
876         cmd.req.arg1 = arg1;
877         qlcnic_issue_cmd(adapter, &cmd);
878         err = cmd.rsp.cmd;
879
880         if (err != QLCNIC_RCODE_SUCCESS) {
881                 dev_err(&adapter->pdev->dev,
882                         "Failed to configure port mirroring%d on eswitch:%d\n",
883                         pci_func, id);
884         } else {
885                 dev_info(&adapter->pdev->dev,
886                         "Configured eSwitch %d for port mirroring:%d\n",
887                         id, pci_func);
888         }
889
890         return err;
891 }
892
893 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
894                 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
895
896         size_t stats_size = sizeof(struct qlcnic_esw_stats_le);
897         struct qlcnic_esw_stats_le *stats;
898         dma_addr_t stats_dma_t;
899         void *stats_addr;
900         u32 arg1;
901         struct qlcnic_cmd_args cmd;
902         int err;
903
904         if (esw_stats == NULL)
905                 return -ENOMEM;
906
907         if ((adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) &&
908             (func != adapter->ahw->pci_func)) {
909                 dev_err(&adapter->pdev->dev,
910                         "Not privilege to query stats for func=%d", func);
911                 return -EIO;
912         }
913
914         stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
915                         &stats_dma_t, GFP_KERNEL);
916         if (!stats_addr) {
917                 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
918                 return -ENOMEM;
919         }
920         memset(stats_addr, 0, stats_size);
921
922         arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
923         arg1 |= rx_tx << 15 | stats_size << 16;
924
925         memset(&cmd, 0, sizeof(cmd));
926         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
927         cmd.req.arg1 = arg1;
928         cmd.req.arg2 = MSD(stats_dma_t);
929         cmd.req.arg3 = LSD(stats_dma_t);
930         qlcnic_issue_cmd(adapter, &cmd);
931         err = cmd.rsp.cmd;
932
933         if (!err) {
934                 stats = stats_addr;
935                 esw_stats->context_id = le16_to_cpu(stats->context_id);
936                 esw_stats->version = le16_to_cpu(stats->version);
937                 esw_stats->size = le16_to_cpu(stats->size);
938                 esw_stats->multicast_frames =
939                                 le64_to_cpu(stats->multicast_frames);
940                 esw_stats->broadcast_frames =
941                                 le64_to_cpu(stats->broadcast_frames);
942                 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
943                 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
944                 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
945                 esw_stats->errors = le64_to_cpu(stats->errors);
946                 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
947         }
948
949         dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
950                 stats_dma_t);
951         return err;
952 }
953
954 /* This routine will retrieve the MAC statistics from firmware */
955 int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,
956                 struct qlcnic_mac_statistics *mac_stats)
957 {
958         struct qlcnic_mac_statistics_le *stats;
959         struct qlcnic_cmd_args cmd;
960         size_t stats_size = sizeof(struct qlcnic_mac_statistics_le);
961         dma_addr_t stats_dma_t;
962         void *stats_addr;
963         int err;
964
965         stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
966                         &stats_dma_t, GFP_KERNEL);
967         if (!stats_addr) {
968                 dev_err(&adapter->pdev->dev,
969                         "%s: Unable to allocate memory.\n", __func__);
970                 return -ENOMEM;
971         }
972         memset(stats_addr, 0, stats_size);
973         memset(&cmd, 0, sizeof(cmd));
974         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_MAC_STATS;
975         cmd.req.arg1 = stats_size << 16;
976         cmd.req.arg2 = MSD(stats_dma_t);
977         cmd.req.arg3 = LSD(stats_dma_t);
978
979         qlcnic_issue_cmd(adapter, &cmd);
980         err = cmd.rsp.cmd;
981
982         if (!err) {
983                 stats = stats_addr;
984                 mac_stats->mac_tx_frames = le64_to_cpu(stats->mac_tx_frames);
985                 mac_stats->mac_tx_bytes = le64_to_cpu(stats->mac_tx_bytes);
986                 mac_stats->mac_tx_mcast_pkts =
987                                         le64_to_cpu(stats->mac_tx_mcast_pkts);
988                 mac_stats->mac_tx_bcast_pkts =
989                                         le64_to_cpu(stats->mac_tx_bcast_pkts);
990                 mac_stats->mac_rx_frames = le64_to_cpu(stats->mac_rx_frames);
991                 mac_stats->mac_rx_bytes = le64_to_cpu(stats->mac_rx_bytes);
992                 mac_stats->mac_rx_mcast_pkts =
993                                         le64_to_cpu(stats->mac_rx_mcast_pkts);
994                 mac_stats->mac_rx_length_error =
995                                 le64_to_cpu(stats->mac_rx_length_error);
996                 mac_stats->mac_rx_length_small =
997                                 le64_to_cpu(stats->mac_rx_length_small);
998                 mac_stats->mac_rx_length_large =
999                                 le64_to_cpu(stats->mac_rx_length_large);
1000                 mac_stats->mac_rx_jabber = le64_to_cpu(stats->mac_rx_jabber);
1001                 mac_stats->mac_rx_dropped = le64_to_cpu(stats->mac_rx_dropped);
1002                 mac_stats->mac_rx_crc_error = le64_to_cpu(stats->mac_rx_crc_error);
1003         }
1004
1005         dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
1006                 stats_dma_t);
1007         return err;
1008 }
1009
1010 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
1011                 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
1012
1013         struct __qlcnic_esw_statistics port_stats;
1014         u8 i;
1015         int ret = -EIO;
1016
1017         if (esw_stats == NULL)
1018                 return -ENOMEM;
1019         if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1020                 return -EIO;
1021         if (adapter->npars == NULL)
1022                 return -EIO;
1023
1024         memset(esw_stats, 0, sizeof(u64));
1025         esw_stats->unicast_frames = QLCNIC_STATS_NOT_AVAIL;
1026         esw_stats->multicast_frames = QLCNIC_STATS_NOT_AVAIL;
1027         esw_stats->broadcast_frames = QLCNIC_STATS_NOT_AVAIL;
1028         esw_stats->dropped_frames = QLCNIC_STATS_NOT_AVAIL;
1029         esw_stats->errors = QLCNIC_STATS_NOT_AVAIL;
1030         esw_stats->local_frames = QLCNIC_STATS_NOT_AVAIL;
1031         esw_stats->numbytes = QLCNIC_STATS_NOT_AVAIL;
1032         esw_stats->context_id = eswitch;
1033
1034         for (i = 0; i < adapter->ahw->act_pci_func; i++) {
1035                 if (adapter->npars[i].phy_port != eswitch)
1036                         continue;
1037
1038                 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
1039                 if (qlcnic_get_port_stats(adapter, adapter->npars[i].pci_func,
1040                                           rx_tx, &port_stats))
1041                         continue;
1042
1043                 esw_stats->size = port_stats.size;
1044                 esw_stats->version = port_stats.version;
1045                 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
1046                                                 port_stats.unicast_frames);
1047                 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
1048                                                 port_stats.multicast_frames);
1049                 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
1050                                                 port_stats.broadcast_frames);
1051                 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
1052                                                 port_stats.dropped_frames);
1053                 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
1054                                                 port_stats.errors);
1055                 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
1056                                                 port_stats.local_frames);
1057                 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
1058                                                 port_stats.numbytes);
1059                 ret = 0;
1060         }
1061         return ret;
1062 }
1063
1064 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
1065                 const u8 port, const u8 rx_tx)
1066 {
1067
1068         u32 arg1;
1069         struct qlcnic_cmd_args cmd;
1070
1071         if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1072                 return -EIO;
1073
1074         if (func_esw == QLCNIC_STATS_PORT) {
1075                 if (port >= QLCNIC_MAX_PCI_FUNC)
1076                         goto err_ret;
1077         } else if (func_esw == QLCNIC_STATS_ESWITCH) {
1078                 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
1079                         goto err_ret;
1080         } else {
1081                 goto err_ret;
1082         }
1083
1084         if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
1085                 goto err_ret;
1086
1087         arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
1088         arg1 |= BIT_14 | rx_tx << 15;
1089
1090         memset(&cmd, 0, sizeof(cmd));
1091         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_STATS;
1092         cmd.req.arg1 = arg1;
1093         qlcnic_issue_cmd(adapter, &cmd);
1094         return cmd.rsp.cmd;
1095
1096 err_ret:
1097         dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
1098                 "rx_ctx=%d\n", func_esw, port, rx_tx);
1099         return -EIO;
1100 }
1101
1102 static int
1103 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1104                                         u32 *arg1, u32 *arg2)
1105 {
1106         int err = -EIO;
1107         struct qlcnic_cmd_args cmd;
1108         u8 pci_func;
1109         pci_func = (*arg1 >> 8);
1110
1111         cmd.req.cmd = QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG;
1112         cmd.req.arg1 = *arg1;
1113         cmd.rsp.arg1 = cmd.rsp.arg2 = 1;
1114         qlcnic_issue_cmd(adapter, &cmd);
1115         *arg1 = cmd.rsp.arg1;
1116         *arg2 = cmd.rsp.arg2;
1117         err = cmd.rsp.cmd;
1118
1119         if (err == QLCNIC_RCODE_SUCCESS) {
1120                 dev_info(&adapter->pdev->dev,
1121                         "eSwitch port config for pci func %d\n", pci_func);
1122         } else {
1123                 dev_err(&adapter->pdev->dev,
1124                         "Failed to get eswitch port config for pci func %d\n",
1125                                                                 pci_func);
1126         }
1127         return err;
1128 }
1129 /* Configure eSwitch port
1130 op_mode = 0 for setting default port behavior
1131 op_mode = 1 for setting  vlan id
1132 op_mode = 2 for deleting vlan id
1133 op_type = 0 for vlan_id
1134 op_type = 1 for port vlan_id
1135 */
1136 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1137                 struct qlcnic_esw_func_cfg *esw_cfg)
1138 {
1139         int err = -EIO, index;
1140         u32 arg1, arg2 = 0;
1141         struct qlcnic_cmd_args cmd;
1142         u8 pci_func;
1143
1144         if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
1145                 return err;
1146         pci_func = esw_cfg->pci_func;
1147         index = qlcnic_is_valid_nic_func(adapter, pci_func);
1148         if (index < 0)
1149                 return err;
1150         arg1 = (adapter->npars[index].phy_port & BIT_0);
1151         arg1 |= (pci_func << 8);
1152
1153         if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1154                 return err;
1155         arg1 &= ~(0x0ff << 8);
1156         arg1 |= (pci_func << 8);
1157         arg1 &= ~(BIT_2 | BIT_3);
1158         switch (esw_cfg->op_mode) {
1159         case QLCNIC_PORT_DEFAULTS:
1160                 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1161                 arg2 |= (BIT_0 | BIT_1);
1162                 if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1163                         arg2 |= (BIT_2 | BIT_3);
1164                 if (!(esw_cfg->discard_tagged))
1165                         arg1 &= ~BIT_4;
1166                 if (!(esw_cfg->promisc_mode))
1167                         arg1 &= ~BIT_6;
1168                 if (!(esw_cfg->mac_override))
1169                         arg1 &= ~BIT_7;
1170                 if (!(esw_cfg->mac_anti_spoof))
1171                         arg2 &= ~BIT_0;
1172                 if (!(esw_cfg->offload_flags & BIT_0))
1173                         arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1174                 if (!(esw_cfg->offload_flags & BIT_1))
1175                         arg2 &= ~BIT_2;
1176                 if (!(esw_cfg->offload_flags & BIT_2))
1177                         arg2 &= ~BIT_3;
1178                 break;
1179         case QLCNIC_ADD_VLAN:
1180                         arg1 |= (BIT_2 | BIT_5);
1181                         arg1 |= (esw_cfg->vlan_id << 16);
1182                         break;
1183         case QLCNIC_DEL_VLAN:
1184                         arg1 |= (BIT_3 | BIT_5);
1185                         arg1 &= ~(0x0ffff << 16);
1186                         break;
1187         default:
1188                 return err;
1189         }
1190
1191         memset(&cmd, 0, sizeof(cmd));
1192         cmd.req.cmd = QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH;
1193         cmd.req.arg1 = arg1;
1194         cmd.req.arg2 = arg2;
1195         qlcnic_issue_cmd(adapter, &cmd);
1196
1197         err = cmd.rsp.cmd;
1198         if (err != QLCNIC_RCODE_SUCCESS) {
1199                 dev_err(&adapter->pdev->dev,
1200                         "Failed to configure eswitch pci func %d\n", pci_func);
1201         } else {
1202                 dev_info(&adapter->pdev->dev,
1203                         "Configured eSwitch for pci func %d\n", pci_func);
1204         }
1205
1206         return err;
1207 }
1208
1209 int
1210 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1211                         struct qlcnic_esw_func_cfg *esw_cfg)
1212 {
1213         u32 arg1, arg2;
1214         int index;
1215         u8 phy_port;
1216
1217         if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC) {
1218                 index = qlcnic_is_valid_nic_func(adapter, esw_cfg->pci_func);
1219                 if (index < 0)
1220                         return -EIO;
1221                 phy_port = adapter->npars[index].phy_port;
1222         } else {
1223                 phy_port = adapter->ahw->physical_port;
1224         }
1225         arg1 = phy_port;
1226         arg1 |= (esw_cfg->pci_func << 8);
1227         if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1228                 return -EIO;
1229
1230         esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1231         esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1232         esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1233         esw_cfg->mac_override = !!(arg1 & BIT_7);
1234         esw_cfg->vlan_id = LSW(arg1 >> 16);
1235         esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1236         esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1237
1238         return 0;
1239 }