]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/blob - arch/arm/mach-exynos/cpuidle.c
Merge branch 'akpm' (Andrew's patch-bomb)
[can-eth-gw-linux.git] / arch / arm / mach-exynos / cpuidle.c
1 /* linux/arch/arm/mach-exynos4/cpuidle.c
2  *
3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/cpuidle.h>
14 #include <linux/cpu_pm.h>
15 #include <linux/io.h>
16 #include <linux/export.h>
17 #include <linux/time.h>
18
19 #include <asm/proc-fns.h>
20 #include <asm/smp_scu.h>
21 #include <asm/suspend.h>
22 #include <asm/unified.h>
23 #include <asm/cpuidle.h>
24 #include <mach/regs-pmu.h>
25 #include <mach/pmu.h>
26
27 #include <plat/cpu.h>
28
29 #define REG_DIRECTGO_ADDR       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
30                         S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
31                         (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
32 #define REG_DIRECTGO_FLAG       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
33                         S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
34                         (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
35
36 #define S5P_CHECK_AFTR          0xFCBA0D10
37
38 static int exynos4_enter_lowpower(struct cpuidle_device *dev,
39                                 struct cpuidle_driver *drv,
40                                 int index);
41
42 static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {
43         [0] = ARM_CPUIDLE_WFI_STATE,
44         [1] = {
45                 .enter                  = exynos4_enter_lowpower,
46                 .exit_latency           = 300,
47                 .target_residency       = 100000,
48                 .flags                  = CPUIDLE_FLAG_TIME_VALID,
49                 .name                   = "C1",
50                 .desc                   = "ARM power down",
51         },
52 };
53
54 static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
55
56 static struct cpuidle_driver exynos4_idle_driver = {
57         .name                   = "exynos4_idle",
58         .owner                  = THIS_MODULE,
59         .en_core_tk_irqen       = 1,
60 };
61
62 /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
63 static void exynos4_set_wakeupmask(void)
64 {
65         __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
66 }
67
68 static unsigned int g_pwr_ctrl, g_diag_reg;
69
70 static void save_cpu_arch_register(void)
71 {
72         /*read power control register*/
73         asm("mrc p15, 0, %0, c15, c0, 0" : "=r"(g_pwr_ctrl) : : "cc");
74         /*read diagnostic register*/
75         asm("mrc p15, 0, %0, c15, c0, 1" : "=r"(g_diag_reg) : : "cc");
76         return;
77 }
78
79 static void restore_cpu_arch_register(void)
80 {
81         /*write power control register*/
82         asm("mcr p15, 0, %0, c15, c0, 0" : : "r"(g_pwr_ctrl) : "cc");
83         /*write diagnostic register*/
84         asm("mcr p15, 0, %0, c15, c0, 1" : : "r"(g_diag_reg) : "cc");
85         return;
86 }
87
88 static int idle_finisher(unsigned long flags)
89 {
90         cpu_do_idle();
91         return 1;
92 }
93
94 static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
95                                 struct cpuidle_driver *drv,
96                                 int index)
97 {
98         unsigned long tmp;
99
100         exynos4_set_wakeupmask();
101
102         /* Set value of power down register for aftr mode */
103         exynos_sys_powerdown_conf(SYS_AFTR);
104
105         __raw_writel(virt_to_phys(s3c_cpu_resume), REG_DIRECTGO_ADDR);
106         __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
107
108         save_cpu_arch_register();
109
110         /* Setting Central Sequence Register for power down mode */
111         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
112         tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
113         __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
114
115         cpu_pm_enter();
116         cpu_suspend(0, idle_finisher);
117
118 #ifdef CONFIG_SMP
119         if (!soc_is_exynos5250())
120                 scu_enable(S5P_VA_SCU);
121 #endif
122         cpu_pm_exit();
123
124         restore_cpu_arch_register();
125
126         /*
127          * If PMU failed while entering sleep mode, WFI will be
128          * ignored by PMU and then exiting cpu_do_idle().
129          * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
130          * in this situation.
131          */
132         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
133         if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
134                 tmp |= S5P_CENTRAL_LOWPWR_CFG;
135                 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
136         }
137
138         /* Clear wakeup state register */
139         __raw_writel(0x0, S5P_WAKEUP_STAT);
140
141         return index;
142 }
143
144 static int exynos4_enter_lowpower(struct cpuidle_device *dev,
145                                 struct cpuidle_driver *drv,
146                                 int index)
147 {
148         int new_index = index;
149
150         /* This mode only can be entered when other core's are offline */
151         if (num_online_cpus() > 1)
152                 new_index = drv->safe_state_index;
153
154         if (new_index == 0)
155                 return arm_cpuidle_simple_enter(dev, drv, new_index);
156         else
157                 return exynos4_enter_core0_aftr(dev, drv, new_index);
158 }
159
160 static int __init exynos4_init_cpuidle(void)
161 {
162         int i, max_cpuidle_state, cpu_id;
163         struct cpuidle_device *device;
164         struct cpuidle_driver *drv = &exynos4_idle_driver;
165
166         /* Setup cpuidle driver */
167         drv->state_count = (sizeof(exynos4_cpuidle_set) /
168                                        sizeof(struct cpuidle_state));
169         max_cpuidle_state = drv->state_count;
170         for (i = 0; i < max_cpuidle_state; i++) {
171                 memcpy(&drv->states[i], &exynos4_cpuidle_set[i],
172                                 sizeof(struct cpuidle_state));
173         }
174         drv->safe_state_index = 0;
175         cpuidle_register_driver(&exynos4_idle_driver);
176
177         for_each_cpu(cpu_id, cpu_online_mask) {
178                 device = &per_cpu(exynos4_cpuidle_device, cpu_id);
179                 device->cpu = cpu_id;
180
181                 if (cpu_id == 0)
182                         device->state_count = (sizeof(exynos4_cpuidle_set) /
183                                                sizeof(struct cpuidle_state));
184                 else
185                         device->state_count = 1;        /* Support IDLE only */
186
187                 if (cpuidle_register_device(device)) {
188                         printk(KERN_ERR "CPUidle register device failed\n,");
189                         return -EIO;
190                 }
191         }
192
193         return 0;
194 }
195 device_initcall(exynos4_init_cpuidle);