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Merge tag 'for-linus-20121212' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowe...
[can-eth-gw-linux.git] / drivers / net / wireless / ath / ath9k / btcoex.c
1 /*
2  * Copyright (c) 2009-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/export.h>
18 #include "hw.h"
19
20 enum ath_bt_mode {
21         ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
22         ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
23         ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
24         ATH_BT_COEX_MODE_DISABLED,      /* coexistence disabled */
25 };
26
27 struct ath_btcoex_config {
28         u8 bt_time_extend;
29         bool bt_txstate_extend;
30         bool bt_txframe_extend;
31         enum ath_bt_mode bt_mode; /* coexistence mode */
32         bool bt_quiet_collision;
33         bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
34         u8 bt_priority_time;
35         u8 bt_first_slot_time;
36         bool bt_hold_rx_clear;
37 };
38
39 static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
40                                     [AR9300_NUM_WLAN_WEIGHTS] = {
41         { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
42         { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
43         { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
44 };
45
46 static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
47                                  [AR9300_NUM_WLAN_WEIGHTS] = {
48         { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
49         { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
50         { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
51         { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
52 };
53
54 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
55 {
56         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
57         const struct ath_btcoex_config ath_bt_config = {
58                 .bt_time_extend = 0,
59                 .bt_txstate_extend = true,
60                 .bt_txframe_extend = true,
61                 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
62                 .bt_quiet_collision = true,
63                 .bt_rxclear_polarity = true,
64                 .bt_priority_time = 2,
65                 .bt_first_slot_time = 5,
66                 .bt_hold_rx_clear = true,
67         };
68         u32 i, idx;
69         bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
70
71         if (AR_SREV_9300_20_OR_LATER(ah))
72                 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
73
74         btcoex_hw->bt_coex_mode =
75                 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
76                 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
77                 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
78                 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
79                 SM(ath_bt_config.bt_mode, AR_BT_MODE) |
80                 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
81                 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
82                 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
83                 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
84                 SM(qnum, AR_BT_QCU_THRESH);
85
86         btcoex_hw->bt_coex_mode2 =
87                 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
88                 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
89                 AR_BT_DISABLE_BT_ANT;
90
91         for (i = 0; i < 32; i++) {
92                 idx = (debruijn32 << i) >> 27;
93                 ah->hw_gen_timers.gen_timer_index[idx] = i;
94         }
95 }
96 EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
97
98 void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
99 {
100         struct ath_common *common = ath9k_hw_common(ah);
101         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
102
103         /*
104          * Check if BTCOEX is globally disabled.
105          */
106         if (!common->btcoex_enabled) {
107                 btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
108                 return;
109         }
110
111         if (AR_SREV_9300_20_OR_LATER(ah)) {
112                 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
113                 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
114                 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
115                 btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
116         } else if (AR_SREV_9280_20_OR_LATER(ah)) {
117                 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
118                 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
119
120                 if (AR_SREV_9285(ah)) {
121                         btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
122                         btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
123                 } else {
124                         btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
125                 }
126         }
127 }
128 EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
129
130 void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
131 {
132         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
133
134         /* connect bt_active to baseband */
135         REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
136                     (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
137                      AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
138
139         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
140                     AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
141
142         /* Set input mux for bt_active to gpio pin */
143         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
144                       AR_GPIO_INPUT_MUX1_BT_ACTIVE,
145                       btcoex_hw->btactive_gpio);
146
147         /* Configure the desired gpio port for input */
148         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
149 }
150 EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
151
152 void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
153 {
154         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
155
156         /* btcoex 3-wire */
157         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
158                         (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
159                          AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
160
161         /* Set input mux for bt_prority_async and
162          *                  bt_active_async to GPIO pins */
163         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
164                         AR_GPIO_INPUT_MUX1_BT_ACTIVE,
165                         btcoex_hw->btactive_gpio);
166
167         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
168                         AR_GPIO_INPUT_MUX1_BT_PRIORITY,
169                         btcoex_hw->btpriority_gpio);
170
171         /* Configure the desired GPIO ports for input */
172
173         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
174         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
175 }
176 EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
177
178 void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
179 {
180         ah->btcoex_hw.mci.ready = false;
181         ah->btcoex_hw.mci.bt_state = 0;
182         ah->btcoex_hw.mci.bt_ver_major = 3;
183         ah->btcoex_hw.mci.bt_ver_minor = 0;
184         ah->btcoex_hw.mci.bt_version_known = false;
185         ah->btcoex_hw.mci.update_2g5g = true;
186         ah->btcoex_hw.mci.is_2g = true;
187         ah->btcoex_hw.mci.wlan_channels_update = false;
188         ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
189         ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
190         ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
191         ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
192         ah->btcoex_hw.mci.query_bt = true;
193         ah->btcoex_hw.mci.unhalt_bt_gpm = true;
194         ah->btcoex_hw.mci.halted_bt_gpm = false;
195         ah->btcoex_hw.mci.need_flush_btinfo = false;
196         ah->btcoex_hw.mci.wlan_cal_seq = 0;
197         ah->btcoex_hw.mci.wlan_cal_done = 0;
198         ah->btcoex_hw.mci.config = 0x2201;
199 }
200 EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
201
202 static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
203 {
204         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
205
206         /* Configure the desired GPIO port for TX_FRAME output */
207         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
208                             AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
209 }
210
211 /*
212  * For AR9002, bt_weight/wlan_weight are used.
213  * For AR9003 and above, stomp_type is used.
214  */
215 void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
216                                 u32 bt_weight,
217                                 u32 wlan_weight,
218                                 enum ath_stomp_type stomp_type)
219 {
220         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
221
222         if (AR_SREV_9300_20_OR_LATER(ah)) {
223                 const u32 *weight = ar9003_wlan_weights[stomp_type];
224                 int i;
225
226                 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
227                         if ((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
228                             btcoex_hw->mci.stomp_ftp)
229                                 stomp_type = ATH_BTCOEX_STOMP_LOW_FTP;
230                         weight = mci_wlan_weights[stomp_type];
231                 }
232
233                 for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
234                         btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
235                         btcoex_hw->wlan_weight[i] = weight[i];
236                 }
237         } else {
238                 btcoex_hw->bt_coex_weights =
239                         SM(bt_weight, AR_BTCOEX_BT_WGHT) |
240                         SM(wlan_weight, AR_BTCOEX_WL_WGHT);
241         }
242 }
243 EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
244
245
246 static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
247 {
248         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
249         u32  val;
250         int i;
251
252         /*
253          * Program coex mode and weight registers to
254          * enable coex 3-wire
255          */
256         REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
257         REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
258
259
260         if (AR_SREV_9300_20_OR_LATER(ah)) {
261                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
262                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
263                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
264                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
265                                   btcoex->bt_weight[i]);
266         } else
267                 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
268
269
270
271         if (AR_SREV_9271(ah)) {
272                 val = REG_READ(ah, 0x50040);
273                 val &= 0xFFFFFEFF;
274                 REG_WRITE(ah, 0x50040, val);
275         }
276
277         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
278         REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
279
280         ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
281                             AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
282 }
283
284 static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
285 {
286         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
287         int i;
288
289         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
290                 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
291                           btcoex->wlan_weight[i]);
292
293         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
294         btcoex->enabled = true;
295 }
296
297 void ath9k_hw_btcoex_enable(struct ath_hw *ah)
298 {
299         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
300
301         switch (ath9k_hw_get_btcoex_scheme(ah)) {
302         case ATH_BTCOEX_CFG_NONE:
303                 return;
304         case ATH_BTCOEX_CFG_2WIRE:
305                 ath9k_hw_btcoex_enable_2wire(ah);
306                 break;
307         case ATH_BTCOEX_CFG_3WIRE:
308                 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
309                         ath9k_hw_btcoex_enable_mci(ah);
310                         return;
311                 }
312                 ath9k_hw_btcoex_enable_3wire(ah);
313                 break;
314         }
315
316         REG_RMW(ah, AR_GPIO_PDPU,
317                 (0x2 << (btcoex_hw->btactive_gpio * 2)),
318                 (0x3 << (btcoex_hw->btactive_gpio * 2)));
319
320         ah->btcoex_hw.enabled = true;
321 }
322 EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
323
324 void ath9k_hw_btcoex_disable(struct ath_hw *ah)
325 {
326         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
327         int i;
328
329         btcoex_hw->enabled = false;
330         if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
331                 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
332                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
333                         REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
334                                   btcoex_hw->wlan_weight[i]);
335                 return;
336         }
337         ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
338
339         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
340                         AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
341
342         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
343                 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
344                 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
345
346                 if (AR_SREV_9300_20_OR_LATER(ah)) {
347                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
348                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
349                         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
350                                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
351                 } else
352                         REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
353
354         }
355 }
356 EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
357
358 /*
359  * Configures appropriate weight based on stomp type.
360  */
361 void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
362                               enum ath_stomp_type stomp_type)
363 {
364         if (AR_SREV_9300_20_OR_LATER(ah)) {
365                 ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
366                 return;
367         }
368
369         switch (stomp_type) {
370         case ATH_BTCOEX_STOMP_ALL:
371                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
372                                            AR_STOMP_ALL_WLAN_WGHT, 0);
373                 break;
374         case ATH_BTCOEX_STOMP_LOW:
375                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
376                                            AR_STOMP_LOW_WLAN_WGHT, 0);
377                 break;
378         case ATH_BTCOEX_STOMP_NONE:
379                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
380                                            AR_STOMP_NONE_WLAN_WGHT, 0);
381                 break;
382         default:
383                 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
384                 break;
385         }
386 }
387 EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);