1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2008-2011 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 #include <linux/delay.h>
11 #include "net_driver.h"
15 #include "mcdi_pcol.h"
18 /**************************************************************************
20 * Management-Controller-to-Driver Interface
22 **************************************************************************
25 #define MCDI_RPC_TIMEOUT 10 /*seconds */
27 #define MCDI_PDU(efx) \
28 (efx_port_num(efx) ? MC_SMEM_P1_PDU_OFST : MC_SMEM_P0_PDU_OFST)
29 #define MCDI_DOORBELL(efx) \
30 (efx_port_num(efx) ? MC_SMEM_P1_DOORBELL_OFST : MC_SMEM_P0_DOORBELL_OFST)
31 #define MCDI_STATUS(efx) \
32 (efx_port_num(efx) ? MC_SMEM_P1_STATUS_OFST : MC_SMEM_P0_STATUS_OFST)
34 /* A reboot/assertion causes the MCDI status word to be set after the
35 * command word is set or a REBOOT event is sent. If we notice a reboot
36 * via these mechanisms then wait 10ms for the status word to be set. */
37 #define MCDI_STATUS_DELAY_US 100
38 #define MCDI_STATUS_DELAY_COUNT 100
39 #define MCDI_STATUS_SLEEP_MS \
40 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
43 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
45 static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
47 struct siena_nic_data *nic_data;
48 EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
49 nic_data = efx->nic_data;
50 return &nic_data->mcdi;
53 void efx_mcdi_init(struct efx_nic *efx)
55 struct efx_mcdi_iface *mcdi;
57 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
61 init_waitqueue_head(&mcdi->wq);
62 spin_lock_init(&mcdi->iface_lock);
63 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
64 mcdi->mode = MCDI_MODE_POLL;
66 (void) efx_mcdi_poll_reboot(efx);
69 static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
70 const u8 *inbuf, size_t inlen)
72 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
73 unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
74 unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
79 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
80 BUG_ON(inlen & 3 || inlen >= MC_SMEM_PDU_LEN);
82 seqno = mcdi->seqno & SEQ_MASK;
84 if (mcdi->mode == MCDI_MODE_EVENTS)
85 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
87 EFX_POPULATE_DWORD_6(hdr,
88 MCDI_HEADER_RESPONSE, 0,
89 MCDI_HEADER_RESYNC, 1,
90 MCDI_HEADER_CODE, cmd,
91 MCDI_HEADER_DATALEN, inlen,
92 MCDI_HEADER_SEQ, seqno,
93 MCDI_HEADER_XFLAGS, xflags);
95 efx_writed(efx, &hdr, pdu);
97 for (i = 0; i < inlen; i += 4)
98 _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i);
100 /* Ensure the payload is written out before the header */
103 /* ring the doorbell with a distinctive value */
104 _efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
107 static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen)
109 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
110 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
113 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
114 BUG_ON(outlen & 3 || outlen >= MC_SMEM_PDU_LEN);
116 for (i = 0; i < outlen; i += 4)
117 *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i);
120 static int efx_mcdi_poll(struct efx_nic *efx)
122 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
123 unsigned int time, finish;
124 unsigned int respseq, respcmd, error;
125 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
126 unsigned int rc, spins;
129 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
130 rc = -efx_mcdi_poll_reboot(efx);
134 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
135 * because generally mcdi responses are fast. After that, back off
136 * and poll once a jiffy (approximately)
139 finish = get_seconds() + MCDI_RPC_TIMEOUT;
146 schedule_timeout_uninterruptible(1);
149 time = get_seconds();
152 efx_readd(efx, ®, pdu);
154 /* All 1's indicates that shared memory is in reset (and is
155 * not a valid header). Wait for it to come out reset before
156 * completing the command */
157 if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff &&
158 EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE))
165 mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN);
166 respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ);
167 respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE);
168 error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR);
170 if (error && mcdi->resplen == 0) {
171 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
173 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
174 netif_err(efx, hw, efx->net_dev,
175 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
176 respseq, mcdi->seqno);
179 efx_readd(efx, ®, pdu + 4);
180 switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) {
181 #define TRANSLATE_ERROR(name) \
182 case MC_CMD_ERR_ ## name: \
185 TRANSLATE_ERROR(ENOENT);
186 TRANSLATE_ERROR(EINTR);
187 TRANSLATE_ERROR(EACCES);
188 TRANSLATE_ERROR(EBUSY);
189 TRANSLATE_ERROR(EINVAL);
190 TRANSLATE_ERROR(EDEADLK);
191 TRANSLATE_ERROR(ENOSYS);
192 TRANSLATE_ERROR(ETIME);
193 #undef TRANSLATE_ERROR
206 /* Return rc=0 like wait_event_timeout() */
210 /* Test and clear MC-rebooted flag for this port/function */
211 int efx_mcdi_poll_reboot(struct efx_nic *efx)
213 unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_STATUS(efx);
217 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
220 efx_readd(efx, ®, addr);
221 value = EFX_DWORD_FIELD(reg, EFX_DWORD_0);
227 efx_writed(efx, ®, addr);
229 if (value == MC_STATUS_DWORD_ASSERT)
235 static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
237 /* Wait until the interface becomes QUIESCENT and we win the race
238 * to mark it RUNNING. */
240 atomic_cmpxchg(&mcdi->state,
241 MCDI_STATE_QUIESCENT,
243 == MCDI_STATE_QUIESCENT);
246 static int efx_mcdi_await_completion(struct efx_nic *efx)
248 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
250 if (wait_event_timeout(
252 atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
253 msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0)
256 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
257 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
258 * completed the request first, then we'll just end up completing the
259 * request again, which is safe.
261 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
262 * wait_event_timeout() implicitly provides.
264 if (mcdi->mode == MCDI_MODE_POLL)
265 return efx_mcdi_poll(efx);
270 static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
272 /* If the interface is RUNNING, then move to COMPLETED and wake any
273 * waiters. If the interface isn't in RUNNING then we've received a
274 * duplicate completion after we've already transitioned back to
275 * QUIESCENT. [A subsequent invocation would increment seqno, so would
276 * have failed the seqno check].
278 if (atomic_cmpxchg(&mcdi->state,
280 MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
288 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
290 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
294 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
295 unsigned int datalen, unsigned int errno)
297 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
300 spin_lock(&mcdi->iface_lock);
302 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
304 /* The request has been cancelled */
307 netif_err(efx, hw, efx->net_dev,
308 "MC response mismatch tx seq 0x%x rx "
309 "seq 0x%x\n", seqno, mcdi->seqno);
311 mcdi->resprc = errno;
312 mcdi->resplen = datalen;
317 spin_unlock(&mcdi->iface_lock);
320 efx_mcdi_complete(mcdi);
323 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
324 const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen,
325 size_t *outlen_actual)
327 efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
328 return efx_mcdi_rpc_finish(efx, cmd, inlen,
329 outbuf, outlen, outlen_actual);
332 void efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, const u8 *inbuf,
335 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
337 BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
339 efx_mcdi_acquire(mcdi);
341 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
342 spin_lock_bh(&mcdi->iface_lock);
344 spin_unlock_bh(&mcdi->iface_lock);
346 efx_mcdi_copyin(efx, cmd, inbuf, inlen);
349 int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
350 u8 *outbuf, size_t outlen, size_t *outlen_actual)
352 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
355 BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
357 if (mcdi->mode == MCDI_MODE_POLL)
358 rc = efx_mcdi_poll(efx);
360 rc = efx_mcdi_await_completion(efx);
363 /* Close the race with efx_mcdi_ev_cpl() executing just too late
364 * and completing a request we've just cancelled, by ensuring
365 * that the seqno check therein fails.
367 spin_lock_bh(&mcdi->iface_lock);
370 spin_unlock_bh(&mcdi->iface_lock);
372 netif_err(efx, hw, efx->net_dev,
373 "MC command 0x%x inlen %d mode %d timed out\n",
374 cmd, (int)inlen, mcdi->mode);
378 /* At the very least we need a memory barrier here to ensure
379 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
380 * a spurious efx_mcdi_ev_cpl() running concurrently by
381 * acquiring the iface_lock. */
382 spin_lock_bh(&mcdi->iface_lock);
384 resplen = mcdi->resplen;
385 spin_unlock_bh(&mcdi->iface_lock);
388 efx_mcdi_copyout(efx, outbuf,
389 min(outlen, mcdi->resplen + 3) & ~0x3);
390 if (outlen_actual != NULL)
391 *outlen_actual = resplen;
392 } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
393 ; /* Don't reset if MC_CMD_REBOOT returns EIO */
394 else if (rc == -EIO || rc == -EINTR) {
395 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
397 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
399 netif_dbg(efx, hw, efx->net_dev,
400 "MC command 0x%x inlen %d failed rc=%d\n",
401 cmd, (int)inlen, -rc);
403 if (rc == -EIO || rc == -EINTR) {
404 msleep(MCDI_STATUS_SLEEP_MS);
405 efx_mcdi_poll_reboot(efx);
409 efx_mcdi_release(mcdi);
413 void efx_mcdi_mode_poll(struct efx_nic *efx)
415 struct efx_mcdi_iface *mcdi;
417 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
420 mcdi = efx_mcdi(efx);
421 if (mcdi->mode == MCDI_MODE_POLL)
424 /* We can switch from event completion to polled completion, because
425 * mcdi requests are always completed in shared memory. We do this by
426 * switching the mode to POLL'd then completing the request.
427 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
429 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
430 * which efx_mcdi_complete() provides for us.
432 mcdi->mode = MCDI_MODE_POLL;
434 efx_mcdi_complete(mcdi);
437 void efx_mcdi_mode_event(struct efx_nic *efx)
439 struct efx_mcdi_iface *mcdi;
441 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
444 mcdi = efx_mcdi(efx);
446 if (mcdi->mode == MCDI_MODE_EVENTS)
449 /* We can't switch from polled to event completion in the middle of a
450 * request, because the completion method is specified in the request.
451 * So acquire the interface to serialise the requestors. We don't need
452 * to acquire the iface_lock to change the mode here, but we do need a
453 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
454 * efx_mcdi_acquire() provides.
456 efx_mcdi_acquire(mcdi);
457 mcdi->mode = MCDI_MODE_EVENTS;
458 efx_mcdi_release(mcdi);
461 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
463 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
465 /* If there is an outstanding MCDI request, it has been terminated
466 * either by a BADASSERT or REBOOT event. If the mcdi interface is
467 * in polled mode, then do nothing because the MC reboot handler will
468 * set the header correctly. However, if the mcdi interface is waiting
469 * for a CMDDONE event it won't receive it [and since all MCDI events
470 * are sent to the same queue, we can't be racing with
473 * There's a race here with efx_mcdi_rpc(), because we might receive
474 * a REBOOT event *before* the request has been copied out. In polled
475 * mode (during startup) this is irrelevant, because efx_mcdi_complete()
476 * is ignored. In event mode, this condition is just an edge-case of
477 * receiving a REBOOT event after posting the MCDI request. Did the mc
478 * reboot before or after the copyout? The best we can do always is
479 * just return failure.
481 spin_lock(&mcdi->iface_lock);
482 if (efx_mcdi_complete(mcdi)) {
483 if (mcdi->mode == MCDI_MODE_EVENTS) {
491 /* Nobody was waiting for an MCDI request, so trigger a reset */
492 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
494 /* Consume the status word since efx_mcdi_rpc_finish() won't */
495 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
496 if (efx_mcdi_poll_reboot(efx))
498 udelay(MCDI_STATUS_DELAY_US);
502 spin_unlock(&mcdi->iface_lock);
505 static unsigned int efx_mcdi_event_link_speed[] = {
506 [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
507 [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
508 [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
512 static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
514 u32 flags, fcntl, speed, lpa;
516 speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
517 EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
518 speed = efx_mcdi_event_link_speed[speed];
520 flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
521 fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
522 lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
524 /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
525 * which is only run after flushing the event queues. Therefore, it
526 * is safe to modify the link state outside of the mac_lock here.
528 efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
530 efx_mcdi_phy_check_fcntl(efx, lpa);
532 efx_link_status_changed(efx);
535 /* Called from falcon_process_eventq for MCDI events */
536 void efx_mcdi_process_event(struct efx_channel *channel,
539 struct efx_nic *efx = channel->efx;
540 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
541 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
544 case MCDI_EVENT_CODE_BADSSERT:
545 netif_err(efx, hw, efx->net_dev,
546 "MC watchdog or assertion failure at 0x%x\n", data);
547 efx_mcdi_ev_death(efx, EINTR);
550 case MCDI_EVENT_CODE_PMNOTICE:
551 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
554 case MCDI_EVENT_CODE_CMDDONE:
556 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
557 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
558 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
561 case MCDI_EVENT_CODE_LINKCHANGE:
562 efx_mcdi_process_link_change(efx, event);
564 case MCDI_EVENT_CODE_SENSOREVT:
565 efx_mcdi_sensor_event(efx, event);
567 case MCDI_EVENT_CODE_SCHEDERR:
568 netif_info(efx, hw, efx->net_dev,
569 "MC Scheduler error address=0x%x\n", data);
571 case MCDI_EVENT_CODE_REBOOT:
572 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
573 efx_mcdi_ev_death(efx, EIO);
575 case MCDI_EVENT_CODE_MAC_STATS_DMA:
576 /* MAC stats are gather lazily. We can ignore this. */
578 case MCDI_EVENT_CODE_FLR:
579 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
581 case MCDI_EVENT_CODE_PTP_RX:
582 case MCDI_EVENT_CODE_PTP_FAULT:
583 case MCDI_EVENT_CODE_PTP_PPS:
584 efx_ptp_event(efx, event);
588 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
593 /**************************************************************************
595 * Specific request functions
597 **************************************************************************
600 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
602 u8 outbuf[ALIGN(MC_CMD_GET_VERSION_OUT_LEN, 4)];
604 const __le16 *ver_words;
607 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
609 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
610 outbuf, sizeof(outbuf), &outlength);
614 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
619 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
620 snprintf(buf, len, "%u.%u.%u.%u",
621 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
622 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
626 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
630 int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
633 u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN];
634 u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN];
638 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
639 driver_operating ? 1 : 0);
640 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
642 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
643 outbuf, sizeof(outbuf), &outlen);
646 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
651 if (was_attached != NULL)
652 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
656 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
660 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
661 u16 *fw_subtype_list, u32 *capabilities)
663 uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LENMIN];
664 size_t outlen, offset, i;
665 int port_num = efx_port_num(efx);
668 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
670 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
671 outbuf, sizeof(outbuf), &outlen);
675 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
681 ? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST
682 : MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST;
684 memcpy(mac_address, outbuf + offset, ETH_ALEN);
685 if (fw_subtype_list) {
686 /* Byte-swap and truncate or zero-pad as necessary */
687 offset = MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST;
689 i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM;
692 (offset + 2 <= outlen) ?
693 le16_to_cpup((__le16 *)(outbuf + offset)) : 0;
699 *capabilities = MCDI_DWORD(outbuf,
700 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
702 *capabilities = MCDI_DWORD(outbuf,
703 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
709 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
710 __func__, rc, (int)outlen);
715 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
717 u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN];
722 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
724 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
726 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
727 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
729 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
731 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
739 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
743 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
745 u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN];
749 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
751 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
752 outbuf, sizeof(outbuf), &outlen);
755 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
760 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
764 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
769 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
770 size_t *size_out, size_t *erase_size_out,
773 u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN];
774 u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN];
778 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
780 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
781 outbuf, sizeof(outbuf), &outlen);
784 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
789 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
790 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
791 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
792 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
796 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
800 int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
802 u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN];
805 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
807 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
809 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
817 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
821 int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
822 loff_t offset, u8 *buffer, size_t length)
824 u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
825 u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
829 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
830 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
831 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
833 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
834 outbuf, sizeof(outbuf), &outlen);
838 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
842 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
846 int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
847 loff_t offset, const u8 *buffer, size_t length)
849 u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
852 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
853 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
854 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
855 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
857 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
859 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
860 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
868 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
872 int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
873 loff_t offset, size_t length)
875 u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN];
878 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
879 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
880 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
882 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
884 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
892 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
896 int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
898 u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN];
901 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
903 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
905 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
913 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
917 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
919 u8 inbuf[MC_CMD_NVRAM_TEST_IN_LEN];
920 u8 outbuf[MC_CMD_NVRAM_TEST_OUT_LEN];
923 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
925 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
926 outbuf, sizeof(outbuf), NULL);
930 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
931 case MC_CMD_NVRAM_TEST_PASS:
932 case MC_CMD_NVRAM_TEST_NOTSUPP:
939 int efx_mcdi_nvram_test_all(struct efx_nic *efx)
945 rc = efx_mcdi_nvram_types(efx, &nvram_types);
950 while (nvram_types != 0) {
951 if (nvram_types & 1) {
952 rc = efx_mcdi_nvram_test(efx, type);
963 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
966 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
970 static int efx_mcdi_read_assertion(struct efx_nic *efx)
972 u8 inbuf[MC_CMD_GET_ASSERTS_IN_LEN];
973 u8 outbuf[MC_CMD_GET_ASSERTS_OUT_LEN];
974 unsigned int flags, index, ofst;
980 /* Attempt to read any stored assertion state before we reboot
981 * the mcfw out of the assertion handler. Retry twice, once
982 * because a boot-time assertion might cause this command to fail
983 * with EINTR. And once again because GET_ASSERTS can race with
984 * MC_CMD_REBOOT running on the other port. */
987 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
988 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
989 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
990 outbuf, sizeof(outbuf), &outlen);
991 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
995 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
998 /* Print out any recorded assertion state */
999 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1000 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1003 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1004 ? "system-level assertion"
1005 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1006 ? "thread-level assertion"
1007 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1009 : "unknown assertion";
1010 netif_err(efx, hw, efx->net_dev,
1011 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1012 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1013 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1015 /* Print out the registers */
1016 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1017 for (index = 1; index < 32; index++) {
1018 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", index,
1019 MCDI_DWORD2(outbuf, ofst));
1020 ofst += sizeof(efx_dword_t);
1026 static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1028 u8 inbuf[MC_CMD_REBOOT_IN_LEN];
1030 /* If the MC is running debug firmware, it might now be
1031 * waiting for a debugger to attach, but we just want it to
1032 * reboot. We set a flag that makes the command a no-op if it
1033 * has already done so. We don't know what return code to
1034 * expect (0 or -EIO), so ignore it.
1036 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1037 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1038 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1039 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1043 int efx_mcdi_handle_assertion(struct efx_nic *efx)
1047 rc = efx_mcdi_read_assertion(efx);
1051 efx_mcdi_exit_assertion(efx);
1056 void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1058 u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN];
1061 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1062 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1063 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1065 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1067 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1069 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1072 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1076 int efx_mcdi_reset_port(struct efx_nic *efx)
1078 int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
1080 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1085 int efx_mcdi_reset_mc(struct efx_nic *efx)
1087 u8 inbuf[MC_CMD_REBOOT_IN_LEN];
1090 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1091 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1092 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1094 /* White is black, and up is down */
1099 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1103 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1104 const u8 *mac, int *id_out)
1106 u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN];
1107 u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN];
1111 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1112 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1113 MC_CMD_FILTER_MODE_SIMPLE);
1114 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1116 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1117 outbuf, sizeof(outbuf), &outlen);
1121 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1126 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1132 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1139 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1141 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1145 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1147 u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN];
1151 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1152 outbuf, sizeof(outbuf), &outlen);
1156 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
1161 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1167 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1172 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1174 u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN];
1177 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1179 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1187 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1191 int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1193 struct efx_channel *channel;
1194 struct efx_rx_queue *rx_queue;
1198 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1199 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1201 qid = kmalloc(EFX_MAX_CHANNELS * sizeof(*qid), GFP_KERNEL);
1206 efx_for_each_channel(channel, efx) {
1207 efx_for_each_channel_rx_queue(rx_queue, channel) {
1208 if (rx_queue->flush_pending) {
1209 rx_queue->flush_pending = false;
1210 atomic_dec(&efx->rxq_flush_pending);
1211 qid[count++] = cpu_to_le32(
1212 efx_rx_queue_index(rx_queue));
1217 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, (u8 *)qid,
1218 count * sizeof(*qid), NULL, 0, NULL);
1226 int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1230 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1237 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);