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[can-eth-gw-linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2  *
3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * Base SAMSUNG platform device definitions
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
34
35 #include <media/s5p_hdmi.h>
36
37 #include <asm/irq.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41
42 #include <mach/hardware.h>
43 #include <mach/dma.h>
44 #include <mach/irqs.h>
45 #include <mach/map.h>
46
47 #include <plat/cpu.h>
48 #include <plat/devs.h>
49 #include <plat/adc.h>
50 #include <linux/platform_data/ata-samsung_cf.h>
51 #include <linux/platform_data/usb-ehci-s5p.h>
52 #include <plat/fb.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hdmi.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/sdhci.h>
61 #include <linux/platform_data/touchscreen-s3c2410.h>
62 #include <linux/platform_data/usb-s3c2410_udc.h>
63 #include <linux/platform_data/usb-ohci-s3c2410.h>
64 #include <plat/usb-phy.h>
65 #include <plat/regs-iic.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
69
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
71
72 /* AC97 */
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75         [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76         [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77         [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78         [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79         [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
80 };
81
82 struct platform_device s3c_device_ac97 = {
83         .name           = "samsung-ac97",
84         .id             = -1,
85         .num_resources  = ARRAY_SIZE(s3c_ac97_resource),
86         .resource       = s3c_ac97_resource,
87         .dev            = {
88                 .dma_mask               = &samsung_device_dma_mask,
89                 .coherent_dma_mask      = DMA_BIT_MASK(32),
90         }
91 };
92 #endif /* CONFIG_CPU_S3C2440 */
93
94 /* ADC */
95
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99         [1] = DEFINE_RES_IRQ(IRQ_TC),
100         [2] = DEFINE_RES_IRQ(IRQ_ADC),
101 };
102
103 struct platform_device s3c_device_adc = {
104         .name           = "s3c24xx-adc",
105         .id             = -1,
106         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
107         .resource       = s3c_adc_resource,
108 };
109 #endif /* CONFIG_PLAT_S3C24XX */
110
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114         [1] = DEFINE_RES_IRQ(IRQ_TC),
115         [2] = DEFINE_RES_IRQ(IRQ_ADC),
116 };
117
118 struct platform_device s3c_device_adc = {
119         .name           = "samsung-adc",
120         .id             = -1,
121         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
122         .resource       = s3c_adc_resource,
123 };
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
125
126 /* Camif Controller */
127
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130         [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131         [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132         [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
133 };
134
135 struct platform_device s3c_device_camif = {
136         .name           = "s3c2440-camif",
137         .id             = -1,
138         .num_resources  = ARRAY_SIZE(s3c_camif_resource),
139         .resource       = s3c_camif_resource,
140         .dev            = {
141                 .dma_mask               = &samsung_device_dma_mask,
142                 .coherent_dma_mask      = DMA_BIT_MASK(32),
143         }
144 };
145 #endif /* CONFIG_CPU_S3C2440 */
146
147 /* ASOC DMA */
148
149 struct platform_device samsung_asoc_dma = {
150         .name           = "samsung-audio",
151         .id             = -1,
152         .dev            = {
153                 .dma_mask               = &samsung_device_dma_mask,
154                 .coherent_dma_mask      = DMA_BIT_MASK(32),
155         }
156 };
157
158 struct platform_device samsung_asoc_idma = {
159         .name           = "samsung-idma",
160         .id             = -1,
161         .dev            = {
162                 .dma_mask               = &samsung_device_dma_mask,
163                 .coherent_dma_mask      = DMA_BIT_MASK(32),
164         }
165 };
166
167 /* FB */
168
169 #ifdef CONFIG_S3C_DEV_FB
170 static struct resource s3c_fb_resource[] = {
171         [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
172         [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
173         [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
174         [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
175 };
176
177 struct platform_device s3c_device_fb = {
178         .name           = "s3c-fb",
179         .id             = -1,
180         .num_resources  = ARRAY_SIZE(s3c_fb_resource),
181         .resource       = s3c_fb_resource,
182         .dev            = {
183                 .dma_mask               = &samsung_device_dma_mask,
184                 .coherent_dma_mask      = DMA_BIT_MASK(32),
185         },
186 };
187
188 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
189 {
190         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
191                          &s3c_device_fb);
192 }
193 #endif /* CONFIG_S3C_DEV_FB */
194
195 /* FIMC */
196
197 #ifdef CONFIG_S5P_DEV_FIMC0
198 static struct resource s5p_fimc0_resource[] = {
199         [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
200         [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
201 };
202
203 struct platform_device s5p_device_fimc0 = {
204         .name           = "s5p-fimc",
205         .id             = 0,
206         .num_resources  = ARRAY_SIZE(s5p_fimc0_resource),
207         .resource       = s5p_fimc0_resource,
208         .dev            = {
209                 .dma_mask               = &samsung_device_dma_mask,
210                 .coherent_dma_mask      = DMA_BIT_MASK(32),
211         },
212 };
213
214 struct platform_device s5p_device_fimc_md = {
215         .name   = "s5p-fimc-md",
216         .id     = -1,
217 };
218 #endif /* CONFIG_S5P_DEV_FIMC0 */
219
220 #ifdef CONFIG_S5P_DEV_FIMC1
221 static struct resource s5p_fimc1_resource[] = {
222         [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
223         [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
224 };
225
226 struct platform_device s5p_device_fimc1 = {
227         .name           = "s5p-fimc",
228         .id             = 1,
229         .num_resources  = ARRAY_SIZE(s5p_fimc1_resource),
230         .resource       = s5p_fimc1_resource,
231         .dev            = {
232                 .dma_mask               = &samsung_device_dma_mask,
233                 .coherent_dma_mask      = DMA_BIT_MASK(32),
234         },
235 };
236 #endif /* CONFIG_S5P_DEV_FIMC1 */
237
238 #ifdef CONFIG_S5P_DEV_FIMC2
239 static struct resource s5p_fimc2_resource[] = {
240         [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
241         [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
242 };
243
244 struct platform_device s5p_device_fimc2 = {
245         .name           = "s5p-fimc",
246         .id             = 2,
247         .num_resources  = ARRAY_SIZE(s5p_fimc2_resource),
248         .resource       = s5p_fimc2_resource,
249         .dev            = {
250                 .dma_mask               = &samsung_device_dma_mask,
251                 .coherent_dma_mask      = DMA_BIT_MASK(32),
252         },
253 };
254 #endif /* CONFIG_S5P_DEV_FIMC2 */
255
256 #ifdef CONFIG_S5P_DEV_FIMC3
257 static struct resource s5p_fimc3_resource[] = {
258         [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
259         [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
260 };
261
262 struct platform_device s5p_device_fimc3 = {
263         .name           = "s5p-fimc",
264         .id             = 3,
265         .num_resources  = ARRAY_SIZE(s5p_fimc3_resource),
266         .resource       = s5p_fimc3_resource,
267         .dev            = {
268                 .dma_mask               = &samsung_device_dma_mask,
269                 .coherent_dma_mask      = DMA_BIT_MASK(32),
270         },
271 };
272 #endif /* CONFIG_S5P_DEV_FIMC3 */
273
274 /* G2D */
275
276 #ifdef CONFIG_S5P_DEV_G2D
277 static struct resource s5p_g2d_resource[] = {
278         [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
279         [1] = DEFINE_RES_IRQ(IRQ_2D),
280 };
281
282 struct platform_device s5p_device_g2d = {
283         .name           = "s5p-g2d",
284         .id             = 0,
285         .num_resources  = ARRAY_SIZE(s5p_g2d_resource),
286         .resource       = s5p_g2d_resource,
287         .dev            = {
288                 .dma_mask               = &samsung_device_dma_mask,
289                 .coherent_dma_mask      = DMA_BIT_MASK(32),
290         },
291 };
292 #endif /* CONFIG_S5P_DEV_G2D */
293
294 #ifdef CONFIG_S5P_DEV_JPEG
295 static struct resource s5p_jpeg_resource[] = {
296         [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
297         [1] = DEFINE_RES_IRQ(IRQ_JPEG),
298 };
299
300 struct platform_device s5p_device_jpeg = {
301         .name           = "s5p-jpeg",
302         .id             = 0,
303         .num_resources  = ARRAY_SIZE(s5p_jpeg_resource),
304         .resource       = s5p_jpeg_resource,
305         .dev            = {
306                 .dma_mask               = &samsung_device_dma_mask,
307                 .coherent_dma_mask      = DMA_BIT_MASK(32),
308         },
309 };
310 #endif /*  CONFIG_S5P_DEV_JPEG */
311
312 /* FIMD0 */
313
314 #ifdef CONFIG_S5P_DEV_FIMD0
315 static struct resource s5p_fimd0_resource[] = {
316         [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
317         [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
318         [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
319         [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
320 };
321
322 struct platform_device s5p_device_fimd0 = {
323         .name           = "s5p-fb",
324         .id             = 0,
325         .num_resources  = ARRAY_SIZE(s5p_fimd0_resource),
326         .resource       = s5p_fimd0_resource,
327         .dev            = {
328                 .dma_mask               = &samsung_device_dma_mask,
329                 .coherent_dma_mask      = DMA_BIT_MASK(32),
330         },
331 };
332
333 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
334 {
335         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
336                          &s5p_device_fimd0);
337 }
338 #endif /* CONFIG_S5P_DEV_FIMD0 */
339
340 /* HWMON */
341
342 #ifdef CONFIG_S3C_DEV_HWMON
343 struct platform_device s3c_device_hwmon = {
344         .name           = "s3c-hwmon",
345         .id             = -1,
346         .dev.parent     = &s3c_device_adc.dev,
347 };
348
349 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
350 {
351         s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
352                          &s3c_device_hwmon);
353 }
354 #endif /* CONFIG_S3C_DEV_HWMON */
355
356 /* HSMMC */
357
358 #ifdef CONFIG_S3C_DEV_HSMMC
359 static struct resource s3c_hsmmc_resource[] = {
360         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
361         [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
362 };
363
364 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
365         .max_width      = 4,
366         .host_caps      = (MMC_CAP_4_BIT_DATA |
367                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
368 };
369
370 struct platform_device s3c_device_hsmmc0 = {
371         .name           = "s3c-sdhci",
372         .id             = 0,
373         .num_resources  = ARRAY_SIZE(s3c_hsmmc_resource),
374         .resource       = s3c_hsmmc_resource,
375         .dev            = {
376                 .dma_mask               = &samsung_device_dma_mask,
377                 .coherent_dma_mask      = DMA_BIT_MASK(32),
378                 .platform_data          = &s3c_hsmmc0_def_platdata,
379         },
380 };
381
382 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
383 {
384         s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
385 }
386 #endif /* CONFIG_S3C_DEV_HSMMC */
387
388 #ifdef CONFIG_S3C_DEV_HSMMC1
389 static struct resource s3c_hsmmc1_resource[] = {
390         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
391         [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
392 };
393
394 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
395         .max_width      = 4,
396         .host_caps      = (MMC_CAP_4_BIT_DATA |
397                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
398 };
399
400 struct platform_device s3c_device_hsmmc1 = {
401         .name           = "s3c-sdhci",
402         .id             = 1,
403         .num_resources  = ARRAY_SIZE(s3c_hsmmc1_resource),
404         .resource       = s3c_hsmmc1_resource,
405         .dev            = {
406                 .dma_mask               = &samsung_device_dma_mask,
407                 .coherent_dma_mask      = DMA_BIT_MASK(32),
408                 .platform_data          = &s3c_hsmmc1_def_platdata,
409         },
410 };
411
412 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
413 {
414         s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
415 }
416 #endif /* CONFIG_S3C_DEV_HSMMC1 */
417
418 /* HSMMC2 */
419
420 #ifdef CONFIG_S3C_DEV_HSMMC2
421 static struct resource s3c_hsmmc2_resource[] = {
422         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
423         [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
424 };
425
426 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
427         .max_width      = 4,
428         .host_caps      = (MMC_CAP_4_BIT_DATA |
429                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
430 };
431
432 struct platform_device s3c_device_hsmmc2 = {
433         .name           = "s3c-sdhci",
434         .id             = 2,
435         .num_resources  = ARRAY_SIZE(s3c_hsmmc2_resource),
436         .resource       = s3c_hsmmc2_resource,
437         .dev            = {
438                 .dma_mask               = &samsung_device_dma_mask,
439                 .coherent_dma_mask      = DMA_BIT_MASK(32),
440                 .platform_data          = &s3c_hsmmc2_def_platdata,
441         },
442 };
443
444 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
445 {
446         s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
447 }
448 #endif /* CONFIG_S3C_DEV_HSMMC2 */
449
450 #ifdef CONFIG_S3C_DEV_HSMMC3
451 static struct resource s3c_hsmmc3_resource[] = {
452         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
453         [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
454 };
455
456 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
457         .max_width      = 4,
458         .host_caps      = (MMC_CAP_4_BIT_DATA |
459                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
460 };
461
462 struct platform_device s3c_device_hsmmc3 = {
463         .name           = "s3c-sdhci",
464         .id             = 3,
465         .num_resources  = ARRAY_SIZE(s3c_hsmmc3_resource),
466         .resource       = s3c_hsmmc3_resource,
467         .dev            = {
468                 .dma_mask               = &samsung_device_dma_mask,
469                 .coherent_dma_mask      = DMA_BIT_MASK(32),
470                 .platform_data          = &s3c_hsmmc3_def_platdata,
471         },
472 };
473
474 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
475 {
476         s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
477 }
478 #endif /* CONFIG_S3C_DEV_HSMMC3 */
479
480 /* I2C */
481
482 static struct resource s3c_i2c0_resource[] = {
483         [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
484         [1] = DEFINE_RES_IRQ(IRQ_IIC),
485 };
486
487 struct platform_device s3c_device_i2c0 = {
488         .name           = "s3c2410-i2c",
489         .id             = 0,
490         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
491         .resource       = s3c_i2c0_resource,
492 };
493
494 struct s3c2410_platform_i2c default_i2c_data __initdata = {
495         .flags          = 0,
496         .slave_addr     = 0x10,
497         .frequency      = 100*1000,
498         .sda_delay      = 100,
499 };
500
501 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
502 {
503         struct s3c2410_platform_i2c *npd;
504
505         if (!pd) {
506                 pd = &default_i2c_data;
507                 pd->bus_num = 0;
508         }
509
510         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
511                                &s3c_device_i2c0);
512
513         if (!npd->cfg_gpio)
514                 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
515 }
516
517 #ifdef CONFIG_S3C_DEV_I2C1
518 static struct resource s3c_i2c1_resource[] = {
519         [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
520         [1] = DEFINE_RES_IRQ(IRQ_IIC1),
521 };
522
523 struct platform_device s3c_device_i2c1 = {
524         .name           = "s3c2410-i2c",
525         .id             = 1,
526         .num_resources  = ARRAY_SIZE(s3c_i2c1_resource),
527         .resource       = s3c_i2c1_resource,
528 };
529
530 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
531 {
532         struct s3c2410_platform_i2c *npd;
533
534         if (!pd) {
535                 pd = &default_i2c_data;
536                 pd->bus_num = 1;
537         }
538
539         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
540                                &s3c_device_i2c1);
541
542         if (!npd->cfg_gpio)
543                 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
544 }
545 #endif /* CONFIG_S3C_DEV_I2C1 */
546
547 #ifdef CONFIG_S3C_DEV_I2C2
548 static struct resource s3c_i2c2_resource[] = {
549         [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
550         [1] = DEFINE_RES_IRQ(IRQ_IIC2),
551 };
552
553 struct platform_device s3c_device_i2c2 = {
554         .name           = "s3c2410-i2c",
555         .id             = 2,
556         .num_resources  = ARRAY_SIZE(s3c_i2c2_resource),
557         .resource       = s3c_i2c2_resource,
558 };
559
560 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
561 {
562         struct s3c2410_platform_i2c *npd;
563
564         if (!pd) {
565                 pd = &default_i2c_data;
566                 pd->bus_num = 2;
567         }
568
569         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
570                                &s3c_device_i2c2);
571
572         if (!npd->cfg_gpio)
573                 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
574 }
575 #endif /* CONFIG_S3C_DEV_I2C2 */
576
577 #ifdef CONFIG_S3C_DEV_I2C3
578 static struct resource s3c_i2c3_resource[] = {
579         [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
580         [1] = DEFINE_RES_IRQ(IRQ_IIC3),
581 };
582
583 struct platform_device s3c_device_i2c3 = {
584         .name           = "s3c2440-i2c",
585         .id             = 3,
586         .num_resources  = ARRAY_SIZE(s3c_i2c3_resource),
587         .resource       = s3c_i2c3_resource,
588 };
589
590 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
591 {
592         struct s3c2410_platform_i2c *npd;
593
594         if (!pd) {
595                 pd = &default_i2c_data;
596                 pd->bus_num = 3;
597         }
598
599         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
600                                &s3c_device_i2c3);
601
602         if (!npd->cfg_gpio)
603                 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
604 }
605 #endif /*CONFIG_S3C_DEV_I2C3 */
606
607 #ifdef CONFIG_S3C_DEV_I2C4
608 static struct resource s3c_i2c4_resource[] = {
609         [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
610         [1] = DEFINE_RES_IRQ(IRQ_IIC4),
611 };
612
613 struct platform_device s3c_device_i2c4 = {
614         .name           = "s3c2440-i2c",
615         .id             = 4,
616         .num_resources  = ARRAY_SIZE(s3c_i2c4_resource),
617         .resource       = s3c_i2c4_resource,
618 };
619
620 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
621 {
622         struct s3c2410_platform_i2c *npd;
623
624         if (!pd) {
625                 pd = &default_i2c_data;
626                 pd->bus_num = 4;
627         }
628
629         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
630                                &s3c_device_i2c4);
631
632         if (!npd->cfg_gpio)
633                 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
634 }
635 #endif /*CONFIG_S3C_DEV_I2C4 */
636
637 #ifdef CONFIG_S3C_DEV_I2C5
638 static struct resource s3c_i2c5_resource[] = {
639         [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
640         [1] = DEFINE_RES_IRQ(IRQ_IIC5),
641 };
642
643 struct platform_device s3c_device_i2c5 = {
644         .name           = "s3c2440-i2c",
645         .id             = 5,
646         .num_resources  = ARRAY_SIZE(s3c_i2c5_resource),
647         .resource       = s3c_i2c5_resource,
648 };
649
650 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
651 {
652         struct s3c2410_platform_i2c *npd;
653
654         if (!pd) {
655                 pd = &default_i2c_data;
656                 pd->bus_num = 5;
657         }
658
659         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
660                                &s3c_device_i2c5);
661
662         if (!npd->cfg_gpio)
663                 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
664 }
665 #endif /*CONFIG_S3C_DEV_I2C5 */
666
667 #ifdef CONFIG_S3C_DEV_I2C6
668 static struct resource s3c_i2c6_resource[] = {
669         [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
670         [1] = DEFINE_RES_IRQ(IRQ_IIC6),
671 };
672
673 struct platform_device s3c_device_i2c6 = {
674         .name           = "s3c2440-i2c",
675         .id             = 6,
676         .num_resources  = ARRAY_SIZE(s3c_i2c6_resource),
677         .resource       = s3c_i2c6_resource,
678 };
679
680 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
681 {
682         struct s3c2410_platform_i2c *npd;
683
684         if (!pd) {
685                 pd = &default_i2c_data;
686                 pd->bus_num = 6;
687         }
688
689         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
690                                &s3c_device_i2c6);
691
692         if (!npd->cfg_gpio)
693                 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
694 }
695 #endif /* CONFIG_S3C_DEV_I2C6 */
696
697 #ifdef CONFIG_S3C_DEV_I2C7
698 static struct resource s3c_i2c7_resource[] = {
699         [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
700         [1] = DEFINE_RES_IRQ(IRQ_IIC7),
701 };
702
703 struct platform_device s3c_device_i2c7 = {
704         .name           = "s3c2440-i2c",
705         .id             = 7,
706         .num_resources  = ARRAY_SIZE(s3c_i2c7_resource),
707         .resource       = s3c_i2c7_resource,
708 };
709
710 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
711 {
712         struct s3c2410_platform_i2c *npd;
713
714         if (!pd) {
715                 pd = &default_i2c_data;
716                 pd->bus_num = 7;
717         }
718
719         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
720                                &s3c_device_i2c7);
721
722         if (!npd->cfg_gpio)
723                 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
724 }
725 #endif /* CONFIG_S3C_DEV_I2C7 */
726
727 /* I2C HDMIPHY */
728
729 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
730 static struct resource s5p_i2c_resource[] = {
731         [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
732         [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
733 };
734
735 struct platform_device s5p_device_i2c_hdmiphy = {
736         .name           = "s3c2440-hdmiphy-i2c",
737         .id             = -1,
738         .num_resources  = ARRAY_SIZE(s5p_i2c_resource),
739         .resource       = s5p_i2c_resource,
740 };
741
742 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
743 {
744         struct s3c2410_platform_i2c *npd;
745
746         if (!pd) {
747                 pd = &default_i2c_data;
748
749                 if (soc_is_exynos4210() ||
750                     soc_is_exynos4212() || soc_is_exynos4412())
751                         pd->bus_num = 8;
752                 else if (soc_is_s5pv210())
753                         pd->bus_num = 3;
754                 else
755                         pd->bus_num = 0;
756         }
757
758         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
759                                &s5p_device_i2c_hdmiphy);
760 }
761
762 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
763
764 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
765                                   struct i2c_board_info *mhl_info, int mhl_bus)
766 {
767         struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
768
769         if (soc_is_exynos4210() ||
770             soc_is_exynos4212() || soc_is_exynos4412())
771                 pd->hdmiphy_bus = 8;
772         else if (soc_is_s5pv210())
773                 pd->hdmiphy_bus = 3;
774         else
775                 pd->hdmiphy_bus = 0;
776
777         pd->hdmiphy_info = hdmiphy_info;
778         pd->mhl_info = mhl_info;
779         pd->mhl_bus = mhl_bus;
780
781         s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
782                          &s5p_device_hdmi);
783 }
784
785 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
786
787 /* I2S */
788
789 #ifdef CONFIG_PLAT_S3C24XX
790 static struct resource s3c_iis_resource[] = {
791         [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
792 };
793
794 struct platform_device s3c_device_iis = {
795         .name           = "s3c24xx-iis",
796         .id             = -1,
797         .num_resources  = ARRAY_SIZE(s3c_iis_resource),
798         .resource       = s3c_iis_resource,
799         .dev            = {
800                 .dma_mask               = &samsung_device_dma_mask,
801                 .coherent_dma_mask      = DMA_BIT_MASK(32),
802         }
803 };
804 #endif /* CONFIG_PLAT_S3C24XX */
805
806 /* IDE CFCON */
807
808 #ifdef CONFIG_SAMSUNG_DEV_IDE
809 static struct resource s3c_cfcon_resource[] = {
810         [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
811         [1] = DEFINE_RES_IRQ(IRQ_CFCON),
812 };
813
814 struct platform_device s3c_device_cfcon = {
815         .id             = 0,
816         .num_resources  = ARRAY_SIZE(s3c_cfcon_resource),
817         .resource       = s3c_cfcon_resource,
818 };
819
820 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
821 {
822         s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
823                          &s3c_device_cfcon);
824 }
825 #endif /* CONFIG_SAMSUNG_DEV_IDE */
826
827 /* KEYPAD */
828
829 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
830 static struct resource samsung_keypad_resources[] = {
831         [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
832         [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
833 };
834
835 struct platform_device samsung_device_keypad = {
836         .name           = "samsung-keypad",
837         .id             = -1,
838         .num_resources  = ARRAY_SIZE(samsung_keypad_resources),
839         .resource       = samsung_keypad_resources,
840 };
841
842 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
843 {
844         struct samsung_keypad_platdata *npd;
845
846         npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
847                         &samsung_device_keypad);
848
849         if (!npd->cfg_gpio)
850                 npd->cfg_gpio = samsung_keypad_cfg_gpio;
851 }
852 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
853
854 /* LCD Controller */
855
856 #ifdef CONFIG_PLAT_S3C24XX
857 static struct resource s3c_lcd_resource[] = {
858         [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
859         [1] = DEFINE_RES_IRQ(IRQ_LCD),
860 };
861
862 struct platform_device s3c_device_lcd = {
863         .name           = "s3c2410-lcd",
864         .id             = -1,
865         .num_resources  = ARRAY_SIZE(s3c_lcd_resource),
866         .resource       = s3c_lcd_resource,
867         .dev            = {
868                 .dma_mask               = &samsung_device_dma_mask,
869                 .coherent_dma_mask      = DMA_BIT_MASK(32),
870         }
871 };
872
873 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
874 {
875         struct s3c2410fb_mach_info *npd;
876
877         npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
878         if (npd) {
879                 npd->displays = kmemdup(pd->displays,
880                         sizeof(struct s3c2410fb_display) * npd->num_displays,
881                         GFP_KERNEL);
882                 if (!npd->displays)
883                         printk(KERN_ERR "no memory for LCD display data\n");
884         } else {
885                 printk(KERN_ERR "no memory for LCD platform data\n");
886         }
887 }
888 #endif /* CONFIG_PLAT_S3C24XX */
889
890 /* MFC */
891
892 #ifdef CONFIG_S5P_DEV_MFC
893 static struct resource s5p_mfc_resource[] = {
894         [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
895         [1] = DEFINE_RES_IRQ(IRQ_MFC),
896 };
897
898 struct platform_device s5p_device_mfc = {
899         .name           = "s5p-mfc",
900         .id             = -1,
901         .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
902         .resource       = s5p_mfc_resource,
903 };
904
905 /*
906  * MFC hardware has 2 memory interfaces which are modelled as two separate
907  * platform devices to let dma-mapping distinguish between them.
908  *
909  * MFC parent device (s5p_device_mfc) must be registered before memory
910  * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
911  */
912
913 struct platform_device s5p_device_mfc_l = {
914         .name           = "s5p-mfc-l",
915         .id             = -1,
916         .dev            = {
917                 .parent                 = &s5p_device_mfc.dev,
918                 .dma_mask               = &samsung_device_dma_mask,
919                 .coherent_dma_mask      = DMA_BIT_MASK(32),
920         },
921 };
922
923 struct platform_device s5p_device_mfc_r = {
924         .name           = "s5p-mfc-r",
925         .id             = -1,
926         .dev            = {
927                 .parent                 = &s5p_device_mfc.dev,
928                 .dma_mask               = &samsung_device_dma_mask,
929                 .coherent_dma_mask      = DMA_BIT_MASK(32),
930         },
931 };
932 #endif /* CONFIG_S5P_DEV_MFC */
933
934 /* MIPI CSIS */
935
936 #ifdef CONFIG_S5P_DEV_CSIS0
937 static struct resource s5p_mipi_csis0_resource[] = {
938         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
939         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
940 };
941
942 struct platform_device s5p_device_mipi_csis0 = {
943         .name           = "s5p-mipi-csis",
944         .id             = 0,
945         .num_resources  = ARRAY_SIZE(s5p_mipi_csis0_resource),
946         .resource       = s5p_mipi_csis0_resource,
947 };
948 #endif /* CONFIG_S5P_DEV_CSIS0 */
949
950 #ifdef CONFIG_S5P_DEV_CSIS1
951 static struct resource s5p_mipi_csis1_resource[] = {
952         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
953         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
954 };
955
956 struct platform_device s5p_device_mipi_csis1 = {
957         .name           = "s5p-mipi-csis",
958         .id             = 1,
959         .num_resources  = ARRAY_SIZE(s5p_mipi_csis1_resource),
960         .resource       = s5p_mipi_csis1_resource,
961 };
962 #endif
963
964 /* NAND */
965
966 #ifdef CONFIG_S3C_DEV_NAND
967 static struct resource s3c_nand_resource[] = {
968         [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
969 };
970
971 struct platform_device s3c_device_nand = {
972         .name           = "s3c2410-nand",
973         .id             = -1,
974         .num_resources  = ARRAY_SIZE(s3c_nand_resource),
975         .resource       = s3c_nand_resource,
976 };
977
978 /*
979  * s3c_nand_copy_set() - copy nand set data
980  * @set: The new structure, directly copied from the old.
981  *
982  * Copy all the fields from the NAND set field from what is probably __initdata
983  * to new kernel memory. The code returns 0 if the copy happened correctly or
984  * an error code for the calling function to display.
985  *
986  * Note, we currently do not try and look to see if we've already copied the
987  * data in a previous set.
988  */
989 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
990 {
991         void *ptr;
992         int size;
993
994         size = sizeof(struct mtd_partition) * set->nr_partitions;
995         if (size) {
996                 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
997                 set->partitions = ptr;
998
999                 if (!ptr)
1000                         return -ENOMEM;
1001         }
1002
1003         if (set->nr_map && set->nr_chips) {
1004                 size = sizeof(int) * set->nr_chips;
1005                 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1006                 set->nr_map = ptr;
1007
1008                 if (!ptr)
1009                         return -ENOMEM;
1010         }
1011
1012         if (set->ecc_layout) {
1013                 ptr = kmemdup(set->ecc_layout,
1014                               sizeof(struct nand_ecclayout), GFP_KERNEL);
1015                 set->ecc_layout = ptr;
1016
1017                 if (!ptr)
1018                         return -ENOMEM;
1019         }
1020
1021         return 0;
1022 }
1023
1024 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1025 {
1026         struct s3c2410_platform_nand *npd;
1027         int size;
1028         int ret;
1029
1030         /* note, if we get a failure in allocation, we simply drop out of the
1031          * function. If there is so little memory available at initialisation
1032          * time then there is little chance the system is going to run.
1033          */
1034
1035         npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1036                                 &s3c_device_nand);
1037         if (!npd)
1038                 return;
1039
1040         /* now see if we need to copy any of the nand set data */
1041
1042         size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1043         if (size) {
1044                 struct s3c2410_nand_set *from = npd->sets;
1045                 struct s3c2410_nand_set *to;
1046                 int i;
1047
1048                 to = kmemdup(from, size, GFP_KERNEL);
1049                 npd->sets = to; /* set, even if we failed */
1050
1051                 if (!to) {
1052                         printk(KERN_ERR "%s: no memory for sets\n", __func__);
1053                         return;
1054                 }
1055
1056                 for (i = 0; i < npd->nr_sets; i++) {
1057                         ret = s3c_nand_copy_set(to);
1058                         if (ret) {
1059                                 printk(KERN_ERR "%s: failed to copy set %d\n",
1060                                 __func__, i);
1061                                 return;
1062                         }
1063                         to++;
1064                 }
1065         }
1066 }
1067 #endif /* CONFIG_S3C_DEV_NAND */
1068
1069 /* ONENAND */
1070
1071 #ifdef CONFIG_S3C_DEV_ONENAND
1072 static struct resource s3c_onenand_resources[] = {
1073         [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1074         [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1075         [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1076 };
1077
1078 struct platform_device s3c_device_onenand = {
1079         .name           = "samsung-onenand",
1080         .id             = 0,
1081         .num_resources  = ARRAY_SIZE(s3c_onenand_resources),
1082         .resource       = s3c_onenand_resources,
1083 };
1084 #endif /* CONFIG_S3C_DEV_ONENAND */
1085
1086 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1087 static struct resource s3c64xx_onenand1_resources[] = {
1088         [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1089         [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1090         [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1091 };
1092
1093 struct platform_device s3c64xx_device_onenand1 = {
1094         .name           = "samsung-onenand",
1095         .id             = 1,
1096         .num_resources  = ARRAY_SIZE(s3c64xx_onenand1_resources),
1097         .resource       = s3c64xx_onenand1_resources,
1098 };
1099
1100 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1101 {
1102         s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1103                          &s3c64xx_device_onenand1);
1104 }
1105 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1106
1107 #ifdef CONFIG_S5P_DEV_ONENAND
1108 static struct resource s5p_onenand_resources[] = {
1109         [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1110         [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1111         [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1112 };
1113
1114 struct platform_device s5p_device_onenand = {
1115         .name           = "s5pc110-onenand",
1116         .id             = -1,
1117         .num_resources  = ARRAY_SIZE(s5p_onenand_resources),
1118         .resource       = s5p_onenand_resources,
1119 };
1120 #endif /* CONFIG_S5P_DEV_ONENAND */
1121
1122 /* PMU */
1123
1124 #ifdef CONFIG_PLAT_S5P
1125 static struct resource s5p_pmu_resource[] = {
1126         DEFINE_RES_IRQ(IRQ_PMU)
1127 };
1128
1129 static struct platform_device s5p_device_pmu = {
1130         .name           = "arm-pmu",
1131         .id             = -1,
1132         .num_resources  = ARRAY_SIZE(s5p_pmu_resource),
1133         .resource       = s5p_pmu_resource,
1134 };
1135
1136 static int __init s5p_pmu_init(void)
1137 {
1138         platform_device_register(&s5p_device_pmu);
1139         return 0;
1140 }
1141 arch_initcall(s5p_pmu_init);
1142 #endif /* CONFIG_PLAT_S5P */
1143
1144 /* PWM Timer */
1145
1146 #ifdef CONFIG_SAMSUNG_DEV_PWM
1147
1148 #define TIMER_RESOURCE_SIZE (1)
1149
1150 #define TIMER_RESOURCE(_tmr, _irq)                      \
1151         (struct resource [TIMER_RESOURCE_SIZE]) {       \
1152                 [0] = {                                 \
1153                         .start  = _irq,                 \
1154                         .end    = _irq,                 \
1155                         .flags  = IORESOURCE_IRQ        \
1156                 }                                       \
1157         }
1158
1159 #define DEFINE_S3C_TIMER(_tmr_no, _irq)                 \
1160         .name           = "s3c24xx-pwm",                \
1161         .id             = _tmr_no,                      \
1162         .num_resources  = TIMER_RESOURCE_SIZE,          \
1163         .resource       = TIMER_RESOURCE(_tmr_no, _irq),        \
1164
1165 /*
1166  * since we already have an static mapping for the timer,
1167  * we do not bother setting any IO resource for the base.
1168  */
1169
1170 struct platform_device s3c_device_timer[] = {
1171         [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1172         [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1173         [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1174         [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1175         [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1176 };
1177 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1178
1179 /* RTC */
1180
1181 #ifdef CONFIG_PLAT_S3C24XX
1182 static struct resource s3c_rtc_resource[] = {
1183         [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1184         [1] = DEFINE_RES_IRQ(IRQ_RTC),
1185         [2] = DEFINE_RES_IRQ(IRQ_TICK),
1186 };
1187
1188 struct platform_device s3c_device_rtc = {
1189         .name           = "s3c2410-rtc",
1190         .id             = -1,
1191         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1192         .resource       = s3c_rtc_resource,
1193 };
1194 #endif /* CONFIG_PLAT_S3C24XX */
1195
1196 #ifdef CONFIG_S3C_DEV_RTC
1197 static struct resource s3c_rtc_resource[] = {
1198         [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1199         [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1200         [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1201 };
1202
1203 struct platform_device s3c_device_rtc = {
1204         .name           = "s3c64xx-rtc",
1205         .id             = -1,
1206         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1207         .resource       = s3c_rtc_resource,
1208 };
1209 #endif /* CONFIG_S3C_DEV_RTC */
1210
1211 /* SDI */
1212
1213 #ifdef CONFIG_PLAT_S3C24XX
1214 static struct resource s3c_sdi_resource[] = {
1215         [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1216         [1] = DEFINE_RES_IRQ(IRQ_SDI),
1217 };
1218
1219 struct platform_device s3c_device_sdi = {
1220         .name           = "s3c2410-sdi",
1221         .id             = -1,
1222         .num_resources  = ARRAY_SIZE(s3c_sdi_resource),
1223         .resource       = s3c_sdi_resource,
1224 };
1225
1226 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1227 {
1228         s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1229                          &s3c_device_sdi);
1230 }
1231 #endif /* CONFIG_PLAT_S3C24XX */
1232
1233 /* SPI */
1234
1235 #ifdef CONFIG_PLAT_S3C24XX
1236 static struct resource s3c_spi0_resource[] = {
1237         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1238         [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1239 };
1240
1241 struct platform_device s3c_device_spi0 = {
1242         .name           = "s3c2410-spi",
1243         .id             = 0,
1244         .num_resources  = ARRAY_SIZE(s3c_spi0_resource),
1245         .resource       = s3c_spi0_resource,
1246         .dev            = {
1247                 .dma_mask               = &samsung_device_dma_mask,
1248                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1249         }
1250 };
1251
1252 static struct resource s3c_spi1_resource[] = {
1253         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1254         [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1255 };
1256
1257 struct platform_device s3c_device_spi1 = {
1258         .name           = "s3c2410-spi",
1259         .id             = 1,
1260         .num_resources  = ARRAY_SIZE(s3c_spi1_resource),
1261         .resource       = s3c_spi1_resource,
1262         .dev            = {
1263                 .dma_mask               = &samsung_device_dma_mask,
1264                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1265         }
1266 };
1267 #endif /* CONFIG_PLAT_S3C24XX */
1268
1269 /* Touchscreen */
1270
1271 #ifdef CONFIG_PLAT_S3C24XX
1272 static struct resource s3c_ts_resource[] = {
1273         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1274         [1] = DEFINE_RES_IRQ(IRQ_TC),
1275 };
1276
1277 struct platform_device s3c_device_ts = {
1278         .name           = "s3c2410-ts",
1279         .id             = -1,
1280         .dev.parent     = &s3c_device_adc.dev,
1281         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1282         .resource       = s3c_ts_resource,
1283 };
1284
1285 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1286 {
1287         s3c_set_platdata(hard_s3c2410ts_info,
1288                          sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1289 }
1290 #endif /* CONFIG_PLAT_S3C24XX */
1291
1292 #ifdef CONFIG_SAMSUNG_DEV_TS
1293 static struct resource s3c_ts_resource[] = {
1294         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1295         [1] = DEFINE_RES_IRQ(IRQ_TC),
1296 };
1297
1298 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1299         .delay                  = 10000,
1300         .presc                  = 49,
1301         .oversampling_shift     = 2,
1302 };
1303
1304 struct platform_device s3c_device_ts = {
1305         .name           = "s3c64xx-ts",
1306         .id             = -1,
1307         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1308         .resource       = s3c_ts_resource,
1309 };
1310
1311 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1312 {
1313         if (!pd)
1314                 pd = &default_ts_data;
1315
1316         s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1317                          &s3c_device_ts);
1318 }
1319 #endif /* CONFIG_SAMSUNG_DEV_TS */
1320
1321 /* TV */
1322
1323 #ifdef CONFIG_S5P_DEV_TV
1324
1325 static struct resource s5p_hdmi_resources[] = {
1326         [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1327         [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1328 };
1329
1330 struct platform_device s5p_device_hdmi = {
1331         .name           = "s5p-hdmi",
1332         .id             = -1,
1333         .num_resources  = ARRAY_SIZE(s5p_hdmi_resources),
1334         .resource       = s5p_hdmi_resources,
1335 };
1336
1337 static struct resource s5p_sdo_resources[] = {
1338         [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1339         [1] = DEFINE_RES_IRQ(IRQ_SDO),
1340 };
1341
1342 struct platform_device s5p_device_sdo = {
1343         .name           = "s5p-sdo",
1344         .id             = -1,
1345         .num_resources  = ARRAY_SIZE(s5p_sdo_resources),
1346         .resource       = s5p_sdo_resources,
1347 };
1348
1349 static struct resource s5p_mixer_resources[] = {
1350         [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1351         [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1352         [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1353 };
1354
1355 struct platform_device s5p_device_mixer = {
1356         .name           = "s5p-mixer",
1357         .id             = -1,
1358         .num_resources  = ARRAY_SIZE(s5p_mixer_resources),
1359         .resource       = s5p_mixer_resources,
1360         .dev            = {
1361                 .dma_mask               = &samsung_device_dma_mask,
1362                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1363         }
1364 };
1365 #endif /* CONFIG_S5P_DEV_TV */
1366
1367 /* USB */
1368
1369 #ifdef CONFIG_S3C_DEV_USB_HOST
1370 static struct resource s3c_usb_resource[] = {
1371         [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1372         [1] = DEFINE_RES_IRQ(IRQ_USBH),
1373 };
1374
1375 struct platform_device s3c_device_ohci = {
1376         .name           = "s3c2410-ohci",
1377         .id             = -1,
1378         .num_resources  = ARRAY_SIZE(s3c_usb_resource),
1379         .resource       = s3c_usb_resource,
1380         .dev            = {
1381                 .dma_mask               = &samsung_device_dma_mask,
1382                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1383         }
1384 };
1385
1386 /*
1387  * s3c_ohci_set_platdata - initialise OHCI device platform data
1388  * @info: The platform data.
1389  *
1390  * This call copies the @info passed in and sets the device .platform_data
1391  * field to that copy. The @info is copied so that the original can be marked
1392  * __initdata.
1393  */
1394
1395 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1396 {
1397         s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1398                          &s3c_device_ohci);
1399 }
1400 #endif /* CONFIG_S3C_DEV_USB_HOST */
1401
1402 /* USB Device (Gadget) */
1403
1404 #ifdef CONFIG_PLAT_S3C24XX
1405 static struct resource s3c_usbgadget_resource[] = {
1406         [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1407         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1408 };
1409
1410 struct platform_device s3c_device_usbgadget = {
1411         .name           = "s3c2410-usbgadget",
1412         .id             = -1,
1413         .num_resources  = ARRAY_SIZE(s3c_usbgadget_resource),
1414         .resource       = s3c_usbgadget_resource,
1415 };
1416
1417 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1418 {
1419         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1420 }
1421 #endif /* CONFIG_PLAT_S3C24XX */
1422
1423 /* USB EHCI Host Controller */
1424
1425 #ifdef CONFIG_S5P_DEV_USB_EHCI
1426 static struct resource s5p_ehci_resource[] = {
1427         [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1428         [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1429 };
1430
1431 struct platform_device s5p_device_ehci = {
1432         .name           = "s5p-ehci",
1433         .id             = -1,
1434         .num_resources  = ARRAY_SIZE(s5p_ehci_resource),
1435         .resource       = s5p_ehci_resource,
1436         .dev            = {
1437                 .dma_mask               = &samsung_device_dma_mask,
1438                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1439         }
1440 };
1441
1442 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1443 {
1444         struct s5p_ehci_platdata *npd;
1445
1446         npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1447                         &s5p_device_ehci);
1448
1449         if (!npd->phy_init)
1450                 npd->phy_init = s5p_usb_phy_init;
1451         if (!npd->phy_exit)
1452                 npd->phy_exit = s5p_usb_phy_exit;
1453 }
1454 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1455
1456 /* USB HSOTG */
1457
1458 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1459 static struct resource s3c_usb_hsotg_resources[] = {
1460         [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1461         [1] = DEFINE_RES_IRQ(IRQ_OTG),
1462 };
1463
1464 struct platform_device s3c_device_usb_hsotg = {
1465         .name           = "s3c-hsotg",
1466         .id             = -1,
1467         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
1468         .resource       = s3c_usb_hsotg_resources,
1469         .dev            = {
1470                 .dma_mask               = &samsung_device_dma_mask,
1471                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1472         },
1473 };
1474
1475 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1476 {
1477         struct s3c_hsotg_plat *npd;
1478
1479         npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1480                         &s3c_device_usb_hsotg);
1481
1482         if (!npd->phy_init)
1483                 npd->phy_init = s5p_usb_phy_init;
1484         if (!npd->phy_exit)
1485                 npd->phy_exit = s5p_usb_phy_exit;
1486 }
1487 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1488
1489 /* USB High Spped 2.0 Device (Gadget) */
1490
1491 #ifdef CONFIG_PLAT_S3C24XX
1492 static struct resource s3c_hsudc_resource[] = {
1493         [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1494         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1495 };
1496
1497 struct platform_device s3c_device_usb_hsudc = {
1498         .name           = "s3c-hsudc",
1499         .id             = -1,
1500         .num_resources  = ARRAY_SIZE(s3c_hsudc_resource),
1501         .resource       = s3c_hsudc_resource,
1502         .dev            = {
1503                 .dma_mask               = &samsung_device_dma_mask,
1504                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1505         },
1506 };
1507
1508 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1509 {
1510         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1511 }
1512 #endif /* CONFIG_PLAT_S3C24XX */
1513
1514 /* WDT */
1515
1516 #ifdef CONFIG_S3C_DEV_WDT
1517 static struct resource s3c_wdt_resource[] = {
1518         [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1519         [1] = DEFINE_RES_IRQ(IRQ_WDT),
1520 };
1521
1522 struct platform_device s3c_device_wdt = {
1523         .name           = "s3c2410-wdt",
1524         .id             = -1,
1525         .num_resources  = ARRAY_SIZE(s3c_wdt_resource),
1526         .resource       = s3c_wdt_resource,
1527 };
1528 #endif /* CONFIG_S3C_DEV_WDT */
1529
1530 #ifdef CONFIG_S3C64XX_DEV_SPI0
1531 static struct resource s3c64xx_spi0_resource[] = {
1532         [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1533         [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1534         [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1535         [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1536 };
1537
1538 struct platform_device s3c64xx_device_spi0 = {
1539         .name           = "s3c6410-spi",
1540         .id             = 0,
1541         .num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
1542         .resource       = s3c64xx_spi0_resource,
1543         .dev = {
1544                 .dma_mask               = &samsung_device_dma_mask,
1545                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1546         },
1547 };
1548
1549 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1550                                                 int num_cs)
1551 {
1552         struct s3c64xx_spi_info pd;
1553
1554         /* Reject invalid configuration */
1555         if (!num_cs || src_clk_nr < 0) {
1556                 pr_err("%s: Invalid SPI configuration\n", __func__);
1557                 return;
1558         }
1559
1560         pd.num_cs = num_cs;
1561         pd.src_clk_nr = src_clk_nr;
1562         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1563
1564         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1565 }
1566 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1567
1568 #ifdef CONFIG_S3C64XX_DEV_SPI1
1569 static struct resource s3c64xx_spi1_resource[] = {
1570         [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1571         [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1572         [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1573         [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1574 };
1575
1576 struct platform_device s3c64xx_device_spi1 = {
1577         .name           = "s3c6410-spi",
1578         .id             = 1,
1579         .num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
1580         .resource       = s3c64xx_spi1_resource,
1581         .dev = {
1582                 .dma_mask               = &samsung_device_dma_mask,
1583                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1584         },
1585 };
1586
1587 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1588                                                 int num_cs)
1589 {
1590         struct s3c64xx_spi_info pd;
1591
1592         /* Reject invalid configuration */
1593         if (!num_cs || src_clk_nr < 0) {
1594                 pr_err("%s: Invalid SPI configuration\n", __func__);
1595                 return;
1596         }
1597
1598         pd.num_cs = num_cs;
1599         pd.src_clk_nr = src_clk_nr;
1600         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1601
1602         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1603 }
1604 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1605
1606 #ifdef CONFIG_S3C64XX_DEV_SPI2
1607 static struct resource s3c64xx_spi2_resource[] = {
1608         [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1609         [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1610         [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1611         [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1612 };
1613
1614 struct platform_device s3c64xx_device_spi2 = {
1615         .name           = "s3c6410-spi",
1616         .id             = 2,
1617         .num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
1618         .resource       = s3c64xx_spi2_resource,
1619         .dev = {
1620                 .dma_mask               = &samsung_device_dma_mask,
1621                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1622         },
1623 };
1624
1625 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1626                                                 int num_cs)
1627 {
1628         struct s3c64xx_spi_info pd;
1629
1630         /* Reject invalid configuration */
1631         if (!num_cs || src_clk_nr < 0) {
1632                 pr_err("%s: Invalid SPI configuration\n", __func__);
1633                 return;
1634         }
1635
1636         pd.num_cs = num_cs;
1637         pd.src_clk_nr = src_clk_nr;
1638         pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1639
1640         s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1641 }
1642 #endif /* CONFIG_S3C64XX_DEV_SPI2 */