drivers/net/ethernet/brocade/bna/bna_tx_rx.c

   1 /*
   2  * Linux network driver for Brocade Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12   */
  13 /*
  14  * Copyright (c) 2005-2011 Brocade Communications Systems, Inc.
  15  * All rights reserved
  16  * www.brocade.com
  17  */
  18 #include "bna.h"
  19 #include "bfi.h"
  20
  21 /* IB */
  22 static void
  23 bna_ib_coalescing_timeo_set(struct bna_ib *ib, u8 coalescing_timeo)
  24 {
  25         ib->coalescing_timeo = coalescing_timeo;
  26         ib->door_bell.doorbell_ack = BNA_DOORBELL_IB_INT_ACK(
  27                                 (u32)ib->coalescing_timeo, 0);
  28 }
  29
  30 /* RXF */
  31
  32 #define bna_rxf_vlan_cfg_soft_reset(rxf)                                \
  33 do {                                                                    \
  34         (rxf)->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;           \
  35         (rxf)->vlan_strip_pending = true;                               \
  36 } while (0)
  37
  38 #define bna_rxf_rss_cfg_soft_reset(rxf)                                 \
  39 do {                                                                    \
  40         if ((rxf)->rss_status == BNA_STATUS_T_ENABLED)                  \
  41                 (rxf)->rss_pending = (BNA_RSS_F_RIT_PENDING |           \
  42                                 BNA_RSS_F_CFG_PENDING |                 \
  43                                 BNA_RSS_F_STATUS_PENDING);              \
  44 } while (0)
  45
  46 static int bna_rxf_cfg_apply(struct bna_rxf *rxf);
  47 static void bna_rxf_cfg_reset(struct bna_rxf *rxf);
  48 static int bna_rxf_fltr_clear(struct bna_rxf *rxf);
  49 static int bna_rxf_ucast_cfg_apply(struct bna_rxf *rxf);
  50 static int bna_rxf_promisc_cfg_apply(struct bna_rxf *rxf);
  51 static int bna_rxf_allmulti_cfg_apply(struct bna_rxf *rxf);
  52 static int bna_rxf_vlan_strip_cfg_apply(struct bna_rxf *rxf);
  53 static int bna_rxf_ucast_cfg_reset(struct bna_rxf *rxf,
  54                                         enum bna_cleanup_type cleanup);
  55 static int bna_rxf_promisc_cfg_reset(struct bna_rxf *rxf,
  56                                         enum bna_cleanup_type cleanup);
  57 static int bna_rxf_allmulti_cfg_reset(struct bna_rxf *rxf,
  58                                         enum bna_cleanup_type cleanup);
  59
  60 bfa_fsm_state_decl(bna_rxf, stopped, struct bna_rxf,
  61                         enum bna_rxf_event);
  62 bfa_fsm_state_decl(bna_rxf, paused, struct bna_rxf,
  63                         enum bna_rxf_event);
  64 bfa_fsm_state_decl(bna_rxf, cfg_wait, struct bna_rxf,
  65                         enum bna_rxf_event);
  66 bfa_fsm_state_decl(bna_rxf, started, struct bna_rxf,
  67                         enum bna_rxf_event);
  68 bfa_fsm_state_decl(bna_rxf, fltr_clr_wait, struct bna_rxf,
  69                         enum bna_rxf_event);
  70 bfa_fsm_state_decl(bna_rxf, last_resp_wait, struct bna_rxf,
  71                         enum bna_rxf_event);
  72
  73 static void
  74 bna_rxf_sm_stopped_entry(struct bna_rxf *rxf)
  75 {
  76         call_rxf_stop_cbfn(rxf);
  77 }
  78
  79 static void
  80 bna_rxf_sm_stopped(struct bna_rxf *rxf, enum bna_rxf_event event)
  81 {
  82         switch (event) {
  83         case RXF_E_START:
  84                 if (rxf->flags & BNA_RXF_F_PAUSED) {
  85                         bfa_fsm_set_state(rxf, bna_rxf_sm_paused);
  86                         call_rxf_start_cbfn(rxf);
  87                 } else
  88                         bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
  89                 break;
  90
  91         case RXF_E_STOP:
  92                 call_rxf_stop_cbfn(rxf);
  93                 break;
  94
  95         case RXF_E_FAIL:
  96                 /* No-op */
  97                 break;
  98
  99         case RXF_E_CONFIG:
 100                 call_rxf_cam_fltr_cbfn(rxf);
 101                 break;
 102
 103         case RXF_E_PAUSE:
 104                 rxf->flags |= BNA_RXF_F_PAUSED;
 105                 call_rxf_pause_cbfn(rxf);
 106                 break;
 107
 108         case RXF_E_RESUME:
 109                 rxf->flags &= ~BNA_RXF_F_PAUSED;
 110                 call_rxf_resume_cbfn(rxf);
 111                 break;
 112
 113         default:
 114                 bfa_sm_fault(event);
 115         }
 116 }
 117
 118 static void
 119 bna_rxf_sm_paused_entry(struct bna_rxf *rxf)
 120 {
 121         call_rxf_pause_cbfn(rxf);
 122 }
 123
 124 static void
 125 bna_rxf_sm_paused(struct bna_rxf *rxf, enum bna_rxf_event event)
 126 {
 127         switch (event) {
 128         case RXF_E_STOP:
 129         case RXF_E_FAIL:
 130                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 131                 break;
 132
 133         case RXF_E_CONFIG:
 134                 call_rxf_cam_fltr_cbfn(rxf);
 135                 break;
 136
 137         case RXF_E_RESUME:
 138                 rxf->flags &= ~BNA_RXF_F_PAUSED;
 139                 bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
 140                 break;
 141
 142         default:
 143                 bfa_sm_fault(event);
 144         }
 145 }
 146
 147 static void
 148 bna_rxf_sm_cfg_wait_entry(struct bna_rxf *rxf)
 149 {
 150         if (!bna_rxf_cfg_apply(rxf)) {
 151                 /* No more pending config updates */
 152                 bfa_fsm_set_state(rxf, bna_rxf_sm_started);
 153         }
 154 }
 155
 156 static void
 157 bna_rxf_sm_cfg_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 158 {
 159         switch (event) {
 160         case RXF_E_STOP:
 161                 bfa_fsm_set_state(rxf, bna_rxf_sm_last_resp_wait);
 162                 break;
 163
 164         case RXF_E_FAIL:
 165                 bna_rxf_cfg_reset(rxf);
 166                 call_rxf_start_cbfn(rxf);
 167                 call_rxf_cam_fltr_cbfn(rxf);
 168                 call_rxf_resume_cbfn(rxf);
 169                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 170                 break;
 171
 172         case RXF_E_CONFIG:
 173                 /* No-op */
 174                 break;
 175
 176         case RXF_E_PAUSE:
 177                 rxf->flags |= BNA_RXF_F_PAUSED;
 178                 call_rxf_start_cbfn(rxf);
 179                 bfa_fsm_set_state(rxf, bna_rxf_sm_fltr_clr_wait);
 180                 break;
 181
 182         case RXF_E_FW_RESP:
 183                 if (!bna_rxf_cfg_apply(rxf)) {
 184                         /* No more pending config updates */
 185                         bfa_fsm_set_state(rxf, bna_rxf_sm_started);
 186                 }
 187                 break;
 188
 189         default:
 190                 bfa_sm_fault(event);
 191         }
 192 }
 193
 194 static void
 195 bna_rxf_sm_started_entry(struct bna_rxf *rxf)
 196 {
 197         call_rxf_start_cbfn(rxf);
 198         call_rxf_cam_fltr_cbfn(rxf);
 199         call_rxf_resume_cbfn(rxf);
 200 }
 201
 202 static void
 203 bna_rxf_sm_started(struct bna_rxf *rxf, enum bna_rxf_event event)
 204 {
 205         switch (event) {
 206         case RXF_E_STOP:
 207         case RXF_E_FAIL:
 208                 bna_rxf_cfg_reset(rxf);
 209                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 210                 break;
 211
 212         case RXF_E_CONFIG:
 213                 bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
 214                 break;
 215
 216         case RXF_E_PAUSE:
 217                 rxf->flags |= BNA_RXF_F_PAUSED;
 218                 if (!bna_rxf_fltr_clear(rxf))
 219                         bfa_fsm_set_state(rxf, bna_rxf_sm_paused);
 220                 else
 221                         bfa_fsm_set_state(rxf, bna_rxf_sm_fltr_clr_wait);
 222                 break;
 223
 224         default:
 225                 bfa_sm_fault(event);
 226         }
 227 }
 228
 229 static void
 230 bna_rxf_sm_fltr_clr_wait_entry(struct bna_rxf *rxf)
 231 {
 232 }
 233
 234 static void
 235 bna_rxf_sm_fltr_clr_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 236 {
 237         switch (event) {
 238         case RXF_E_FAIL:
 239                 bna_rxf_cfg_reset(rxf);
 240                 call_rxf_pause_cbfn(rxf);
 241                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 242                 break;
 243
 244         case RXF_E_FW_RESP:
 245                 if (!bna_rxf_fltr_clear(rxf)) {
 246                         /* No more pending CAM entries to clear */
 247                         bfa_fsm_set_state(rxf, bna_rxf_sm_paused);
 248                 }
 249                 break;
 250
 251         default:
 252                 bfa_sm_fault(event);
 253         }
 254 }
 255
 256 static void
 257 bna_rxf_sm_last_resp_wait_entry(struct bna_rxf *rxf)
 258 {
 259 }
 260
 261 static void
 262 bna_rxf_sm_last_resp_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 263 {
 264         switch (event) {
 265         case RXF_E_FAIL:
 266         case RXF_E_FW_RESP:
 267                 bna_rxf_cfg_reset(rxf);
 268                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 269                 break;
 270
 271         default:
 272                 bfa_sm_fault(event);
 273         }
 274 }
 275
 276 static void
 277 bna_bfi_ucast_req(struct bna_rxf *rxf, struct bna_mac *mac,
 278                 enum bfi_enet_h2i_msgs req_type)
 279 {
 280         struct bfi_enet_ucast_req *req = &rxf->bfi_enet_cmd.ucast_req;
 281
 282         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, req_type, 0, rxf->rx->rid);
 283         req->mh.num_entries = htons(
 284         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_ucast_req)));
 285         memcpy(&req->mac_addr, &mac->addr, sizeof(mac_t));
 286         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 287                 sizeof(struct bfi_enet_ucast_req), &req->mh);
 288         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 289 }
 290
 291 static void
 292 bna_bfi_mcast_add_req(struct bna_rxf *rxf, struct bna_mac *mac)
 293 {
 294         struct bfi_enet_mcast_add_req *req =
 295                 &rxf->bfi_enet_cmd.mcast_add_req;
 296
 297         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, BFI_ENET_H2I_MAC_MCAST_ADD_REQ,
 298                 0, rxf->rx->rid);
 299         req->mh.num_entries = htons(
 300         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_mcast_add_req)));
 301         memcpy(&req->mac_addr, &mac->addr, sizeof(mac_t));
 302         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 303                 sizeof(struct bfi_enet_mcast_add_req), &req->mh);
 304         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 305 }
 306
 307 static void
 308 bna_bfi_mcast_del_req(struct bna_rxf *rxf, u16 handle)
 309 {
 310         struct bfi_enet_mcast_del_req *req =
 311                 &rxf->bfi_enet_cmd.mcast_del_req;
 312
 313         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, BFI_ENET_H2I_MAC_MCAST_DEL_REQ,
 314                 0, rxf->rx->rid);
 315         req->mh.num_entries = htons(
 316         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_mcast_del_req)));
 317         req->handle = htons(handle);
 318         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 319                 sizeof(struct bfi_enet_mcast_del_req), &req->mh);
 320         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 321 }
 322
 323 static void
 324 bna_bfi_mcast_filter_req(struct bna_rxf *rxf, enum bna_status status)
 325 {
 326         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 327
 328         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 329                 BFI_ENET_H2I_MAC_MCAST_FILTER_REQ, 0, rxf->rx->rid);
 330         req->mh.num_entries = htons(
 331                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 332         req->enable = status;
 333         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 334                 sizeof(struct bfi_enet_enable_req), &req->mh);
 335         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 336 }
 337
 338 static void
 339 bna_bfi_rx_promisc_req(struct bna_rxf *rxf, enum bna_status status)
 340 {
 341         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 342
 343         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 344                 BFI_ENET_H2I_RX_PROMISCUOUS_REQ, 0, rxf->rx->rid);
 345         req->mh.num_entries = htons(
 346                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 347         req->enable = status;
 348         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 349                 sizeof(struct bfi_enet_enable_req), &req->mh);
 350         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 351 }
 352
 353 static void
 354 bna_bfi_rx_vlan_filter_set(struct bna_rxf *rxf, u8 block_idx)
 355 {
 356         struct bfi_enet_rx_vlan_req *req = &rxf->bfi_enet_cmd.vlan_req;
 357         int i;
 358         int j;
 359
 360         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 361                 BFI_ENET_H2I_RX_VLAN_SET_REQ, 0, rxf->rx->rid);
 362         req->mh.num_entries = htons(
 363                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rx_vlan_req)));
 364         req->block_idx = block_idx;
 365         for (i = 0; i < (BFI_ENET_VLAN_BLOCK_SIZE / 32); i++) {
 366                 j = (block_idx * (BFI_ENET_VLAN_BLOCK_SIZE / 32)) + i;
 367                 if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED)
 368                         req->bit_mask[i] =
 369                                 htonl(rxf->vlan_filter_table[j]);
 370                 else
 371                         req->bit_mask[i] = 0xFFFFFFFF;
 372         }
 373         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 374                 sizeof(struct bfi_enet_rx_vlan_req), &req->mh);
 375         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 376 }
 377
 378 static void
 379 bna_bfi_vlan_strip_enable(struct bna_rxf *rxf)
 380 {
 381         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 382
 383         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 384                 BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ, 0, rxf->rx->rid);
 385         req->mh.num_entries = htons(
 386                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 387         req->enable = rxf->vlan_strip_status;
 388         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 389                 sizeof(struct bfi_enet_enable_req), &req->mh);
 390         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 391 }
 392
 393 static void
 394 bna_bfi_rit_cfg(struct bna_rxf *rxf)
 395 {
 396         struct bfi_enet_rit_req *req = &rxf->bfi_enet_cmd.rit_req;
 397
 398         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 399                 BFI_ENET_H2I_RIT_CFG_REQ, 0, rxf->rx->rid);
 400         req->mh.num_entries = htons(
 401                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rit_req)));
 402         req->size = htons(rxf->rit_size);
 403         memcpy(&req->table[0], rxf->rit, rxf->rit_size);
 404         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 405                 sizeof(struct bfi_enet_rit_req), &req->mh);
 406         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 407 }
 408
 409 static void
 410 bna_bfi_rss_cfg(struct bna_rxf *rxf)
 411 {
 412         struct bfi_enet_rss_cfg_req *req = &rxf->bfi_enet_cmd.rss_req;
 413         int i;
 414
 415         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 416                 BFI_ENET_H2I_RSS_CFG_REQ, 0, rxf->rx->rid);
 417         req->mh.num_entries = htons(
 418                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rss_cfg_req)));
 419         req->cfg.type = rxf->rss_cfg.hash_type;
 420         req->cfg.mask = rxf->rss_cfg.hash_mask;
 421         for (i = 0; i < BFI_ENET_RSS_KEY_LEN; i++)
 422                 req->cfg.key[i] =
 423                         htonl(rxf->rss_cfg.toeplitz_hash_key[i]);
 424         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 425                 sizeof(struct bfi_enet_rss_cfg_req), &req->mh);
 426         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 427 }
 428
 429 static void
 430 bna_bfi_rss_enable(struct bna_rxf *rxf)
 431 {
 432         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 433
 434         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 435                 BFI_ENET_H2I_RSS_ENABLE_REQ, 0, rxf->rx->rid);
 436         req->mh.num_entries = htons(
 437                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 438         req->enable = rxf->rss_status;
 439         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 440                 sizeof(struct bfi_enet_enable_req), &req->mh);
 441         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 442 }
 443
 444 /* This function gets the multicast MAC that has already been added to CAM */
 445 static struct bna_mac *
 446 bna_rxf_mcmac_get(struct bna_rxf *rxf, u8 *mac_addr)
 447 {
 448         struct bna_mac *mac;
 449         struct list_head *qe;
 450
 451         list_for_each(qe, &rxf->mcast_active_q) {
 452                 mac = (struct bna_mac *)qe;
 453                 if (BNA_MAC_IS_EQUAL(&mac->addr, mac_addr))
 454                         return mac;
 455         }
 456
 457         list_for_each(qe, &rxf->mcast_pending_del_q) {
 458                 mac = (struct bna_mac *)qe;
 459                 if (BNA_MAC_IS_EQUAL(&mac->addr, mac_addr))
 460                         return mac;
 461         }
 462
 463         return NULL;
 464 }
 465
 466 static struct bna_mcam_handle *
 467 bna_rxf_mchandle_get(struct bna_rxf *rxf, int handle)
 468 {
 469         struct bna_mcam_handle *mchandle;
 470         struct list_head *qe;
 471
 472         list_for_each(qe, &rxf->mcast_handle_q) {
 473                 mchandle = (struct bna_mcam_handle *)qe;
 474                 if (mchandle->handle == handle)
 475                         return mchandle;
 476         }
 477
 478         return NULL;
 479 }
 480
 481 static void
 482 bna_rxf_mchandle_attach(struct bna_rxf *rxf, u8 *mac_addr, int handle)
 483 {
 484         struct bna_mac *mcmac;
 485         struct bna_mcam_handle *mchandle;
 486
 487         mcmac = bna_rxf_mcmac_get(rxf, mac_addr);
 488         mchandle = bna_rxf_mchandle_get(rxf, handle);
 489         if (mchandle == NULL) {
 490                 mchandle = bna_mcam_mod_handle_get(&rxf->rx->bna->mcam_mod);
 491                 mchandle->handle = handle;
 492                 mchandle->refcnt = 0;
 493                 list_add_tail(&mchandle->qe, &rxf->mcast_handle_q);
 494         }
 495         mchandle->refcnt++;
 496         mcmac->handle = mchandle;
 497 }
 498
 499 static int
 500 bna_rxf_mcast_del(struct bna_rxf *rxf, struct bna_mac *mac,
 501                 enum bna_cleanup_type cleanup)
 502 {
 503         struct bna_mcam_handle *mchandle;
 504         int ret = 0;
 505
 506         mchandle = mac->handle;
 507         if (mchandle == NULL)
 508                 return ret;
 509
 510         mchandle->refcnt--;
 511         if (mchandle->refcnt == 0) {
 512                 if (cleanup == BNA_HARD_CLEANUP) {
 513                         bna_bfi_mcast_del_req(rxf, mchandle->handle);
 514                         ret = 1;
 515                 }
 516                 list_del(&mchandle->qe);
 517                 bfa_q_qe_init(&mchandle->qe);
 518                 bna_mcam_mod_handle_put(&rxf->rx->bna->mcam_mod, mchandle);
 519         }
 520         mac->handle = NULL;
 521
 522         return ret;
 523 }
 524
 525 static int
 526 bna_rxf_mcast_cfg_apply(struct bna_rxf *rxf)
 527 {
 528         struct bna_mac *mac = NULL;
 529         struct list_head *qe;
 530         int ret;
 531
 532         /* Delete multicast entries previousely added */
 533         while (!list_empty(&rxf->mcast_pending_del_q)) {
 534                 bfa_q_deq(&rxf->mcast_pending_del_q, &qe);
 535                 bfa_q_qe_init(qe);
 536                 mac = (struct bna_mac *)qe;
 537                 ret = bna_rxf_mcast_del(rxf, mac, BNA_HARD_CLEANUP);
 538                 bna_mcam_mod_mac_put(&rxf->rx->bna->mcam_mod, mac);
 539                 if (ret)
 540                         return ret;
 541         }
 542
 543         /* Add multicast entries */
 544         if (!list_empty(&rxf->mcast_pending_add_q)) {
 545                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
 546                 bfa_q_qe_init(qe);
 547                 mac = (struct bna_mac *)qe;
 548                 list_add_tail(&mac->qe, &rxf->mcast_active_q);
 549                 bna_bfi_mcast_add_req(rxf, mac);
 550                 return 1;
 551         }
 552
 553         return 0;
 554 }
 555
 556 static int
 557 bna_rxf_vlan_cfg_apply(struct bna_rxf *rxf)
 558 {
 559         u8 vlan_pending_bitmask;
 560         int block_idx = 0;
 561
 562         if (rxf->vlan_pending_bitmask) {
 563                 vlan_pending_bitmask = rxf->vlan_pending_bitmask;
 564                 while (!(vlan_pending_bitmask & 0x1)) {
 565                         block_idx++;
 566                         vlan_pending_bitmask >>= 1;
 567                 }
 568                 rxf->vlan_pending_bitmask &= ~(1 << block_idx);
 569                 bna_bfi_rx_vlan_filter_set(rxf, block_idx);
 570                 return 1;
 571         }
 572
 573         return 0;
 574 }
 575
 576 static int
 577 bna_rxf_mcast_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
 578 {
 579         struct list_head *qe;
 580         struct bna_mac *mac;
 581         int ret;
 582
 583         /* Throw away delete pending mcast entries */
 584         while (!list_empty(&rxf->mcast_pending_del_q)) {
 585                 bfa_q_deq(&rxf->mcast_pending_del_q, &qe);
 586                 bfa_q_qe_init(qe);
 587                 mac = (struct bna_mac *)qe;
 588                 ret = bna_rxf_mcast_del(rxf, mac, cleanup);
 589                 bna_mcam_mod_mac_put(&rxf->rx->bna->mcam_mod, mac);
 590                 if (ret)
 591                         return ret;
 592         }
 593
 594         /* Move active mcast entries to pending_add_q */
 595         while (!list_empty(&rxf->mcast_active_q)) {
 596                 bfa_q_deq(&rxf->mcast_active_q, &qe);
 597                 bfa_q_qe_init(qe);
 598                 list_add_tail(qe, &rxf->mcast_pending_add_q);
 599                 mac = (struct bna_mac *)qe;
 600                 if (bna_rxf_mcast_del(rxf, mac, cleanup))
 601                         return 1;
 602         }
 603
 604         return 0;
 605 }
 606
 607 static int
 608 bna_rxf_rss_cfg_apply(struct bna_rxf *rxf)
 609 {
 610         if (rxf->rss_pending) {
 611                 if (rxf->rss_pending & BNA_RSS_F_RIT_PENDING) {
 612                         rxf->rss_pending &= ~BNA_RSS_F_RIT_PENDING;
 613                         bna_bfi_rit_cfg(rxf);
 614                         return 1;
 615                 }
 616
 617                 if (rxf->rss_pending & BNA_RSS_F_CFG_PENDING) {
 618                         rxf->rss_pending &= ~BNA_RSS_F_CFG_PENDING;
 619                         bna_bfi_rss_cfg(rxf);
 620                         return 1;
 621                 }
 622
 623                 if (rxf->rss_pending & BNA_RSS_F_STATUS_PENDING) {
 624                         rxf->rss_pending &= ~BNA_RSS_F_STATUS_PENDING;
 625                         bna_bfi_rss_enable(rxf);
 626                         return 1;
 627                 }
 628         }
 629
 630         return 0;
 631 }
 632
 633 static int
 634 bna_rxf_cfg_apply(struct bna_rxf *rxf)
 635 {
 636         if (bna_rxf_ucast_cfg_apply(rxf))
 637                 return 1;
 638
 639         if (bna_rxf_mcast_cfg_apply(rxf))
 640                 return 1;
 641
 642         if (bna_rxf_promisc_cfg_apply(rxf))
 643                 return 1;
 644
 645         if (bna_rxf_allmulti_cfg_apply(rxf))
 646                 return 1;
 647
 648         if (bna_rxf_vlan_cfg_apply(rxf))
 649                 return 1;
 650
 651         if (bna_rxf_vlan_strip_cfg_apply(rxf))
 652                 return 1;
 653
 654         if (bna_rxf_rss_cfg_apply(rxf))
 655                 return 1;
 656
 657         return 0;
 658 }
 659
 660 /* Only software reset */
 661 static int
 662 bna_rxf_fltr_clear(struct bna_rxf *rxf)
 663 {
 664         if (bna_rxf_ucast_cfg_reset(rxf, BNA_HARD_CLEANUP))
 665                 return 1;
 666
 667         if (bna_rxf_mcast_cfg_reset(rxf, BNA_HARD_CLEANUP))
 668                 return 1;
 669
 670         if (bna_rxf_promisc_cfg_reset(rxf, BNA_HARD_CLEANUP))
 671                 return 1;
 672
 673         if (bna_rxf_allmulti_cfg_reset(rxf, BNA_HARD_CLEANUP))
 674                 return 1;
 675
 676         return 0;
 677 }
 678
 679 static void
 680 bna_rxf_cfg_reset(struct bna_rxf *rxf)
 681 {
 682         bna_rxf_ucast_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 683         bna_rxf_mcast_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 684         bna_rxf_promisc_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 685         bna_rxf_allmulti_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 686         bna_rxf_vlan_cfg_soft_reset(rxf);
 687         bna_rxf_rss_cfg_soft_reset(rxf);
 688 }
 689
 690 static void
 691 bna_rit_init(struct bna_rxf *rxf, int rit_size)
 692 {
 693         struct bna_rx *rx = rxf->rx;
 694         struct bna_rxp *rxp;
 695         struct list_head *qe;
 696         int offset = 0;
 697
 698         rxf->rit_size = rit_size;
 699         list_for_each(qe, &rx->rxp_q) {
 700                 rxp = (struct bna_rxp *)qe;
 701                 rxf->rit[offset] = rxp->cq.ccb->id;
 702                 offset++;
 703         }
 704
 705 }
 706
 707 void
 708 bna_bfi_rxf_cfg_rsp(struct bna_rxf *rxf, struct bfi_msgq_mhdr *msghdr)
 709 {
 710         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 711 }
 712
 713 void
 714 bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf,
 715                         struct bfi_msgq_mhdr *msghdr)
 716 {
 717         struct bfi_enet_mcast_add_req *req =
 718                 &rxf->bfi_enet_cmd.mcast_add_req;
 719         struct bfi_enet_mcast_add_rsp *rsp =
 720                 (struct bfi_enet_mcast_add_rsp *)msghdr;
 721
 722         bna_rxf_mchandle_attach(rxf, (u8 *)&req->mac_addr,
 723                 ntohs(rsp->handle));
 724         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 725 }
 726
 727 static void
 728 bna_rxf_init(struct bna_rxf *rxf,
 729                 struct bna_rx *rx,
 730                 struct bna_rx_config *q_config,
 731                 struct bna_res_info *res_info)
 732 {
 733         rxf->rx = rx;
 734
 735         INIT_LIST_HEAD(&rxf->ucast_pending_add_q);
 736         INIT_LIST_HEAD(&rxf->ucast_pending_del_q);
 737         rxf->ucast_pending_set = 0;
 738         rxf->ucast_active_set = 0;
 739         INIT_LIST_HEAD(&rxf->ucast_active_q);
 740         rxf->ucast_pending_mac = NULL;
 741
 742         INIT_LIST_HEAD(&rxf->mcast_pending_add_q);
 743         INIT_LIST_HEAD(&rxf->mcast_pending_del_q);
 744         INIT_LIST_HEAD(&rxf->mcast_active_q);
 745         INIT_LIST_HEAD(&rxf->mcast_handle_q);
 746
 747         if (q_config->paused)
 748                 rxf->flags |= BNA_RXF_F_PAUSED;
 749
 750         rxf->rit = (u8 *)
 751                 res_info[BNA_RX_RES_MEM_T_RIT].res_u.mem_info.mdl[0].kva;
 752         bna_rit_init(rxf, q_config->num_paths);
 753
 754         rxf->rss_status = q_config->rss_status;
 755         if (rxf->rss_status == BNA_STATUS_T_ENABLED) {
 756                 rxf->rss_cfg = q_config->rss_config;
 757                 rxf->rss_pending |= BNA_RSS_F_CFG_PENDING;
 758                 rxf->rss_pending |= BNA_RSS_F_RIT_PENDING;
 759                 rxf->rss_pending |= BNA_RSS_F_STATUS_PENDING;
 760         }
 761
 762         rxf->vlan_filter_status = BNA_STATUS_T_DISABLED;
 763         memset(rxf->vlan_filter_table, 0,
 764                         (sizeof(u32) * (BFI_ENET_VLAN_ID_MAX / 32)));
 765         rxf->vlan_filter_table[0] |= 1; /* for pure priority tagged frames */
 766         rxf->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;
 767
 768         rxf->vlan_strip_status = q_config->vlan_strip_status;
 769
 770         bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 771 }
 772
 773 static void
 774 bna_rxf_uninit(struct bna_rxf *rxf)
 775 {
 776         struct bna_mac *mac;
 777
 778         rxf->ucast_pending_set = 0;
 779         rxf->ucast_active_set = 0;
 780
 781         while (!list_empty(&rxf->ucast_pending_add_q)) {
 782                 bfa_q_deq(&rxf->ucast_pending_add_q, &mac);
 783                 bfa_q_qe_init(&mac->qe);
 784                 bna_ucam_mod_mac_put(&rxf->rx->bna->ucam_mod, mac);
 785         }
 786
 787         if (rxf->ucast_pending_mac) {
 788                 bfa_q_qe_init(&rxf->ucast_pending_mac->qe);
 789                 bna_ucam_mod_mac_put(&rxf->rx->bna->ucam_mod,
 790                         rxf->ucast_pending_mac);
 791                 rxf->ucast_pending_mac = NULL;
 792         }
 793
 794         while (!list_empty(&rxf->mcast_pending_add_q)) {
 795                 bfa_q_deq(&rxf->mcast_pending_add_q, &mac);
 796                 bfa_q_qe_init(&mac->qe);
 797                 bna_mcam_mod_mac_put(&rxf->rx->bna->mcam_mod, mac);
 798         }
 799
 800         rxf->rxmode_pending = 0;
 801         rxf->rxmode_pending_bitmask = 0;
 802         if (rxf->rx->bna->promisc_rid == rxf->rx->rid)
 803                 rxf->rx->bna->promisc_rid = BFI_INVALID_RID;
 804         if (rxf->rx->bna->default_mode_rid == rxf->rx->rid)
 805                 rxf->rx->bna->default_mode_rid = BFI_INVALID_RID;
 806
 807         rxf->rss_pending = 0;
 808         rxf->vlan_strip_pending = false;
 809
 810         rxf->flags = 0;
 811
 812         rxf->rx = NULL;
 813 }
 814
 815 static void
 816 bna_rx_cb_rxf_started(struct bna_rx *rx)
 817 {
 818         bfa_fsm_send_event(rx, RX_E_RXF_STARTED);
 819 }
 820
 821 static void
 822 bna_rxf_start(struct bna_rxf *rxf)
 823 {
 824         rxf->start_cbfn = bna_rx_cb_rxf_started;
 825         rxf->start_cbarg = rxf->rx;
 826         bfa_fsm_send_event(rxf, RXF_E_START);
 827 }
 828
 829 static void
 830 bna_rx_cb_rxf_stopped(struct bna_rx *rx)
 831 {
 832         bfa_fsm_send_event(rx, RX_E_RXF_STOPPED);
 833 }
 834
 835 static void
 836 bna_rxf_stop(struct bna_rxf *rxf)
 837 {
 838         rxf->stop_cbfn = bna_rx_cb_rxf_stopped;
 839         rxf->stop_cbarg = rxf->rx;
 840         bfa_fsm_send_event(rxf, RXF_E_STOP);
 841 }
 842
 843 static void
 844 bna_rxf_fail(struct bna_rxf *rxf)
 845 {
 846         bfa_fsm_send_event(rxf, RXF_E_FAIL);
 847 }
 848
 849 enum bna_cb_status
 850 bna_rx_ucast_set(struct bna_rx *rx, u8 *ucmac,
 851                  void (*cbfn)(struct bnad *, struct bna_rx *))
 852 {
 853         struct bna_rxf *rxf = &rx->rxf;
 854
 855         if (rxf->ucast_pending_mac == NULL) {
 856                 rxf->ucast_pending_mac =
 857                                 bna_ucam_mod_mac_get(&rxf->rx->bna->ucam_mod);
 858                 if (rxf->ucast_pending_mac == NULL)
 859                         return BNA_CB_UCAST_CAM_FULL;
 860                 bfa_q_qe_init(&rxf->ucast_pending_mac->qe);
 861         }
 862
 863         memcpy(rxf->ucast_pending_mac->addr, ucmac, ETH_ALEN);
 864         rxf->ucast_pending_set = 1;
 865         rxf->cam_fltr_cbfn = cbfn;
 866         rxf->cam_fltr_cbarg = rx->bna->bnad;
 867
 868         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 869
 870         return BNA_CB_SUCCESS;
 871 }
 872
 873 enum bna_cb_status
 874 bna_rx_mcast_add(struct bna_rx *rx, u8 *addr,
 875                  void (*cbfn)(struct bnad *, struct bna_rx *))
 876 {
 877         struct bna_rxf *rxf = &rx->rxf;
 878         struct bna_mac *mac;
 879
 880         /* Check if already added or pending addition */
 881         if (bna_mac_find(&rxf->mcast_active_q, addr) ||
 882                 bna_mac_find(&rxf->mcast_pending_add_q, addr)) {
 883                 if (cbfn)
 884                         cbfn(rx->bna->bnad, rx);
 885                 return BNA_CB_SUCCESS;
 886         }
 887
 888         mac = bna_mcam_mod_mac_get(&rxf->rx->bna->mcam_mod);
 889         if (mac == NULL)
 890                 return BNA_CB_MCAST_LIST_FULL;
 891         bfa_q_qe_init(&mac->qe);
 892         memcpy(mac->addr, addr, ETH_ALEN);
 893         list_add_tail(&mac->qe, &rxf->mcast_pending_add_q);
 894
 895         rxf->cam_fltr_cbfn = cbfn;
 896         rxf->cam_fltr_cbarg = rx->bna->bnad;
 897
 898         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 899
 900         return BNA_CB_SUCCESS;
 901 }
 902
 903 enum bna_cb_status
 904 bna_rx_mcast_listset(struct bna_rx *rx, int count, u8 *mclist,
 905                      void (*cbfn)(struct bnad *, struct bna_rx *))
 906 {
 907         struct bna_rxf *rxf = &rx->rxf;
 908         struct list_head list_head;
 909         struct list_head *qe;
 910         u8 *mcaddr;
 911         struct bna_mac *mac;
 912         int i;
 913
 914         /* Allocate nodes */
 915         INIT_LIST_HEAD(&list_head);
 916         for (i = 0, mcaddr = mclist; i < count; i++) {
 917                 mac = bna_mcam_mod_mac_get(&rxf->rx->bna->mcam_mod);
 918                 if (mac == NULL)
 919                         goto err_return;
 920                 bfa_q_qe_init(&mac->qe);
 921                 memcpy(mac->addr, mcaddr, ETH_ALEN);
 922                 list_add_tail(&mac->qe, &list_head);
 923
 924                 mcaddr += ETH_ALEN;
 925         }
 926
 927         /* Purge the pending_add_q */
 928         while (!list_empty(&rxf->mcast_pending_add_q)) {
 929                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
 930                 bfa_q_qe_init(qe);
 931                 mac = (struct bna_mac *)qe;
 932                 bna_mcam_mod_mac_put(&rxf->rx->bna->mcam_mod, mac);
 933         }
 934
 935         /* Schedule active_q entries for deletion */
 936         while (!list_empty(&rxf->mcast_active_q)) {
 937                 bfa_q_deq(&rxf->mcast_active_q, &qe);
 938                 mac = (struct bna_mac *)qe;
 939                 bfa_q_qe_init(&mac->qe);
 940                 list_add_tail(&mac->qe, &rxf->mcast_pending_del_q);
 941         }
 942
 943         /* Add the new entries */
 944         while (!list_empty(&list_head)) {
 945                 bfa_q_deq(&list_head, &qe);
 946                 mac = (struct bna_mac *)qe;
 947                 bfa_q_qe_init(&mac->qe);
 948                 list_add_tail(&mac->qe, &rxf->mcast_pending_add_q);
 949         }
 950
 951         rxf->cam_fltr_cbfn = cbfn;
 952         rxf->cam_fltr_cbarg = rx->bna->bnad;
 953         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 954
 955         return BNA_CB_SUCCESS;
 956
 957 err_return:
 958         while (!list_empty(&list_head)) {
 959                 bfa_q_deq(&list_head, &qe);
 960                 mac = (struct bna_mac *)qe;
 961                 bfa_q_qe_init(&mac->qe);
 962                 bna_mcam_mod_mac_put(&rxf->rx->bna->mcam_mod, mac);
 963         }
 964
 965         return BNA_CB_MCAST_LIST_FULL;
 966 }
 967
 968 void
 969 bna_rx_vlan_add(struct bna_rx *rx, int vlan_id)
 970 {
 971         struct bna_rxf *rxf = &rx->rxf;
 972         int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
 973         int bit = (1 << (vlan_id & BFI_VLAN_WORD_MASK));
 974         int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
 975
 976         rxf->vlan_filter_table[index] |= bit;
 977         if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
 978                 rxf->vlan_pending_bitmask |= (1 << group_id);
 979                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 980         }
 981 }
 982
 983 void
 984 bna_rx_vlan_del(struct bna_rx *rx, int vlan_id)
 985 {
 986         struct bna_rxf *rxf = &rx->rxf;
 987         int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
 988         int bit = (1 << (vlan_id & BFI_VLAN_WORD_MASK));
 989         int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
 990
 991         rxf->vlan_filter_table[index] &= ~bit;
 992         if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
 993                 rxf->vlan_pending_bitmask |= (1 << group_id);
 994                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 995         }
 996 }
 997
 998 static int
 999 bna_rxf_ucast_cfg_apply(struct bna_rxf *rxf)
1000 {
1001         struct bna_mac *mac = NULL;
1002         struct list_head *qe;
1003
1004         /* Delete MAC addresses previousely added */
1005         if (!list_empty(&rxf->ucast_pending_del_q)) {
1006                 bfa_q_deq(&rxf->ucast_pending_del_q, &qe);
1007                 bfa_q_qe_init(qe);
1008                 mac = (struct bna_mac *)qe;
1009                 bna_bfi_ucast_req(rxf, mac, BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1010                 bna_ucam_mod_mac_put(&rxf->rx->bna->ucam_mod, mac);
1011                 return 1;
1012         }
1013
1014         /* Set default unicast MAC */
1015         if (rxf->ucast_pending_set) {
1016                 rxf->ucast_pending_set = 0;
1017                 memcpy(rxf->ucast_active_mac.addr,
1018                         rxf->ucast_pending_mac->addr, ETH_ALEN);
1019                 rxf->ucast_active_set = 1;
1020                 bna_bfi_ucast_req(rxf, &rxf->ucast_active_mac,
1021                         BFI_ENET_H2I_MAC_UCAST_SET_REQ);
1022                 return 1;
1023         }
1024
1025         /* Add additional MAC entries */
1026         if (!list_empty(&rxf->ucast_pending_add_q)) {
1027                 bfa_q_deq(&rxf->ucast_pending_add_q, &qe);
1028                 bfa_q_qe_init(qe);
1029                 mac = (struct bna_mac *)qe;
1030                 list_add_tail(&mac->qe, &rxf->ucast_active_q);
1031                 bna_bfi_ucast_req(rxf, mac, BFI_ENET_H2I_MAC_UCAST_ADD_REQ);
1032                 return 1;
1033         }
1034
1035         return 0;
1036 }
1037
1038 static int
1039 bna_rxf_ucast_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1040 {
1041         struct list_head *qe;
1042         struct bna_mac *mac;
1043
1044         /* Throw away delete pending ucast entries */
1045         while (!list_empty(&rxf->ucast_pending_del_q)) {
1046                 bfa_q_deq(&rxf->ucast_pending_del_q, &qe);
1047                 bfa_q_qe_init(qe);
1048                 mac = (struct bna_mac *)qe;
1049                 if (cleanup == BNA_SOFT_CLEANUP)
1050                         bna_ucam_mod_mac_put(&rxf->rx->bna->ucam_mod, mac);
1051                 else {
1052                         bna_bfi_ucast_req(rxf, mac,
1053                                 BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1054                         bna_ucam_mod_mac_put(&rxf->rx->bna->ucam_mod, mac);
1055                         return 1;
1056                 }
1057         }
1058
1059         /* Move active ucast entries to pending_add_q */
1060         while (!list_empty(&rxf->ucast_active_q)) {
1061                 bfa_q_deq(&rxf->ucast_active_q, &qe);
1062                 bfa_q_qe_init(qe);
1063                 list_add_tail(qe, &rxf->ucast_pending_add_q);
1064                 if (cleanup == BNA_HARD_CLEANUP) {
1065                         mac = (struct bna_mac *)qe;
1066                         bna_bfi_ucast_req(rxf, mac,
1067                                 BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1068                         return 1;
1069                 }
1070         }
1071
1072         if (rxf->ucast_active_set) {
1073                 rxf->ucast_pending_set = 1;
1074                 rxf->ucast_active_set = 0;
1075                 if (cleanup == BNA_HARD_CLEANUP) {
1076                         bna_bfi_ucast_req(rxf, &rxf->ucast_active_mac,
1077                                 BFI_ENET_H2I_MAC_UCAST_CLR_REQ);
1078                         return 1;
1079                 }
1080         }
1081
1082         return 0;
1083 }
1084
1085 static int
1086 bna_rxf_promisc_cfg_apply(struct bna_rxf *rxf)
1087 {
1088         struct bna *bna = rxf->rx->bna;
1089
1090         /* Enable/disable promiscuous mode */
1091         if (is_promisc_enable(rxf->rxmode_pending,
1092                                 rxf->rxmode_pending_bitmask)) {
1093                 /* move promisc configuration from pending -> active */
1094                 promisc_inactive(rxf->rxmode_pending,
1095                                 rxf->rxmode_pending_bitmask);
1096                 rxf->rxmode_active |= BNA_RXMODE_PROMISC;
1097                 bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_ENABLED);
1098                 return 1;
1099         } else if (is_promisc_disable(rxf->rxmode_pending,
1100                                 rxf->rxmode_pending_bitmask)) {
1101                 /* move promisc configuration from pending -> active */
1102                 promisc_inactive(rxf->rxmode_pending,
1103                                 rxf->rxmode_pending_bitmask);
1104                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1105                 bna->promisc_rid = BFI_INVALID_RID;
1106                 bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1107                 return 1;
1108         }
1109
1110         return 0;
1111 }
1112
1113 static int
1114 bna_rxf_promisc_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1115 {
1116         struct bna *bna = rxf->rx->bna;
1117
1118         /* Clear pending promisc mode disable */
1119         if (is_promisc_disable(rxf->rxmode_pending,
1120                                 rxf->rxmode_pending_bitmask)) {
1121                 promisc_inactive(rxf->rxmode_pending,
1122                                 rxf->rxmode_pending_bitmask);
1123                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1124                 bna->promisc_rid = BFI_INVALID_RID;
1125                 if (cleanup == BNA_HARD_CLEANUP) {
1126                         bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1127                         return 1;
1128                 }
1129         }
1130
1131         /* Move promisc mode config from active -> pending */
1132         if (rxf->rxmode_active & BNA_RXMODE_PROMISC) {
1133                 promisc_enable(rxf->rxmode_pending,
1134                                 rxf->rxmode_pending_bitmask);
1135                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1136                 if (cleanup == BNA_HARD_CLEANUP) {
1137                         bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1138                         return 1;
1139                 }
1140         }
1141
1142         return 0;
1143 }
1144
1145 static int
1146 bna_rxf_allmulti_cfg_apply(struct bna_rxf *rxf)
1147 {
1148         /* Enable/disable allmulti mode */
1149         if (is_allmulti_enable(rxf->rxmode_pending,
1150                                 rxf->rxmode_pending_bitmask)) {
1151                 /* move allmulti configuration from pending -> active */
1152                 allmulti_inactive(rxf->rxmode_pending,
1153                                 rxf->rxmode_pending_bitmask);
1154                 rxf->rxmode_active |= BNA_RXMODE_ALLMULTI;
1155                 bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_DISABLED);
1156                 return 1;
1157         } else if (is_allmulti_disable(rxf->rxmode_pending,
1158                                         rxf->rxmode_pending_bitmask)) {
1159                 /* move allmulti configuration from pending -> active */
1160                 allmulti_inactive(rxf->rxmode_pending,
1161                                 rxf->rxmode_pending_bitmask);
1162                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1163                 bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1164                 return 1;
1165         }
1166
1167         return 0;
1168 }
1169
1170 static int
1171 bna_rxf_allmulti_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1172 {
1173         /* Clear pending allmulti mode disable */
1174         if (is_allmulti_disable(rxf->rxmode_pending,
1175                                 rxf->rxmode_pending_bitmask)) {
1176                 allmulti_inactive(rxf->rxmode_pending,
1177                                 rxf->rxmode_pending_bitmask);
1178                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1179                 if (cleanup == BNA_HARD_CLEANUP) {
1180                         bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1181                         return 1;
1182                 }
1183         }
1184
1185         /* Move allmulti mode config from active -> pending */
1186         if (rxf->rxmode_active & BNA_RXMODE_ALLMULTI) {
1187                 allmulti_enable(rxf->rxmode_pending,
1188                                 rxf->rxmode_pending_bitmask);
1189                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1190                 if (cleanup == BNA_HARD_CLEANUP) {
1191                         bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1192                         return 1;
1193                 }
1194         }
1195
1196         return 0;
1197 }
1198
1199 static int
1200 bna_rxf_promisc_enable(struct bna_rxf *rxf)
1201 {
1202         struct bna *bna = rxf->rx->bna;
1203         int ret = 0;
1204
1205         if (is_promisc_enable(rxf->rxmode_pending,
1206                                 rxf->rxmode_pending_bitmask) ||
1207                 (rxf->rxmode_active & BNA_RXMODE_PROMISC)) {
1208                 /* Do nothing if pending enable or already enabled */
1209         } else if (is_promisc_disable(rxf->rxmode_pending,
1210                                         rxf->rxmode_pending_bitmask)) {
1211                 /* Turn off pending disable command */
1212                 promisc_inactive(rxf->rxmode_pending,
1213                         rxf->rxmode_pending_bitmask);
1214         } else {
1215                 /* Schedule enable */
1216                 promisc_enable(rxf->rxmode_pending,
1217                                 rxf->rxmode_pending_bitmask);
1218                 bna->promisc_rid = rxf->rx->rid;
1219                 ret = 1;
1220         }
1221
1222         return ret;
1223 }
1224
1225 static int
1226 bna_rxf_promisc_disable(struct bna_rxf *rxf)
1227 {
1228         struct bna *bna = rxf->rx->bna;
1229         int ret = 0;
1230
1231         if (is_promisc_disable(rxf->rxmode_pending,
1232                                 rxf->rxmode_pending_bitmask) ||
1233                 (!(rxf->rxmode_active & BNA_RXMODE_PROMISC))) {
1234                 /* Do nothing if pending disable or already disabled */
1235         } else if (is_promisc_enable(rxf->rxmode_pending,
1236                                         rxf->rxmode_pending_bitmask)) {
1237                 /* Turn off pending enable command */
1238                 promisc_inactive(rxf->rxmode_pending,
1239                                 rxf->rxmode_pending_bitmask);
1240                 bna->promisc_rid = BFI_INVALID_RID;
1241         } else if (rxf->rxmode_active & BNA_RXMODE_PROMISC) {
1242                 /* Schedule disable */
1243                 promisc_disable(rxf->rxmode_pending,
1244                                 rxf->rxmode_pending_bitmask);
1245                 ret = 1;
1246         }
1247
1248         return ret;
1249 }
1250
1251 static int
1252 bna_rxf_allmulti_enable(struct bna_rxf *rxf)
1253 {
1254         int ret = 0;
1255
1256         if (is_allmulti_enable(rxf->rxmode_pending,
1257                         rxf->rxmode_pending_bitmask) ||
1258                         (rxf->rxmode_active & BNA_RXMODE_ALLMULTI)) {
1259                 /* Do nothing if pending enable or already enabled */
1260         } else if (is_allmulti_disable(rxf->rxmode_pending,
1261                                         rxf->rxmode_pending_bitmask)) {
1262                 /* Turn off pending disable command */
1263                 allmulti_inactive(rxf->rxmode_pending,
1264                         rxf->rxmode_pending_bitmask);
1265         } else {
1266                 /* Schedule enable */
1267                 allmulti_enable(rxf->rxmode_pending,
1268                                 rxf->rxmode_pending_bitmask);
1269                 ret = 1;
1270         }
1271
1272         return ret;
1273 }
1274
1275 static int
1276 bna_rxf_allmulti_disable(struct bna_rxf *rxf)
1277 {
1278         int ret = 0;
1279
1280         if (is_allmulti_disable(rxf->rxmode_pending,
1281                                 rxf->rxmode_pending_bitmask) ||
1282                 (!(rxf->rxmode_active & BNA_RXMODE_ALLMULTI))) {
1283                 /* Do nothing if pending disable or already disabled */
1284         } else if (is_allmulti_enable(rxf->rxmode_pending,
1285                                         rxf->rxmode_pending_bitmask)) {
1286                 /* Turn off pending enable command */
1287                 allmulti_inactive(rxf->rxmode_pending,
1288                                 rxf->rxmode_pending_bitmask);
1289         } else if (rxf->rxmode_active & BNA_RXMODE_ALLMULTI) {
1290                 /* Schedule disable */
1291                 allmulti_disable(rxf->rxmode_pending,
1292                                 rxf->rxmode_pending_bitmask);
1293                 ret = 1;
1294         }
1295
1296         return ret;
1297 }
1298
1299 static int
1300 bna_rxf_vlan_strip_cfg_apply(struct bna_rxf *rxf)
1301 {
1302         if (rxf->vlan_strip_pending) {
1303                         rxf->vlan_strip_pending = false;
1304                         bna_bfi_vlan_strip_enable(rxf);
1305                         return 1;
1306         }
1307
1308         return 0;
1309 }
1310
1311 /* RX */
1312
1313 #define BNA_GET_RXQS(qcfg)      (((qcfg)->rxp_type == BNA_RXP_SINGLE) ? \
1314         (qcfg)->num_paths : ((qcfg)->num_paths * 2))
1315
1316 #define SIZE_TO_PAGES(size)     (((size) >> PAGE_SHIFT) + ((((size) &\
1317         (PAGE_SIZE - 1)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT))
1318
1319 #define call_rx_stop_cbfn(rx)                                           \
1320 do {                                                                \
1321         if ((rx)->stop_cbfn) {                                          \
1322                 void (*cbfn)(void *, struct bna_rx *);    \
1323                 void *cbarg;                                        \
1324                 cbfn = (rx)->stop_cbfn;                          \
1325                 cbarg = (rx)->stop_cbarg;                              \
1326                 (rx)->stop_cbfn = NULL;                                 \
1327                 (rx)->stop_cbarg = NULL;                                \
1328                 cbfn(cbarg, rx);                                        \
1329         }                                                              \
1330 } while (0)
1331
1332 #define call_rx_stall_cbfn(rx)                                          \
1333 do {                                                                    \
1334         if ((rx)->rx_stall_cbfn)                                        \
1335                 (rx)->rx_stall_cbfn((rx)->bna->bnad, (rx));             \
1336 } while (0)
1337
1338 #define bfi_enet_datapath_q_init(bfi_q, bna_qpt)                        \
1339 do {                                                                    \
1340         struct bna_dma_addr cur_q_addr =                                \
1341                 *((struct bna_dma_addr *)((bna_qpt)->kv_qpt_ptr));      \
1342         (bfi_q)->pg_tbl.a32.addr_lo = (bna_qpt)->hw_qpt_ptr.lsb;        \
1343         (bfi_q)->pg_tbl.a32.addr_hi = (bna_qpt)->hw_qpt_ptr.msb;        \
1344         (bfi_q)->first_entry.a32.addr_lo = cur_q_addr.lsb;              \
1345         (bfi_q)->first_entry.a32.addr_hi = cur_q_addr.msb;              \
1346         (bfi_q)->pages = htons((u16)(bna_qpt)->page_count);     \
1347         (bfi_q)->page_sz = htons((u16)(bna_qpt)->page_size);\
1348 } while (0)
1349
1350 static void bna_bfi_rx_enet_start(struct bna_rx *rx);
1351 static void bna_rx_enet_stop(struct bna_rx *rx);
1352 static void bna_rx_mod_cb_rx_stopped(void *arg, struct bna_rx *rx);
1353
1354 bfa_fsm_state_decl(bna_rx, stopped,
1355         struct bna_rx, enum bna_rx_event);
1356 bfa_fsm_state_decl(bna_rx, start_wait,
1357         struct bna_rx, enum bna_rx_event);
1358 bfa_fsm_state_decl(bna_rx, rxf_start_wait,
1359         struct bna_rx, enum bna_rx_event);
1360 bfa_fsm_state_decl(bna_rx, started,
1361         struct bna_rx, enum bna_rx_event);
1362 bfa_fsm_state_decl(bna_rx, rxf_stop_wait,
1363         struct bna_rx, enum bna_rx_event);
1364 bfa_fsm_state_decl(bna_rx, stop_wait,
1365         struct bna_rx, enum bna_rx_event);
1366 bfa_fsm_state_decl(bna_rx, cleanup_wait,
1367         struct bna_rx, enum bna_rx_event);
1368 bfa_fsm_state_decl(bna_rx, failed,
1369         struct bna_rx, enum bna_rx_event);
1370 bfa_fsm_state_decl(bna_rx, quiesce_wait,
1371         struct bna_rx, enum bna_rx_event);
1372
1373 static void bna_rx_sm_stopped_entry(struct bna_rx *rx)
1374 {
1375         call_rx_stop_cbfn(rx);
1376 }
1377
1378 static void bna_rx_sm_stopped(struct bna_rx *rx,
1379                                 enum bna_rx_event event)
1380 {
1381         switch (event) {
1382         case RX_E_START:
1383                 bfa_fsm_set_state(rx, bna_rx_sm_start_wait);
1384                 break;
1385
1386         case RX_E_STOP:
1387                 call_rx_stop_cbfn(rx);
1388                 break;
1389
1390         case RX_E_FAIL:
1391                 /* no-op */
1392                 break;
1393
1394         default:
1395                 bfa_sm_fault(event);
1396                 break;
1397         }
1398 }
1399
1400 static void bna_rx_sm_start_wait_entry(struct bna_rx *rx)
1401 {
1402         bna_bfi_rx_enet_start(rx);
1403 }
1404
1405 void
1406 bna_rx_sm_stop_wait_entry(struct bna_rx *rx)
1407 {
1408 }
1409
1410 static void
1411 bna_rx_sm_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1412 {
1413         switch (event) {
1414         case RX_E_FAIL:
1415         case RX_E_STOPPED:
1416                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1417                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1418                 break;
1419
1420         case RX_E_STARTED:
1421                 bna_rx_enet_stop(rx);
1422                 break;
1423
1424         default:
1425                 bfa_sm_fault(event);
1426                 break;
1427         }
1428 }
1429
1430 static void bna_rx_sm_start_wait(struct bna_rx *rx,
1431                                 enum bna_rx_event event)
1432 {
1433         switch (event) {
1434         case RX_E_STOP:
1435                 bfa_fsm_set_state(rx, bna_rx_sm_stop_wait);
1436                 break;
1437
1438         case RX_E_FAIL:
1439                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1440                 break;
1441
1442         case RX_E_STARTED:
1443                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_start_wait);
1444                 break;
1445
1446         default:
1447                 bfa_sm_fault(event);
1448                 break;
1449         }
1450 }
1451
1452 static void bna_rx_sm_rxf_start_wait_entry(struct bna_rx *rx)
1453 {
1454         rx->rx_post_cbfn(rx->bna->bnad, rx);
1455         bna_rxf_start(&rx->rxf);
1456 }
1457
1458 void
1459 bna_rx_sm_rxf_stop_wait_entry(struct bna_rx *rx)
1460 {
1461 }
1462
1463 static void
1464 bna_rx_sm_rxf_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1465 {
1466         switch (event) {
1467         case RX_E_FAIL:
1468                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1469                 bna_rxf_fail(&rx->rxf);
1470                 call_rx_stall_cbfn(rx);
1471                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1472                 break;
1473
1474         case RX_E_RXF_STARTED:
1475                 bna_rxf_stop(&rx->rxf);
1476                 break;
1477
1478         case RX_E_RXF_STOPPED:
1479                 bfa_fsm_set_state(rx, bna_rx_sm_stop_wait);
1480                 call_rx_stall_cbfn(rx);
1481                 bna_rx_enet_stop(rx);
1482                 break;
1483
1484         default:
1485                 bfa_sm_fault(event);
1486                 break;
1487         }
1488
1489 }
1490
1491 void
1492 bna_rx_sm_started_entry(struct bna_rx *rx)
1493 {
1494         struct bna_rxp *rxp;
1495         struct list_head *qe_rxp;
1496         int is_regular = (rx->type == BNA_RX_T_REGULAR);
1497
1498         /* Start IB */
1499         list_for_each(qe_rxp, &rx->rxp_q) {
1500                 rxp = (struct bna_rxp *)qe_rxp;
1501                 bna_ib_start(rx->bna, &rxp->cq.ib, is_regular);
1502         }
1503
1504         bna_ethport_cb_rx_started(&rx->bna->ethport);
1505 }
1506
1507 static void
1508 bna_rx_sm_started(struct bna_rx *rx, enum bna_rx_event event)
1509 {
1510         switch (event) {
1511         case RX_E_STOP:
1512                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_stop_wait);
1513                 bna_ethport_cb_rx_stopped(&rx->bna->ethport);
1514                 bna_rxf_stop(&rx->rxf);
1515                 break;
1516
1517         case RX_E_FAIL:
1518                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1519                 bna_ethport_cb_rx_stopped(&rx->bna->ethport);
1520                 bna_rxf_fail(&rx->rxf);
1521                 call_rx_stall_cbfn(rx);
1522                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1523                 break;
1524
1525         default:
1526                 bfa_sm_fault(event);
1527                 break;
1528         }
1529 }
1530
1531 static void bna_rx_sm_rxf_start_wait(struct bna_rx *rx,
1532                                 enum bna_rx_event event)
1533 {
1534         switch (event) {
1535         case RX_E_STOP:
1536                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_stop_wait);
1537                 break;
1538
1539         case RX_E_FAIL:
1540                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1541                 bna_rxf_fail(&rx->rxf);
1542                 call_rx_stall_cbfn(rx);
1543                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1544                 break;
1545
1546         case RX_E_RXF_STARTED:
1547                 bfa_fsm_set_state(rx, bna_rx_sm_started);
1548                 break;
1549
1550         default:
1551                 bfa_sm_fault(event);
1552                 break;
1553         }
1554 }
1555
1556 void
1557 bna_rx_sm_cleanup_wait_entry(struct bna_rx *rx)
1558 {
1559 }
1560
1561 void
1562 bna_rx_sm_cleanup_wait(struct bna_rx *rx, enum bna_rx_event event)
1563 {
1564         switch (event) {
1565         case RX_E_FAIL:
1566         case RX_E_RXF_STOPPED:
1567                 /* No-op */
1568                 break;
1569
1570         case RX_E_CLEANUP_DONE:
1571                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1572                 break;
1573
1574         default:
1575                 bfa_sm_fault(event);
1576                 break;
1577         }
1578 }
1579
1580 static void
1581 bna_rx_sm_failed_entry(struct bna_rx *rx)
1582 {
1583 }
1584
1585 static void
1586 bna_rx_sm_failed(struct bna_rx *rx, enum bna_rx_event event)
1587 {
1588         switch (event) {
1589         case RX_E_START:
1590                 bfa_fsm_set_state(rx, bna_rx_sm_quiesce_wait);
1591                 break;
1592
1593         case RX_E_STOP:
1594                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1595                 break;
1596
1597         case RX_E_FAIL:
1598         case RX_E_RXF_STARTED:
1599         case RX_E_RXF_STOPPED:
1600                 /* No-op */
1601                 break;
1602
1603         case RX_E_CLEANUP_DONE:
1604                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1605                 break;
1606
1607         default:
1608                 bfa_sm_fault(event);
1609                 break;
1610 }       }
1611
1612 static void
1613 bna_rx_sm_quiesce_wait_entry(struct bna_rx *rx)
1614 {
1615 }
1616
1617 static void
1618 bna_rx_sm_quiesce_wait(struct bna_rx *rx, enum bna_rx_event event)
1619 {
1620         switch (event) {
1621         case RX_E_STOP:
1622                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1623                 break;
1624
1625         case RX_E_FAIL:
1626                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1627                 break;
1628
1629         case RX_E_CLEANUP_DONE:
1630                 bfa_fsm_set_state(rx, bna_rx_sm_start_wait);
1631                 break;
1632
1633         default:
1634                 bfa_sm_fault(event);
1635                 break;
1636         }
1637 }
1638
1639 static void
1640 bna_bfi_rx_enet_start(struct bna_rx *rx)
1641 {
1642         struct bfi_enet_rx_cfg_req *cfg_req = &rx->bfi_enet_cmd.cfg_req;
1643         struct bna_rxp *rxp = NULL;
1644         struct bna_rxq *q0 = NULL, *q1 = NULL;
1645         struct list_head *rxp_qe;
1646         int i;
1647
1648         bfi_msgq_mhdr_set(cfg_req->mh, BFI_MC_ENET,
1649                 BFI_ENET_H2I_RX_CFG_SET_REQ, 0, rx->rid);
1650         cfg_req->mh.num_entries = htons(
1651                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rx_cfg_req)));
1652
1653         cfg_req->num_queue_sets = rx->num_paths;
1654         for (i = 0, rxp_qe = bfa_q_first(&rx->rxp_q);
1655                 i < rx->num_paths;
1656                 i++, rxp_qe = bfa_q_next(rxp_qe)) {
1657                 rxp = (struct bna_rxp *)rxp_qe;
1658
1659                 GET_RXQS(rxp, q0, q1);
1660                 switch (rxp->type) {
1661                 case BNA_RXP_SLR:
1662                 case BNA_RXP_HDS:
1663                         /* Small RxQ */
1664                         bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].qs.q,
1665                                                 &q1->qpt);
1666                         cfg_req->q_cfg[i].qs.rx_buffer_size =
1667                                 htons((u16)q1->buffer_size);
1668                         /* Fall through */
1669
1670                 case BNA_RXP_SINGLE:
1671                         /* Large/Single RxQ */
1672                         bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].ql.q,
1673                                                 &q0->qpt);
1674                         q0->buffer_size =
1675                                 bna_enet_mtu_get(&rx->bna->enet);
1676                         cfg_req->q_cfg[i].ql.rx_buffer_size =
1677                                 htons((u16)q0->buffer_size);
1678                         break;
1679
1680                 default:
1681                         BUG_ON(1);
1682                 }
1683
1684                 bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].cq.q,
1685                                         &rxp->cq.qpt);
1686
1687                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_lo =
1688                         rxp->cq.ib.ib_seg_host_addr.lsb;
1689                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_hi =
1690                         rxp->cq.ib.ib_seg_host_addr.msb;
1691                 cfg_req->q_cfg[i].ib.intr.msix_index =
1692                         htons((u16)rxp->cq.ib.intr_vector);
1693         }
1694
1695         cfg_req->ib_cfg.int_pkt_dma = BNA_STATUS_T_DISABLED;
1696         cfg_req->ib_cfg.int_enabled = BNA_STATUS_T_ENABLED;
1697         cfg_req->ib_cfg.int_pkt_enabled = BNA_STATUS_T_DISABLED;
1698         cfg_req->ib_cfg.continuous_coalescing = BNA_STATUS_T_DISABLED;
1699         cfg_req->ib_cfg.msix = (rxp->cq.ib.intr_type == BNA_INTR_T_MSIX)
1700                                 ? BNA_STATUS_T_ENABLED :
1701                                 BNA_STATUS_T_DISABLED;
1702         cfg_req->ib_cfg.coalescing_timeout =
1703                         htonl((u32)rxp->cq.ib.coalescing_timeo);
1704         cfg_req->ib_cfg.inter_pkt_timeout =
1705                         htonl((u32)rxp->cq.ib.interpkt_timeo);
1706         cfg_req->ib_cfg.inter_pkt_count = (u8)rxp->cq.ib.interpkt_count;
1707
1708         switch (rxp->type) {
1709         case BNA_RXP_SLR:
1710                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_LARGE_SMALL;
1711                 break;
1712
1713         case BNA_RXP_HDS:
1714                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_HDS;
1715                 cfg_req->rx_cfg.hds.type = rx->hds_cfg.hdr_type;
1716                 cfg_req->rx_cfg.hds.force_offset = rx->hds_cfg.forced_offset;
1717                 cfg_req->rx_cfg.hds.max_header_size = rx->hds_cfg.forced_offset;
1718                 break;
1719
1720         case BNA_RXP_SINGLE:
1721                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_SINGLE;
1722                 break;
1723
1724         default:
1725                 BUG_ON(1);
1726         }
1727         cfg_req->rx_cfg.strip_vlan = rx->rxf.vlan_strip_status;
1728
1729         bfa_msgq_cmd_set(&rx->msgq_cmd, NULL, NULL,
1730                 sizeof(struct bfi_enet_rx_cfg_req), &cfg_req->mh);
1731         bfa_msgq_cmd_post(&rx->bna->msgq, &rx->msgq_cmd);
1732 }
1733
1734 static void
1735 bna_bfi_rx_enet_stop(struct bna_rx *rx)
1736 {
1737         struct bfi_enet_req *req = &rx->bfi_enet_cmd.req;
1738
1739         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
1740                 BFI_ENET_H2I_RX_CFG_CLR_REQ, 0, rx->rid);
1741         req->mh.num_entries = htons(
1742                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_req)));
1743         bfa_msgq_cmd_set(&rx->msgq_cmd, NULL, NULL, sizeof(struct bfi_enet_req),
1744                 &req->mh);
1745         bfa_msgq_cmd_post(&rx->bna->msgq, &rx->msgq_cmd);
1746 }
1747
1748 static void
1749 bna_rx_enet_stop(struct bna_rx *rx)
1750 {
1751         struct bna_rxp *rxp;
1752         struct list_head                 *qe_rxp;
1753
1754         /* Stop IB */
1755         list_for_each(qe_rxp, &rx->rxp_q) {
1756                 rxp = (struct bna_rxp *)qe_rxp;
1757                 bna_ib_stop(rx->bna, &rxp->cq.ib);
1758         }
1759
1760         bna_bfi_rx_enet_stop(rx);
1761 }
1762
1763 static int
1764 bna_rx_res_check(struct bna_rx_mod *rx_mod, struct bna_rx_config *rx_cfg)
1765 {
1766         if ((rx_mod->rx_free_count == 0) ||
1767                 (rx_mod->rxp_free_count == 0) ||
1768                 (rx_mod->rxq_free_count == 0))
1769                 return 0;
1770
1771         if (rx_cfg->rxp_type == BNA_RXP_SINGLE) {
1772                 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1773                         (rx_mod->rxq_free_count < rx_cfg->num_paths))
1774                                 return 0;
1775         } else {
1776                 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1777                         (rx_mod->rxq_free_count < (2 * rx_cfg->num_paths)))
1778                         return 0;
1779         }
1780
1781         return 1;
1782 }
1783
1784 static struct bna_rxq *
1785 bna_rxq_get(struct bna_rx_mod *rx_mod)
1786 {
1787         struct bna_rxq *rxq = NULL;
1788         struct list_head        *qe = NULL;
1789
1790         bfa_q_deq(&rx_mod->rxq_free_q, &qe);
1791         rx_mod->rxq_free_count--;
1792         rxq = (struct bna_rxq *)qe;
1793         bfa_q_qe_init(&rxq->qe);
1794
1795         return rxq;
1796 }
1797
1798 static void
1799 bna_rxq_put(struct bna_rx_mod *rx_mod, struct bna_rxq *rxq)
1800 {
1801         bfa_q_qe_init(&rxq->qe);
1802         list_add_tail(&rxq->qe, &rx_mod->rxq_free_q);
1803         rx_mod->rxq_free_count++;
1804 }
1805
1806 static struct bna_rxp *
1807 bna_rxp_get(struct bna_rx_mod *rx_mod)
1808 {
1809         struct list_head        *qe = NULL;
1810         struct bna_rxp *rxp = NULL;
1811
1812         bfa_q_deq(&rx_mod->rxp_free_q, &qe);
1813         rx_mod->rxp_free_count--;
1814         rxp = (struct bna_rxp *)qe;
1815         bfa_q_qe_init(&rxp->qe);
1816
1817         return rxp;
1818 }
1819
1820 static void
1821 bna_rxp_put(struct bna_rx_mod *rx_mod, struct bna_rxp *rxp)
1822 {
1823         bfa_q_qe_init(&rxp->qe);
1824         list_add_tail(&rxp->qe, &rx_mod->rxp_free_q);
1825         rx_mod->rxp_free_count++;
1826 }
1827
1828 static struct bna_rx *
1829 bna_rx_get(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
1830 {
1831         struct list_head        *qe = NULL;
1832         struct bna_rx *rx = NULL;
1833
1834         if (type == BNA_RX_T_REGULAR) {
1835                 bfa_q_deq(&rx_mod->rx_free_q, &qe);
1836         } else
1837                 bfa_q_deq_tail(&rx_mod->rx_free_q, &qe);
1838
1839         rx_mod->rx_free_count--;
1840         rx = (struct bna_rx *)qe;
1841         bfa_q_qe_init(&rx->qe);
1842         list_add_tail(&rx->qe, &rx_mod->rx_active_q);
1843         rx->type = type;
1844
1845         return rx;
1846 }
1847
1848 static void
1849 bna_rx_put(struct bna_rx_mod *rx_mod, struct bna_rx *rx)
1850 {
1851         struct list_head *prev_qe = NULL;
1852         struct list_head *qe;
1853
1854         bfa_q_qe_init(&rx->qe);
1855
1856         list_for_each(qe, &rx_mod->rx_free_q) {
1857                 if (((struct bna_rx *)qe)->rid < rx->rid)
1858                         prev_qe = qe;
1859                 else
1860                         break;
1861         }
1862
1863         if (prev_qe == NULL) {
1864                 /* This is the first entry */
1865                 bfa_q_enq_head(&rx_mod->rx_free_q, &rx->qe);
1866         } else if (bfa_q_next(prev_qe) == &rx_mod->rx_free_q) {
1867                 /* This is the last entry */
1868                 list_add_tail(&rx->qe, &rx_mod->rx_free_q);
1869         } else {
1870                 /* Somewhere in the middle */
1871                 bfa_q_next(&rx->qe) = bfa_q_next(prev_qe);
1872                 bfa_q_prev(&rx->qe) = prev_qe;
1873                 bfa_q_next(prev_qe) = &rx->qe;
1874                 bfa_q_prev(bfa_q_next(&rx->qe)) = &rx->qe;
1875         }
1876
1877         rx_mod->rx_free_count++;
1878 }
1879
1880 static void
1881 bna_rxp_add_rxqs(struct bna_rxp *rxp, struct bna_rxq *q0,
1882                 struct bna_rxq *q1)
1883 {
1884         switch (rxp->type) {
1885         case BNA_RXP_SINGLE:
1886                 rxp->rxq.single.only = q0;
1887                 rxp->rxq.single.reserved = NULL;
1888                 break;
1889         case BNA_RXP_SLR:
1890                 rxp->rxq.slr.large = q0;
1891                 rxp->rxq.slr.small = q1;
1892                 break;
1893         case BNA_RXP_HDS:
1894                 rxp->rxq.hds.data = q0;
1895                 rxp->rxq.hds.hdr = q1;
1896                 break;
1897         default:
1898                 break;
1899         }
1900 }
1901
1902 static void
1903 bna_rxq_qpt_setup(struct bna_rxq *rxq,
1904                 struct bna_rxp *rxp,
1905                 u32 page_count,
1906                 u32 page_size,
1907                 struct bna_mem_descr *qpt_mem,
1908                 struct bna_mem_descr *swqpt_mem,
1909                 struct bna_mem_descr *page_mem)
1910 {
1911         u8 *kva;
1912         u64 dma;
1913         struct bna_dma_addr bna_dma;
1914         int     i;
1915
1916         rxq->qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
1917         rxq->qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
1918         rxq->qpt.kv_qpt_ptr = qpt_mem->kva;
1919         rxq->qpt.page_count = page_count;
1920         rxq->qpt.page_size = page_size;
1921
1922         rxq->rcb->sw_qpt = (void **) swqpt_mem->kva;
1923         rxq->rcb->sw_q = page_mem->kva;
1924
1925         kva = page_mem->kva;
1926         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
1927
1928         for (i = 0; i < rxq->qpt.page_count; i++) {
1929                 rxq->rcb->sw_qpt[i] = kva;
1930                 kva += PAGE_SIZE;
1931
1932                 BNA_SET_DMA_ADDR(dma, &bna_dma);
1933                 ((struct bna_dma_addr *)rxq->qpt.kv_qpt_ptr)[i].lsb =
1934                         bna_dma.lsb;
1935                 ((struct bna_dma_addr *)rxq->qpt.kv_qpt_ptr)[i].msb =
1936                         bna_dma.msb;
1937                 dma += PAGE_SIZE;
1938         }
1939 }
1940
1941 static void
1942 bna_rxp_cqpt_setup(struct bna_rxp *rxp,
1943                 u32 page_count,
1944                 u32 page_size,
1945                 struct bna_mem_descr *qpt_mem,
1946                 struct bna_mem_descr *swqpt_mem,
1947                 struct bna_mem_descr *page_mem)
1948 {
1949         u8 *kva;
1950         u64 dma;
1951         struct bna_dma_addr bna_dma;
1952         int     i;
1953
1954         rxp->cq.qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
1955         rxp->cq.qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
1956         rxp->cq.qpt.kv_qpt_ptr = qpt_mem->kva;
1957         rxp->cq.qpt.page_count = page_count;
1958         rxp->cq.qpt.page_size = page_size;
1959
1960         rxp->cq.ccb->sw_qpt = (void **) swqpt_mem->kva;
1961         rxp->cq.ccb->sw_q = page_mem->kva;
1962
1963         kva = page_mem->kva;
1964         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
1965
1966         for (i = 0; i < rxp->cq.qpt.page_count; i++) {
1967                 rxp->cq.ccb->sw_qpt[i] = kva;
1968                 kva += PAGE_SIZE;
1969
1970                 BNA_SET_DMA_ADDR(dma, &bna_dma);
1971                 ((struct bna_dma_addr *)rxp->cq.qpt.kv_qpt_ptr)[i].lsb =
1972                         bna_dma.lsb;
1973                 ((struct bna_dma_addr *)rxp->cq.qpt.kv_qpt_ptr)[i].msb =
1974                         bna_dma.msb;
1975                 dma += PAGE_SIZE;
1976         }
1977 }
1978
1979 static void
1980 bna_rx_mod_cb_rx_stopped(void *arg, struct bna_rx *rx)
1981 {
1982         struct bna_rx_mod *rx_mod = (struct bna_rx_mod *)arg;
1983
1984         bfa_wc_down(&rx_mod->rx_stop_wc);
1985 }
1986
1987 static void
1988 bna_rx_mod_cb_rx_stopped_all(void *arg)
1989 {
1990         struct bna_rx_mod *rx_mod = (struct bna_rx_mod *)arg;
1991
1992         if (rx_mod->stop_cbfn)
1993                 rx_mod->stop_cbfn(&rx_mod->bna->enet);
1994         rx_mod->stop_cbfn = NULL;
1995 }
1996
1997 static void
1998 bna_rx_start(struct bna_rx *rx)
1999 {
2000         rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2001         if (rx->rx_flags & BNA_RX_F_ENABLED)
2002                 bfa_fsm_send_event(rx, RX_E_START);
2003 }
2004
2005 static void
2006 bna_rx_stop(struct bna_rx *rx)
2007 {
2008         rx->rx_flags &= ~BNA_RX_F_ENET_STARTED;
2009         if (rx->fsm == (bfa_fsm_t) bna_rx_sm_stopped)
2010                 bna_rx_mod_cb_rx_stopped(&rx->bna->rx_mod, rx);
2011         else {
2012                 rx->stop_cbfn = bna_rx_mod_cb_rx_stopped;
2013                 rx->stop_cbarg = &rx->bna->rx_mod;
2014                 bfa_fsm_send_event(rx, RX_E_STOP);
2015         }
2016 }
2017
2018 static void
2019 bna_rx_fail(struct bna_rx *rx)
2020 {
2021         /* Indicate Enet is not enabled, and failed */
2022         rx->rx_flags &= ~BNA_RX_F_ENET_STARTED;
2023         bfa_fsm_send_event(rx, RX_E_FAIL);
2024 }
2025
2026 void
2027 bna_rx_mod_start(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
2028 {
2029         struct bna_rx *rx;
2030         struct list_head *qe;
2031
2032         rx_mod->flags |= BNA_RX_MOD_F_ENET_STARTED;
2033         if (type == BNA_RX_T_LOOPBACK)
2034                 rx_mod->flags |= BNA_RX_MOD_F_ENET_LOOPBACK;
2035
2036         list_for_each(qe, &rx_mod->rx_active_q) {
2037                 rx = (struct bna_rx *)qe;
2038                 if (rx->type == type)
2039                         bna_rx_start(rx);
2040         }
2041 }
2042
2043 void
2044 bna_rx_mod_stop(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
2045 {
2046         struct bna_rx *rx;
2047         struct list_head *qe;
2048
2049         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_STARTED;
2050         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_LOOPBACK;
2051
2052         rx_mod->stop_cbfn = bna_enet_cb_rx_stopped;
2053
2054         bfa_wc_init(&rx_mod->rx_stop_wc, bna_rx_mod_cb_rx_stopped_all, rx_mod);
2055
2056         list_for_each(qe, &rx_mod->rx_active_q) {
2057                 rx = (struct bna_rx *)qe;
2058                 if (rx->type == type) {
2059                         bfa_wc_up(&rx_mod->rx_stop_wc);
2060                         bna_rx_stop(rx);
2061                 }
2062         }
2063
2064         bfa_wc_wait(&rx_mod->rx_stop_wc);
2065 }
2066
2067 void
2068 bna_rx_mod_fail(struct bna_rx_mod *rx_mod)
2069 {
2070         struct bna_rx *rx;
2071         struct list_head *qe;
2072
2073         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_STARTED;
2074         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_LOOPBACK;
2075
2076         list_for_each(qe, &rx_mod->rx_active_q) {
2077                 rx = (struct bna_rx *)qe;
2078                 bna_rx_fail(rx);
2079         }
2080 }
2081
2082 void bna_rx_mod_init(struct bna_rx_mod *rx_mod, struct bna *bna,
2083                         struct bna_res_info *res_info)
2084 {
2085         int     index;
2086         struct bna_rx *rx_ptr;
2087         struct bna_rxp *rxp_ptr;
2088         struct bna_rxq *rxq_ptr;
2089
2090         rx_mod->bna = bna;
2091         rx_mod->flags = 0;
2092
2093         rx_mod->rx = (struct bna_rx *)
2094                 res_info[BNA_MOD_RES_MEM_T_RX_ARRAY].res_u.mem_info.mdl[0].kva;
2095         rx_mod->rxp = (struct bna_rxp *)
2096                 res_info[BNA_MOD_RES_MEM_T_RXP_ARRAY].res_u.mem_info.mdl[0].kva;
2097         rx_mod->rxq = (struct bna_rxq *)
2098                 res_info[BNA_MOD_RES_MEM_T_RXQ_ARRAY].res_u.mem_info.mdl[0].kva;
2099
2100         /* Initialize the queues */
2101         INIT_LIST_HEAD(&rx_mod->rx_free_q);
2102         rx_mod->rx_free_count = 0;
2103         INIT_LIST_HEAD(&rx_mod->rxq_free_q);
2104         rx_mod->rxq_free_count = 0;
2105         INIT_LIST_HEAD(&rx_mod->rxp_free_q);
2106         rx_mod->rxp_free_count = 0;
2107         INIT_LIST_HEAD(&rx_mod->rx_active_q);
2108
2109         /* Build RX queues */
2110         for (index = 0; index < bna->ioceth.attr.num_rxp; index++) {
2111                 rx_ptr = &rx_mod->rx[index];
2112
2113                 bfa_q_qe_init(&rx_ptr->qe);
2114                 INIT_LIST_HEAD(&rx_ptr->rxp_q);
2115                 rx_ptr->bna = NULL;
2116                 rx_ptr->rid = index;
2117                 rx_ptr->stop_cbfn = NULL;
2118                 rx_ptr->stop_cbarg = NULL;
2119
2120                 list_add_tail(&rx_ptr->qe, &rx_mod->rx_free_q);
2121                 rx_mod->rx_free_count++;
2122         }
2123
2124         /* build RX-path queue */
2125         for (index = 0; index < bna->ioceth.attr.num_rxp; index++) {
2126                 rxp_ptr = &rx_mod->rxp[index];
2127                 bfa_q_qe_init(&rxp_ptr->qe);
2128                 list_add_tail(&rxp_ptr->qe, &rx_mod->rxp_free_q);
2129                 rx_mod->rxp_free_count++;
2130         }
2131
2132         /* build RXQ queue */
2133         for (index = 0; index < (bna->ioceth.attr.num_rxp * 2); index++) {
2134                 rxq_ptr = &rx_mod->rxq[index];
2135                 bfa_q_qe_init(&rxq_ptr->qe);
2136                 list_add_tail(&rxq_ptr->qe, &rx_mod->rxq_free_q);
2137                 rx_mod->rxq_free_count++;
2138         }
2139 }
2140
2141 void
2142 bna_rx_mod_uninit(struct bna_rx_mod *rx_mod)
2143 {
2144         struct list_head                *qe;
2145         int i;
2146
2147         i = 0;
2148         list_for_each(qe, &rx_mod->rx_free_q)
2149                 i++;
2150
2151         i = 0;
2152         list_for_each(qe, &rx_mod->rxp_free_q)
2153                 i++;
2154
2155         i = 0;
2156         list_for_each(qe, &rx_mod->rxq_free_q)
2157                 i++;
2158
2159         rx_mod->bna = NULL;
2160 }
2161
2162 void
2163 bna_bfi_rx_enet_start_rsp(struct bna_rx *rx, struct bfi_msgq_mhdr *msghdr)
2164 {
2165         struct bfi_enet_rx_cfg_rsp *cfg_rsp = &rx->bfi_enet_cmd.cfg_rsp;
2166         struct bna_rxp *rxp = NULL;
2167         struct bna_rxq *q0 = NULL, *q1 = NULL;
2168         struct list_head *rxp_qe;
2169         int i;
2170
2171         bfa_msgq_rsp_copy(&rx->bna->msgq, (u8 *)cfg_rsp,
2172                 sizeof(struct bfi_enet_rx_cfg_rsp));
2173
2174         rx->hw_id = cfg_rsp->hw_id;
2175
2176         for (i = 0, rxp_qe = bfa_q_first(&rx->rxp_q);
2177                 i < rx->num_paths;
2178                 i++, rxp_qe = bfa_q_next(rxp_qe)) {
2179                 rxp = (struct bna_rxp *)rxp_qe;
2180                 GET_RXQS(rxp, q0, q1);
2181
2182                 /* Setup doorbells */
2183                 rxp->cq.ccb->i_dbell->doorbell_addr =
2184                         rx->bna->pcidev.pci_bar_kva
2185                         + ntohl(cfg_rsp->q_handles[i].i_dbell);
2186                 rxp->hw_id = cfg_rsp->q_handles[i].hw_cqid;
2187                 q0->rcb->q_dbell =
2188                         rx->bna->pcidev.pci_bar_kva
2189                         + ntohl(cfg_rsp->q_handles[i].ql_dbell);
2190                 q0->hw_id = cfg_rsp->q_handles[i].hw_lqid;
2191                 if (q1) {
2192                         q1->rcb->q_dbell =
2193                         rx->bna->pcidev.pci_bar_kva
2194                         + ntohl(cfg_rsp->q_handles[i].qs_dbell);
2195                         q1->hw_id = cfg_rsp->q_handles[i].hw_sqid;
2196                 }
2197
2198                 /* Initialize producer/consumer indexes */
2199                 (*rxp->cq.ccb->hw_producer_index) = 0;
2200                 rxp->cq.ccb->producer_index = 0;
2201                 q0->rcb->producer_index = q0->rcb->consumer_index = 0;
2202                 if (q1)
2203                         q1->rcb->producer_index = q1->rcb->consumer_index = 0;
2204         }
2205
2206         bfa_fsm_send_event(rx, RX_E_STARTED);
2207 }
2208
2209 void
2210 bna_bfi_rx_enet_stop_rsp(struct bna_rx *rx, struct bfi_msgq_mhdr *msghdr)
2211 {
2212         bfa_fsm_send_event(rx, RX_E_STOPPED);
2213 }
2214
2215 void
2216 bna_rx_res_req(struct bna_rx_config *q_cfg, struct bna_res_info *res_info)
2217 {
2218         u32 cq_size, hq_size, dq_size;
2219         u32 cpage_count, hpage_count, dpage_count;
2220         struct bna_mem_info *mem_info;
2221         u32 cq_depth;
2222         u32 hq_depth;
2223         u32 dq_depth;
2224
2225         dq_depth = q_cfg->q_depth;
2226         hq_depth = ((q_cfg->rxp_type == BNA_RXP_SINGLE) ? 0 : q_cfg->q_depth);
2227         cq_depth = dq_depth + hq_depth;
2228
2229         BNA_TO_POWER_OF_2_HIGH(cq_depth);
2230         cq_size = cq_depth * BFI_CQ_WI_SIZE;
2231         cq_size = ALIGN(cq_size, PAGE_SIZE);
2232         cpage_count = SIZE_TO_PAGES(cq_size);
2233
2234         BNA_TO_POWER_OF_2_HIGH(dq_depth);
2235         dq_size = dq_depth * BFI_RXQ_WI_SIZE;
2236         dq_size = ALIGN(dq_size, PAGE_SIZE);
2237         dpage_count = SIZE_TO_PAGES(dq_size);
2238
2239         if (BNA_RXP_SINGLE != q_cfg->rxp_type) {
2240                 BNA_TO_POWER_OF_2_HIGH(hq_depth);
2241                 hq_size = hq_depth * BFI_RXQ_WI_SIZE;
2242                 hq_size = ALIGN(hq_size, PAGE_SIZE);
2243                 hpage_count = SIZE_TO_PAGES(hq_size);
2244         } else
2245                 hpage_count = 0;
2246
2247         res_info[BNA_RX_RES_MEM_T_CCB].res_type = BNA_RES_T_MEM;
2248         mem_info = &res_info[BNA_RX_RES_MEM_T_CCB].res_u.mem_info;
2249         mem_info->mem_type = BNA_MEM_T_KVA;
2250         mem_info->len = sizeof(struct bna_ccb);
2251         mem_info->num = q_cfg->num_paths;
2252
2253         res_info[BNA_RX_RES_MEM_T_RCB].res_type = BNA_RES_T_MEM;
2254         mem_info = &res_info[BNA_RX_RES_MEM_T_RCB].res_u.mem_info;
2255         mem_info->mem_type = BNA_MEM_T_KVA;
2256         mem_info->len = sizeof(struct bna_rcb);
2257         mem_info->num = BNA_GET_RXQS(q_cfg);
2258
2259         res_info[BNA_RX_RES_MEM_T_CQPT].res_type = BNA_RES_T_MEM;
2260         mem_info = &res_info[BNA_RX_RES_MEM_T_CQPT].res_u.mem_info;
2261         mem_info->mem_type = BNA_MEM_T_DMA;
2262         mem_info->len = cpage_count * sizeof(struct bna_dma_addr);
2263         mem_info->num = q_cfg->num_paths;
2264
2265         res_info[BNA_RX_RES_MEM_T_CSWQPT].res_type = BNA_RES_T_MEM;
2266         mem_info = &res_info[BNA_RX_RES_MEM_T_CSWQPT].res_u.mem_info;
2267         mem_info->mem_type = BNA_MEM_T_KVA;
2268         mem_info->len = cpage_count * sizeof(void *);
2269         mem_info->num = q_cfg->num_paths;
2270
2271         res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_type = BNA_RES_T_MEM;
2272         mem_info = &res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info;
2273         mem_info->mem_type = BNA_MEM_T_DMA;
2274         mem_info->len = PAGE_SIZE * cpage_count;
2275         mem_info->num = q_cfg->num_paths;
2276
2277         res_info[BNA_RX_RES_MEM_T_DQPT].res_type = BNA_RES_T_MEM;
2278         mem_info = &res_info[BNA_RX_RES_MEM_T_DQPT].res_u.mem_info;
2279         mem_info->mem_type = BNA_MEM_T_DMA;
2280         mem_info->len = dpage_count * sizeof(struct bna_dma_addr);
2281         mem_info->num = q_cfg->num_paths;
2282
2283         res_info[BNA_RX_RES_MEM_T_DSWQPT].res_type = BNA_RES_T_MEM;
2284         mem_info = &res_info[BNA_RX_RES_MEM_T_DSWQPT].res_u.mem_info;
2285         mem_info->mem_type = BNA_MEM_T_KVA;
2286         mem_info->len = dpage_count * sizeof(void *);
2287         mem_info->num = q_cfg->num_paths;
2288
2289         res_info[BNA_RX_RES_MEM_T_DPAGE].res_type = BNA_RES_T_MEM;
2290         mem_info = &res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info;
2291         mem_info->mem_type = BNA_MEM_T_DMA;
2292         mem_info->len = PAGE_SIZE * dpage_count;
2293         mem_info->num = q_cfg->num_paths;
2294
2295         res_info[BNA_RX_RES_MEM_T_HQPT].res_type = BNA_RES_T_MEM;
2296         mem_info = &res_info[BNA_RX_RES_MEM_T_HQPT].res_u.mem_info;
2297         mem_info->mem_type = BNA_MEM_T_DMA;
2298         mem_info->len = hpage_count * sizeof(struct bna_dma_addr);
2299         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2300
2301         res_info[BNA_RX_RES_MEM_T_HSWQPT].res_type = BNA_RES_T_MEM;
2302         mem_info = &res_info[BNA_RX_RES_MEM_T_HSWQPT].res_u.mem_info;
2303         mem_info->mem_type = BNA_MEM_T_KVA;
2304         mem_info->len = hpage_count * sizeof(void *);
2305         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2306
2307         res_info[BNA_RX_RES_MEM_T_HPAGE].res_type = BNA_RES_T_MEM;
2308         mem_info = &res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info;
2309         mem_info->mem_type = BNA_MEM_T_DMA;
2310         mem_info->len = PAGE_SIZE * hpage_count;
2311         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2312
2313         res_info[BNA_RX_RES_MEM_T_IBIDX].res_type = BNA_RES_T_MEM;
2314         mem_info = &res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info;
2315         mem_info->mem_type = BNA_MEM_T_DMA;
2316         mem_info->len = BFI_IBIDX_SIZE;
2317         mem_info->num = q_cfg->num_paths;
2318
2319         res_info[BNA_RX_RES_MEM_T_RIT].res_type = BNA_RES_T_MEM;
2320         mem_info = &res_info[BNA_RX_RES_MEM_T_RIT].res_u.mem_info;
2321         mem_info->mem_type = BNA_MEM_T_KVA;
2322         mem_info->len = BFI_ENET_RSS_RIT_MAX;
2323         mem_info->num = 1;
2324
2325         res_info[BNA_RX_RES_T_INTR].res_type = BNA_RES_T_INTR;
2326         res_info[BNA_RX_RES_T_INTR].res_u.intr_info.intr_type = BNA_INTR_T_MSIX;
2327         res_info[BNA_RX_RES_T_INTR].res_u.intr_info.num = q_cfg->num_paths;
2328 }
2329
2330 struct bna_rx *
2331 bna_rx_create(struct bna *bna, struct bnad *bnad,
2332                 struct bna_rx_config *rx_cfg,
2333                 const struct bna_rx_event_cbfn *rx_cbfn,
2334                 struct bna_res_info *res_info,
2335                 void *priv)
2336 {
2337         struct bna_rx_mod *rx_mod = &bna->rx_mod;
2338         struct bna_rx *rx;
2339         struct bna_rxp *rxp;
2340         struct bna_rxq *q0;
2341         struct bna_rxq *q1;
2342         struct bna_intr_info *intr_info;
2343         u32 page_count;
2344         struct bna_mem_descr *ccb_mem;
2345         struct bna_mem_descr *rcb_mem;
2346         struct bna_mem_descr *unmapq_mem;
2347         struct bna_mem_descr *cqpt_mem;
2348         struct bna_mem_descr *cswqpt_mem;
2349         struct bna_mem_descr *cpage_mem;
2350         struct bna_mem_descr *hqpt_mem;
2351         struct bna_mem_descr *dqpt_mem;
2352         struct bna_mem_descr *hsqpt_mem;
2353         struct bna_mem_descr *dsqpt_mem;
2354         struct bna_mem_descr *hpage_mem;
2355         struct bna_mem_descr *dpage_mem;
2356         int i;
2357         int dpage_count, hpage_count, rcb_idx;
2358
2359         if (!bna_rx_res_check(rx_mod, rx_cfg))
2360                 return NULL;
2361
2362         intr_info = &res_info[BNA_RX_RES_T_INTR].res_u.intr_info;
2363         ccb_mem = &res_info[BNA_RX_RES_MEM_T_CCB].res_u.mem_info.mdl[0];
2364         rcb_mem = &res_info[BNA_RX_RES_MEM_T_RCB].res_u.mem_info.mdl[0];
2365         unmapq_mem = &res_info[BNA_RX_RES_MEM_T_UNMAPQ].res_u.mem_info.mdl[0];
2366         cqpt_mem = &res_info[BNA_RX_RES_MEM_T_CQPT].res_u.mem_info.mdl[0];
2367         cswqpt_mem = &res_info[BNA_RX_RES_MEM_T_CSWQPT].res_u.mem_info.mdl[0];
2368         cpage_mem = &res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info.mdl[0];
2369         hqpt_mem = &res_info[BNA_RX_RES_MEM_T_HQPT].res_u.mem_info.mdl[0];
2370         dqpt_mem = &res_info[BNA_RX_RES_MEM_T_DQPT].res_u.mem_info.mdl[0];
2371         hsqpt_mem = &res_info[BNA_RX_RES_MEM_T_HSWQPT].res_u.mem_info.mdl[0];
2372         dsqpt_mem = &res_info[BNA_RX_RES_MEM_T_DSWQPT].res_u.mem_info.mdl[0];
2373         hpage_mem = &res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info.mdl[0];
2374         dpage_mem = &res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info.mdl[0];
2375
2376         page_count = res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info.len /
2377                         PAGE_SIZE;
2378
2379         dpage_count = res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info.len /
2380                         PAGE_SIZE;
2381
2382         hpage_count = res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info.len /
2383                         PAGE_SIZE;
2384
2385         rx = bna_rx_get(rx_mod, rx_cfg->rx_type);
2386         rx->bna = bna;
2387         rx->rx_flags = 0;
2388         INIT_LIST_HEAD(&rx->rxp_q);
2389         rx->stop_cbfn = NULL;
2390         rx->stop_cbarg = NULL;
2391         rx->priv = priv;
2392
2393         rx->rcb_setup_cbfn = rx_cbfn->rcb_setup_cbfn;
2394         rx->rcb_destroy_cbfn = rx_cbfn->rcb_destroy_cbfn;
2395         rx->ccb_setup_cbfn = rx_cbfn->ccb_setup_cbfn;
2396         rx->ccb_destroy_cbfn = rx_cbfn->ccb_destroy_cbfn;
2397         rx->rx_stall_cbfn = rx_cbfn->rx_stall_cbfn;
2398         /* Following callbacks are mandatory */
2399         rx->rx_cleanup_cbfn = rx_cbfn->rx_cleanup_cbfn;
2400         rx->rx_post_cbfn = rx_cbfn->rx_post_cbfn;
2401
2402         if (rx->bna->rx_mod.flags & BNA_RX_MOD_F_ENET_STARTED) {
2403                 switch (rx->type) {
2404                 case BNA_RX_T_REGULAR:
2405                         if (!(rx->bna->rx_mod.flags &
2406                                 BNA_RX_MOD_F_ENET_LOOPBACK))
2407                                 rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2408                         break;
2409                 case BNA_RX_T_LOOPBACK:
2410                         if (rx->bna->rx_mod.flags & BNA_RX_MOD_F_ENET_LOOPBACK)
2411                                 rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2412                         break;
2413                 }
2414         }
2415
2416         rx->num_paths = rx_cfg->num_paths;
2417         for (i = 0, rcb_idx = 0; i < rx->num_paths; i++) {
2418                 rxp = bna_rxp_get(rx_mod);
2419                 list_add_tail(&rxp->qe, &rx->rxp_q);
2420                 rxp->type = rx_cfg->rxp_type;
2421                 rxp->rx = rx;
2422                 rxp->cq.rx = rx;
2423
2424                 q0 = bna_rxq_get(rx_mod);
2425                 if (BNA_RXP_SINGLE == rx_cfg->rxp_type)
2426                         q1 = NULL;
2427                 else
2428                         q1 = bna_rxq_get(rx_mod);
2429
2430                 if (1 == intr_info->num)
2431                         rxp->vector = intr_info->idl[0].vector;
2432                 else
2433                         rxp->vector = intr_info->idl[i].vector;
2434
2435                 /* Setup IB */
2436
2437                 rxp->cq.ib.ib_seg_host_addr.lsb =
2438                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.lsb;
2439                 rxp->cq.ib.ib_seg_host_addr.msb =
2440                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.msb;
2441                 rxp->cq.ib.ib_seg_host_addr_kva =
2442                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].kva;
2443                 rxp->cq.ib.intr_type = intr_info->intr_type;
2444                 if (intr_info->intr_type == BNA_INTR_T_MSIX)
2445                         rxp->cq.ib.intr_vector = rxp->vector;
2446                 else
2447                         rxp->cq.ib.intr_vector = (1 << rxp->vector);
2448                 rxp->cq.ib.coalescing_timeo = rx_cfg->coalescing_timeo;
2449                 rxp->cq.ib.interpkt_count = BFI_RX_INTERPKT_COUNT;
2450                 rxp->cq.ib.interpkt_timeo = BFI_RX_INTERPKT_TIMEO;
2451
2452                 bna_rxp_add_rxqs(rxp, q0, q1);
2453
2454                 /* Setup large Q */
2455
2456                 q0->rx = rx;
2457                 q0->rxp = rxp;
2458
2459                 q0->rcb = (struct bna_rcb *) rcb_mem[rcb_idx].kva;
2460                 q0->rcb->unmap_q = (void *)unmapq_mem[rcb_idx].kva;
2461                 rcb_idx++;
2462                 q0->rcb->q_depth = rx_cfg->q_depth;
2463                 q0->rcb->rxq = q0;
2464                 q0->rcb->bnad = bna->bnad;
2465                 q0->rcb->id = 0;
2466                 q0->rx_packets = q0->rx_bytes = 0;
2467                 q0->rx_packets_with_error = q0->rxbuf_alloc_failed = 0;
2468
2469                 bna_rxq_qpt_setup(q0, rxp, dpage_count, PAGE_SIZE,
2470                         &dqpt_mem[i], &dsqpt_mem[i], &dpage_mem[i]);
2471
2472                 if (rx->rcb_setup_cbfn)
2473                         rx->rcb_setup_cbfn(bnad, q0->rcb);
2474
2475                 /* Setup small Q */
2476
2477                 if (q1) {
2478                         q1->rx = rx;
2479                         q1->rxp = rxp;
2480
2481                         q1->rcb = (struct bna_rcb *) rcb_mem[rcb_idx].kva;
2482                         q1->rcb->unmap_q = (void *)unmapq_mem[rcb_idx].kva;
2483                         rcb_idx++;
2484                         q1->rcb->q_depth = rx_cfg->q_depth;
2485                         q1->rcb->rxq = q1;
2486                         q1->rcb->bnad = bna->bnad;
2487                         q1->rcb->id = 1;
2488                         q1->buffer_size = (rx_cfg->rxp_type == BNA_RXP_HDS) ?
2489                                         rx_cfg->hds_config.forced_offset
2490                                         : rx_cfg->small_buff_size;
2491                         q1->rx_packets = q1->rx_bytes = 0;
2492                         q1->rx_packets_with_error = q1->rxbuf_alloc_failed = 0;
2493
2494                         bna_rxq_qpt_setup(q1, rxp, hpage_count, PAGE_SIZE,
2495                                 &hqpt_mem[i], &hsqpt_mem[i],
2496                                 &hpage_mem[i]);
2497
2498                         if (rx->rcb_setup_cbfn)
2499                                 rx->rcb_setup_cbfn(bnad, q1->rcb);
2500                 }
2501
2502                 /* Setup CQ */
2503
2504                 rxp->cq.ccb = (struct bna_ccb *) ccb_mem[i].kva;
2505                 rxp->cq.ccb->q_depth =  rx_cfg->q_depth +
2506                                         ((rx_cfg->rxp_type == BNA_RXP_SINGLE) ?
2507                                         0 : rx_cfg->q_depth);
2508                 rxp->cq.ccb->cq = &rxp->cq;
2509                 rxp->cq.ccb->rcb[0] = q0->rcb;
2510                 q0->rcb->ccb = rxp->cq.ccb;
2511                 if (q1) {
2512                         rxp->cq.ccb->rcb[1] = q1->rcb;
2513                         q1->rcb->ccb = rxp->cq.ccb;
2514                 }
2515                 rxp->cq.ccb->hw_producer_index =
2516                         (u32 *)rxp->cq.ib.ib_seg_host_addr_kva;
2517                 rxp->cq.ccb->i_dbell = &rxp->cq.ib.door_bell;
2518                 rxp->cq.ccb->intr_type = rxp->cq.ib.intr_type;
2519                 rxp->cq.ccb->intr_vector = rxp->cq.ib.intr_vector;
2520                 rxp->cq.ccb->rx_coalescing_timeo =
2521                         rxp->cq.ib.coalescing_timeo;
2522                 rxp->cq.ccb->pkt_rate.small_pkt_cnt = 0;
2523                 rxp->cq.ccb->pkt_rate.large_pkt_cnt = 0;
2524                 rxp->cq.ccb->bnad = bna->bnad;
2525                 rxp->cq.ccb->id = i;
2526
2527                 bna_rxp_cqpt_setup(rxp, page_count, PAGE_SIZE,
2528                         &cqpt_mem[i], &cswqpt_mem[i], &cpage_mem[i]);
2529
2530                 if (rx->ccb_setup_cbfn)
2531                         rx->ccb_setup_cbfn(bnad, rxp->cq.ccb);
2532         }
2533
2534         rx->hds_cfg = rx_cfg->hds_config;
2535
2536         bna_rxf_init(&rx->rxf, rx, rx_cfg, res_info);
2537
2538         bfa_fsm_set_state(rx, bna_rx_sm_stopped);
2539
2540         rx_mod->rid_mask |= (1 << rx->rid);
2541
2542         return rx;
2543 }
2544
2545 void
2546 bna_rx_destroy(struct bna_rx *rx)
2547 {
2548         struct bna_rx_mod *rx_mod = &rx->bna->rx_mod;
2549         struct bna_rxq *q0 = NULL;
2550         struct bna_rxq *q1 = NULL;
2551         struct bna_rxp *rxp;
2552         struct list_head *qe;
2553
2554         bna_rxf_uninit(&rx->rxf);
2555
2556         while (!list_empty(&rx->rxp_q)) {
2557                 bfa_q_deq(&rx->rxp_q, &rxp);
2558                 GET_RXQS(rxp, q0, q1);
2559                 if (rx->rcb_destroy_cbfn)
2560                         rx->rcb_destroy_cbfn(rx->bna->bnad, q0->rcb);
2561                 q0->rcb = NULL;
2562                 q0->rxp = NULL;
2563                 q0->rx = NULL;
2564                 bna_rxq_put(rx_mod, q0);
2565
2566                 if (q1) {
2567                         if (rx->rcb_destroy_cbfn)
2568                                 rx->rcb_destroy_cbfn(rx->bna->bnad, q1->rcb);
2569                         q1->rcb = NULL;
2570                         q1->rxp = NULL;
2571                         q1->rx = NULL;
2572                         bna_rxq_put(rx_mod, q1);
2573                 }
2574                 rxp->rxq.slr.large = NULL;
2575                 rxp->rxq.slr.small = NULL;
2576
2577                 if (rx->ccb_destroy_cbfn)
2578                         rx->ccb_destroy_cbfn(rx->bna->bnad, rxp->cq.ccb);
2579                 rxp->cq.ccb = NULL;
2580                 rxp->rx = NULL;
2581                 bna_rxp_put(rx_mod, rxp);
2582         }
2583
2584         list_for_each(qe, &rx_mod->rx_active_q) {
2585                 if (qe == &rx->qe) {
2586                         list_del(&rx->qe);
2587                         bfa_q_qe_init(&rx->qe);
2588                         break;
2589                 }
2590         }
2591
2592         rx_mod->rid_mask &= ~(1 << rx->rid);
2593
2594         rx->bna = NULL;
2595         rx->priv = NULL;
2596         bna_rx_put(rx_mod, rx);
2597 }
2598
2599 void
2600 bna_rx_enable(struct bna_rx *rx)
2601 {
2602         if (rx->fsm != (bfa_sm_t)bna_rx_sm_stopped)
2603                 return;
2604
2605         rx->rx_flags |= BNA_RX_F_ENABLED;
2606         if (rx->rx_flags & BNA_RX_F_ENET_STARTED)
2607                 bfa_fsm_send_event(rx, RX_E_START);
2608 }
2609
2610 void
2611 bna_rx_disable(struct bna_rx *rx, enum bna_cleanup_type type,
2612                 void (*cbfn)(void *, struct bna_rx *))
2613 {
2614         if (type == BNA_SOFT_CLEANUP) {
2615                 /* h/w should not be accessed. Treat we're stopped */
2616                 (*cbfn)(rx->bna->bnad, rx);
2617         } else {
2618                 rx->stop_cbfn = cbfn;
2619                 rx->stop_cbarg = rx->bna->bnad;
2620
2621                 rx->rx_flags &= ~BNA_RX_F_ENABLED;
2622
2623                 bfa_fsm_send_event(rx, RX_E_STOP);
2624         }
2625 }
2626
2627 void
2628 bna_rx_cleanup_complete(struct bna_rx *rx)
2629 {
2630         bfa_fsm_send_event(rx, RX_E_CLEANUP_DONE);
2631 }
2632
2633 enum bna_cb_status
2634 bna_rx_mode_set(struct bna_rx *rx, enum bna_rxmode new_mode,
2635                 enum bna_rxmode bitmask,
2636                 void (*cbfn)(struct bnad *, struct bna_rx *))
2637 {
2638         struct bna_rxf *rxf = &rx->rxf;
2639         int need_hw_config = 0;
2640
2641         /* Error checks */
2642
2643         if (is_promisc_enable(new_mode, bitmask)) {
2644                 /* If promisc mode is already enabled elsewhere in the system */
2645                 if ((rx->bna->promisc_rid != BFI_INVALID_RID) &&
2646                         (rx->bna->promisc_rid != rxf->rx->rid))
2647                         goto err_return;
2648
2649                 /* If default mode is already enabled in the system */
2650                 if (rx->bna->default_mode_rid != BFI_INVALID_RID)
2651                         goto err_return;
2652
2653                 /* Trying to enable promiscuous and default mode together */
2654                 if (is_default_enable(new_mode, bitmask))
2655                         goto err_return;
2656         }
2657
2658         if (is_default_enable(new_mode, bitmask)) {
2659                 /* If default mode is already enabled elsewhere in the system */
2660                 if ((rx->bna->default_mode_rid != BFI_INVALID_RID) &&
2661                         (rx->bna->default_mode_rid != rxf->rx->rid)) {
2662                                 goto err_return;
2663                 }
2664
2665                 /* If promiscuous mode is already enabled in the system */
2666                 if (rx->bna->promisc_rid != BFI_INVALID_RID)
2667                         goto err_return;
2668         }
2669
2670         /* Process the commands */
2671
2672         if (is_promisc_enable(new_mode, bitmask)) {
2673                 if (bna_rxf_promisc_enable(rxf))
2674                         need_hw_config = 1;
2675         } else if (is_promisc_disable(new_mode, bitmask)) {
2676                 if (bna_rxf_promisc_disable(rxf))
2677                         need_hw_config = 1;
2678         }
2679
2680         if (is_allmulti_enable(new_mode, bitmask)) {
2681                 if (bna_rxf_allmulti_enable(rxf))
2682                         need_hw_config = 1;
2683         } else if (is_allmulti_disable(new_mode, bitmask)) {
2684                 if (bna_rxf_allmulti_disable(rxf))
2685                         need_hw_config = 1;
2686         }
2687
2688         /* Trigger h/w if needed */
2689
2690         if (need_hw_config) {
2691                 rxf->cam_fltr_cbfn = cbfn;
2692                 rxf->cam_fltr_cbarg = rx->bna->bnad;
2693                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2694         } else if (cbfn)
2695                 (*cbfn)(rx->bna->bnad, rx);
2696
2697         return BNA_CB_SUCCESS;
2698
2699 err_return:
2700         return BNA_CB_FAIL;
2701 }
2702
2703 void
2704 bna_rx_vlanfilter_enable(struct bna_rx *rx)
2705 {
2706         struct bna_rxf *rxf = &rx->rxf;
2707
2708         if (rxf->vlan_filter_status == BNA_STATUS_T_DISABLED) {
2709                 rxf->vlan_filter_status = BNA_STATUS_T_ENABLED;
2710                 rxf->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;
2711                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2712         }
2713 }
2714
2715 void
2716 bna_rx_coalescing_timeo_set(struct bna_rx *rx, int coalescing_timeo)
2717 {
2718         struct bna_rxp *rxp;
2719         struct list_head *qe;
2720
2721         list_for_each(qe, &rx->rxp_q) {
2722                 rxp = (struct bna_rxp *)qe;
2723                 rxp->cq.ccb->rx_coalescing_timeo = coalescing_timeo;
2724                 bna_ib_coalescing_timeo_set(&rxp->cq.ib, coalescing_timeo);
2725         }
2726 }
2727
2728 void
2729 bna_rx_dim_reconfig(struct bna *bna, const u32 vector[][BNA_BIAS_T_MAX])
2730 {
2731         int i, j;
2732
2733         for (i = 0; i < BNA_LOAD_T_MAX; i++)
2734                 for (j = 0; j < BNA_BIAS_T_MAX; j++)
2735                         bna->rx_mod.dim_vector[i][j] = vector[i][j];
2736 }
2737
2738 void
2739 bna_rx_dim_update(struct bna_ccb *ccb)
2740 {
2741         struct bna *bna = ccb->cq->rx->bna;
2742         u32 load, bias;
2743         u32 pkt_rt, small_rt, large_rt;
2744         u8 coalescing_timeo;
2745
2746         if ((ccb->pkt_rate.small_pkt_cnt == 0) &&
2747                 (ccb->pkt_rate.large_pkt_cnt == 0))
2748                 return;
2749
2750         /* Arrive at preconfigured coalescing timeo value based on pkt rate */
2751
2752         small_rt = ccb->pkt_rate.small_pkt_cnt;
2753         large_rt = ccb->pkt_rate.large_pkt_cnt;
2754
2755         pkt_rt = small_rt + large_rt;
2756
2757         if (pkt_rt < BNA_PKT_RATE_10K)
2758                 load = BNA_LOAD_T_LOW_4;
2759         else if (pkt_rt < BNA_PKT_RATE_20K)
2760                 load = BNA_LOAD_T_LOW_3;
2761         else if (pkt_rt < BNA_PKT_RATE_30K)
2762                 load = BNA_LOAD_T_LOW_2;
2763         else if (pkt_rt < BNA_PKT_RATE_40K)
2764                 load = BNA_LOAD_T_LOW_1;
2765         else if (pkt_rt < BNA_PKT_RATE_50K)
2766                 load = BNA_LOAD_T_HIGH_1;
2767         else if (pkt_rt < BNA_PKT_RATE_60K)
2768                 load = BNA_LOAD_T_HIGH_2;
2769         else if (pkt_rt < BNA_PKT_RATE_80K)
2770                 load = BNA_LOAD_T_HIGH_3;
2771         else
2772                 load = BNA_LOAD_T_HIGH_4;
2773
2774         if (small_rt > (large_rt << 1))
2775                 bias = 0;
2776         else
2777                 bias = 1;
2778
2779         ccb->pkt_rate.small_pkt_cnt = 0;
2780         ccb->pkt_rate.large_pkt_cnt = 0;
2781
2782         coalescing_timeo = bna->rx_mod.dim_vector[load][bias];
2783         ccb->rx_coalescing_timeo = coalescing_timeo;
2784
2785         /* Set it to IB */
2786         bna_ib_coalescing_timeo_set(&ccb->cq->ib, coalescing_timeo);
2787 }
2788
2789 const u32 bna_napi_dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX] = {
2790         {12, 12},
2791         {6, 10},
2792         {5, 10},
2793         {4, 8},
2794         {3, 6},
2795         {3, 6},
2796         {2, 4},
2797         {1, 2},
2798 };
2799
2800 /* TX */
2801
2802 #define call_tx_stop_cbfn(tx)                                           \
2803 do {                                                                    \
2804         if ((tx)->stop_cbfn) {                                          \
2805                 void (*cbfn)(void *, struct bna_tx *);          \
2806                 void *cbarg;                                            \
2807                 cbfn = (tx)->stop_cbfn;                                 \
2808                 cbarg = (tx)->stop_cbarg;                               \
2809                 (tx)->stop_cbfn = NULL;                                 \
2810                 (tx)->stop_cbarg = NULL;                                \
2811                 cbfn(cbarg, (tx));                                      \
2812         }                                                               \
2813 } while (0)
2814
2815 #define call_tx_prio_change_cbfn(tx)                                    \
2816 do {                                                                    \
2817         if ((tx)->prio_change_cbfn) {                                   \
2818                 void (*cbfn)(struct bnad *, struct bna_tx *);   \
2819                 cbfn = (tx)->prio_change_cbfn;                          \
2820                 (tx)->prio_change_cbfn = NULL;                          \
2821                 cbfn((tx)->bna->bnad, (tx));                            \
2822         }                                                               \
2823 } while (0)
2824
2825 static void bna_tx_mod_cb_tx_stopped(void *tx_mod, struct bna_tx *tx);
2826 static void bna_bfi_tx_enet_start(struct bna_tx *tx);
2827 static void bna_tx_enet_stop(struct bna_tx *tx);
2828
2829 enum bna_tx_event {
2830         TX_E_START                      = 1,
2831         TX_E_STOP                       = 2,
2832         TX_E_FAIL                       = 3,
2833         TX_E_STARTED                    = 4,
2834         TX_E_STOPPED                    = 5,
2835         TX_E_PRIO_CHANGE                = 6,
2836         TX_E_CLEANUP_DONE               = 7,
2837         TX_E_BW_UPDATE                  = 8,
2838 };
2839
2840 bfa_fsm_state_decl(bna_tx, stopped, struct bna_tx, enum bna_tx_event);
2841 bfa_fsm_state_decl(bna_tx, start_wait, struct bna_tx, enum bna_tx_event);
2842 bfa_fsm_state_decl(bna_tx, started, struct bna_tx, enum bna_tx_event);
2843 bfa_fsm_state_decl(bna_tx, stop_wait, struct bna_tx, enum bna_tx_event);
2844 bfa_fsm_state_decl(bna_tx, cleanup_wait, struct bna_tx,
2845                         enum bna_tx_event);
2846 bfa_fsm_state_decl(bna_tx, prio_stop_wait, struct bna_tx,
2847                         enum bna_tx_event);
2848 bfa_fsm_state_decl(bna_tx, prio_cleanup_wait, struct bna_tx,
2849                         enum bna_tx_event);
2850 bfa_fsm_state_decl(bna_tx, failed, struct bna_tx, enum bna_tx_event);
2851 bfa_fsm_state_decl(bna_tx, quiesce_wait, struct bna_tx,
2852                         enum bna_tx_event);
2853
2854 static void
2855 bna_tx_sm_stopped_entry(struct bna_tx *tx)
2856 {
2857         call_tx_stop_cbfn(tx);
2858 }
2859
2860 static void
2861 bna_tx_sm_stopped(struct bna_tx *tx, enum bna_tx_event event)
2862 {
2863         switch (event) {
2864         case TX_E_START:
2865                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
2866                 break;
2867
2868         case TX_E_STOP:
2869                 call_tx_stop_cbfn(tx);
2870                 break;
2871
2872         case TX_E_FAIL:
2873                 /* No-op */
2874                 break;
2875
2876         case TX_E_PRIO_CHANGE:
2877                 call_tx_prio_change_cbfn(tx);
2878                 break;
2879
2880         case TX_E_BW_UPDATE:
2881                 /* No-op */
2882                 break;
2883
2884         default:
2885                 bfa_sm_fault(event);
2886         }
2887 }
2888
2889 static void
2890 bna_tx_sm_start_wait_entry(struct bna_tx *tx)
2891 {
2892         bna_bfi_tx_enet_start(tx);
2893 }
2894
2895 static void
2896 bna_tx_sm_start_wait(struct bna_tx *tx, enum bna_tx_event event)
2897 {
2898         switch (event) {
2899         case TX_E_STOP:
2900                 tx->flags &= ~(BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED);
2901                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
2902                 break;
2903
2904         case TX_E_FAIL:
2905                 tx->flags &= ~(BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED);
2906                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
2907                 break;
2908
2909         case TX_E_STARTED:
2910                 if (tx->flags & (BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED)) {
2911                         tx->flags &= ~(BNA_TX_F_PRIO_CHANGED |
2912                                 BNA_TX_F_BW_UPDATED);
2913                         bfa_fsm_set_state(tx, bna_tx_sm_prio_stop_wait);
2914                 } else
2915                         bfa_fsm_set_state(tx, bna_tx_sm_started);
2916                 break;
2917
2918         case TX_E_PRIO_CHANGE:
2919                 tx->flags |=  BNA_TX_F_PRIO_CHANGED;
2920                 break;
2921
2922         case TX_E_BW_UPDATE:
2923                 tx->flags |= BNA_TX_F_BW_UPDATED;
2924                 break;
2925
2926         default:
2927                 bfa_sm_fault(event);
2928         }
2929 }
2930
2931 static void
2932 bna_tx_sm_started_entry(struct bna_tx *tx)
2933 {
2934         struct bna_txq *txq;
2935         struct list_head                 *qe;
2936         int is_regular = (tx->type == BNA_TX_T_REGULAR);
2937
2938         list_for_each(qe, &tx->txq_q) {
2939                 txq = (struct bna_txq *)qe;
2940                 txq->tcb->priority = txq->priority;
2941                 /* Start IB */
2942                 bna_ib_start(tx->bna, &txq->ib, is_regular);
2943         }
2944         tx->tx_resume_cbfn(tx->bna->bnad, tx);
2945 }
2946
2947 static void
2948 bna_tx_sm_started(struct bna_tx *tx, enum bna_tx_event event)
2949 {
2950         switch (event) {
2951         case TX_E_STOP:
2952                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
2953                 tx->tx_stall_cbfn(tx->bna->bnad, tx);
2954                 bna_tx_enet_stop(tx);
2955                 break;
2956
2957         case TX_E_FAIL:
2958                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
2959                 tx->tx_stall_cbfn(tx->bna->bnad, tx);
2960                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
2961                 break;
2962
2963         case TX_E_PRIO_CHANGE:
2964         case TX_E_BW_UPDATE:
2965                 bfa_fsm_set_state(tx, bna_tx_sm_prio_stop_wait);
2966                 break;
2967
2968         default:
2969                 bfa_sm_fault(event);
2970         }
2971 }
2972
2973 static void
2974 bna_tx_sm_stop_wait_entry(struct bna_tx *tx)
2975 {
2976 }
2977
2978 static void
2979 bna_tx_sm_stop_wait(struct bna_tx *tx, enum bna_tx_event event)
2980 {
2981         switch (event) {
2982         case TX_E_FAIL:
2983         case TX_E_STOPPED:
2984                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
2985                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
2986                 break;
2987
2988         case TX_E_STARTED:
2989                 /**
2990                  * We are here due to start_wait -> stop_wait transition on
2991                  * TX_E_STOP event
2992                  */
2993                 bna_tx_enet_stop(tx);
2994                 break;
2995
2996         case TX_E_PRIO_CHANGE:
2997         case TX_E_BW_UPDATE:
2998                 /* No-op */
2999                 break;
3000
3001         default:
3002                 bfa_sm_fault(event);
3003         }
3004 }
3005
3006 static void
3007 bna_tx_sm_cleanup_wait_entry(struct bna_tx *tx)
3008 {
3009 }
3010
3011 static void
3012 bna_tx_sm_cleanup_wait(struct bna_tx *tx, enum bna_tx_event event)
3013 {
3014         switch (event) {
3015         case TX_E_FAIL:
3016         case TX_E_PRIO_CHANGE:
3017         case TX_E_BW_UPDATE:
3018                 /* No-op */
3019                 break;
3020
3021         case TX_E_CLEANUP_DONE:
3022                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3023                 break;
3024
3025         default:
3026                 bfa_sm_fault(event);
3027         }
3028 }
3029
3030 static void
3031 bna_tx_sm_prio_stop_wait_entry(struct bna_tx *tx)
3032 {
3033         tx->tx_stall_cbfn(tx->bna->bnad, tx);
3034         bna_tx_enet_stop(tx);
3035 }
3036
3037 static void
3038 bna_tx_sm_prio_stop_wait(struct bna_tx *tx, enum bna_tx_event event)
3039 {
3040         switch (event) {
3041         case TX_E_STOP:
3042                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
3043                 break;
3044
3045         case TX_E_FAIL:
3046                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3047                 call_tx_prio_change_cbfn(tx);
3048                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3049                 break;
3050
3051         case TX_E_STOPPED:
3052                 bfa_fsm_set_state(tx, bna_tx_sm_prio_cleanup_wait);
3053                 break;
3054
3055         case TX_E_PRIO_CHANGE:
3056         case TX_E_BW_UPDATE:
3057                 /* No-op */
3058                 break;
3059
3060         default:
3061                 bfa_sm_fault(event);
3062         }
3063 }
3064
3065 static void
3066 bna_tx_sm_prio_cleanup_wait_entry(struct bna_tx *tx)
3067 {
3068         call_tx_prio_change_cbfn(tx);
3069         tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3070 }
3071
3072 static void
3073 bna_tx_sm_prio_cleanup_wait(struct bna_tx *tx, enum bna_tx_event event)
3074 {
3075         switch (event) {
3076         case TX_E_STOP:
3077                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3078                 break;
3079
3080         case TX_E_FAIL:
3081                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3082                 break;
3083
3084         case TX_E_PRIO_CHANGE:
3085         case TX_E_BW_UPDATE:
3086                 /* No-op */
3087                 break;
3088
3089         case TX_E_CLEANUP_DONE:
3090                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
3091                 break;
3092
3093         default:
3094                 bfa_sm_fault(event);
3095         }
3096 }
3097
3098 static void
3099 bna_tx_sm_failed_entry(struct bna_tx *tx)
3100 {
3101 }
3102
3103 static void
3104 bna_tx_sm_failed(struct bna_tx *tx, enum bna_tx_event event)
3105 {
3106         switch (event) {
3107         case TX_E_START:
3108                 bfa_fsm_set_state(tx, bna_tx_sm_quiesce_wait);
3109                 break;
3110
3111         case TX_E_STOP:
3112                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3113                 break;
3114
3115         case TX_E_FAIL:
3116                 /* No-op */
3117                 break;
3118
3119         case TX_E_CLEANUP_DONE:
3120                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3121                 break;
3122
3123         default:
3124                 bfa_sm_fault(event);
3125         }
3126 }
3127
3128 static void
3129 bna_tx_sm_quiesce_wait_entry(struct bna_tx *tx)
3130 {
3131 }
3132
3133 static void
3134 bna_tx_sm_quiesce_wait(struct bna_tx *tx, enum bna_tx_event event)
3135 {
3136         switch (event) {
3137         case TX_E_STOP:
3138                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3139                 break;
3140
3141         case TX_E_FAIL:
3142                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3143                 break;
3144
3145         case TX_E_CLEANUP_DONE:
3146                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
3147                 break;
3148
3149         case TX_E_BW_UPDATE:
3150                 /* No-op */
3151                 break;
3152
3153         default:
3154                 bfa_sm_fault(event);
3155         }
3156 }
3157
3158 static void
3159 bna_bfi_tx_enet_start(struct bna_tx *tx)
3160 {
3161         struct bfi_enet_tx_cfg_req *cfg_req = &tx->bfi_enet_cmd.cfg_req;
3162         struct bna_txq *txq = NULL;
3163         struct list_head *qe;
3164         int i;
3165
3166         bfi_msgq_mhdr_set(cfg_req->mh, BFI_MC_ENET,
3167                 BFI_ENET_H2I_TX_CFG_SET_REQ, 0, tx->rid);
3168         cfg_req->mh.num_entries = htons(
3169                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_tx_cfg_req)));
3170
3171         cfg_req->num_queues = tx->num_txq;
3172         for (i = 0, qe = bfa_q_first(&tx->txq_q);
3173                 i < tx->num_txq;
3174                 i++, qe = bfa_q_next(qe)) {
3175                 txq = (struct bna_txq *)qe;
3176
3177                 bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].q.q, &txq->qpt);
3178                 cfg_req->q_cfg[i].q.priority = txq->priority;
3179
3180                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_lo =
3181                         txq->ib.ib_seg_host_addr.lsb;
3182                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_hi =
3183                         txq->ib.ib_seg_host_addr.msb;
3184                 cfg_req->q_cfg[i].ib.intr.msix_index =
3185                         htons((u16)txq->ib.intr_vector);
3186         }
3187
3188         cfg_req->ib_cfg.int_pkt_dma = BNA_STATUS_T_ENABLED;
3189         cfg_req->ib_cfg.int_enabled = BNA_STATUS_T_ENABLED;
3190         cfg_req->ib_cfg.int_pkt_enabled = BNA_STATUS_T_DISABLED;
3191         cfg_req->ib_cfg.continuous_coalescing = BNA_STATUS_T_ENABLED;
3192         cfg_req->ib_cfg.msix = (txq->ib.intr_type == BNA_INTR_T_MSIX)
3193                                 ? BNA_STATUS_T_ENABLED : BNA_STATUS_T_DISABLED;
3194         cfg_req->ib_cfg.coalescing_timeout =
3195                         htonl((u32)txq->ib.coalescing_timeo);
3196         cfg_req->ib_cfg.inter_pkt_timeout =
3197                         htonl((u32)txq->ib.interpkt_timeo);
3198         cfg_req->ib_cfg.inter_pkt_count = (u8)txq->ib.interpkt_count;
3199
3200         cfg_req->tx_cfg.vlan_mode = BFI_ENET_TX_VLAN_WI;
3201         cfg_req->tx_cfg.vlan_id = htons((u16)tx->txf_vlan_id);
3202         cfg_req->tx_cfg.admit_tagged_frame = BNA_STATUS_T_DISABLED;
3203         cfg_req->tx_cfg.apply_vlan_filter = BNA_STATUS_T_DISABLED;
3204
3205         bfa_msgq_cmd_set(&tx->msgq_cmd, NULL, NULL,
3206                 sizeof(struct bfi_enet_tx_cfg_req), &cfg_req->mh);
3207         bfa_msgq_cmd_post(&tx->bna->msgq, &tx->msgq_cmd);
3208 }
3209
3210 static void
3211 bna_bfi_tx_enet_stop(struct bna_tx *tx)
3212 {
3213         struct bfi_enet_req *req = &tx->bfi_enet_cmd.req;
3214
3215         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
3216                 BFI_ENET_H2I_TX_CFG_CLR_REQ, 0, tx->rid);
3217         req->mh.num_entries = htons(
3218                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_req)));
3219         bfa_msgq_cmd_set(&tx->msgq_cmd, NULL, NULL, sizeof(struct bfi_enet_req),
3220                 &req->mh);
3221         bfa_msgq_cmd_post(&tx->bna->msgq, &tx->msgq_cmd);
3222 }
3223
3224 static void
3225 bna_tx_enet_stop(struct bna_tx *tx)
3226 {
3227         struct bna_txq *txq;
3228         struct list_head                 *qe;
3229
3230         /* Stop IB */
3231         list_for_each(qe, &tx->txq_q) {
3232                 txq = (struct bna_txq *)qe;
3233                 bna_ib_stop(tx->bna, &txq->ib);
3234         }
3235
3236         bna_bfi_tx_enet_stop(tx);
3237 }
3238
3239 static void
3240 bna_txq_qpt_setup(struct bna_txq *txq, int page_count, int page_size,
3241                 struct bna_mem_descr *qpt_mem,
3242                 struct bna_mem_descr *swqpt_mem,
3243                 struct bna_mem_descr *page_mem)
3244 {
3245         u8 *kva;
3246         u64 dma;
3247         struct bna_dma_addr bna_dma;
3248         int i;
3249
3250         txq->qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
3251         txq->qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
3252         txq->qpt.kv_qpt_ptr = qpt_mem->kva;
3253         txq->qpt.page_count = page_count;
3254         txq->qpt.page_size = page_size;
3255
3256         txq->tcb->sw_qpt = (void **) swqpt_mem->kva;
3257         txq->tcb->sw_q = page_mem->kva;
3258
3259         kva = page_mem->kva;
3260         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
3261
3262         for (i = 0; i < page_count; i++) {
3263                 txq->tcb->sw_qpt[i] = kva;
3264                 kva += PAGE_SIZE;
3265
3266                 BNA_SET_DMA_ADDR(dma, &bna_dma);
3267                 ((struct bna_dma_addr *)txq->qpt.kv_qpt_ptr)[i].lsb =
3268                         bna_dma.lsb;
3269                 ((struct bna_dma_addr *)txq->qpt.kv_qpt_ptr)[i].msb =
3270                         bna_dma.msb;
3271                 dma += PAGE_SIZE;
3272         }
3273 }
3274
3275 static struct bna_tx *
3276 bna_tx_get(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3277 {
3278         struct list_head        *qe = NULL;
3279         struct bna_tx *tx = NULL;
3280
3281         if (list_empty(&tx_mod->tx_free_q))
3282                 return NULL;
3283         if (type == BNA_TX_T_REGULAR) {
3284                 bfa_q_deq(&tx_mod->tx_free_q, &qe);
3285         } else {
3286                 bfa_q_deq_tail(&tx_mod->tx_free_q, &qe);
3287         }
3288         tx = (struct bna_tx *)qe;
3289         bfa_q_qe_init(&tx->qe);
3290         tx->type = type;
3291
3292         return tx;
3293 }
3294
3295 static void
3296 bna_tx_free(struct bna_tx *tx)
3297 {
3298         struct bna_tx_mod *tx_mod = &tx->bna->tx_mod;
3299         struct bna_txq *txq;
3300         struct list_head *prev_qe;
3301         struct list_head *qe;
3302
3303         while (!list_empty(&tx->txq_q)) {
3304                 bfa_q_deq(&tx->txq_q, &txq);
3305                 bfa_q_qe_init(&txq->qe);
3306                 txq->tcb = NULL;
3307                 txq->tx = NULL;
3308                 list_add_tail(&txq->qe, &tx_mod->txq_free_q);
3309         }
3310
3311         list_for_each(qe, &tx_mod->tx_active_q) {
3312                 if (qe == &tx->qe) {
3313                         list_del(&tx->qe);
3314                         bfa_q_qe_init(&tx->qe);
3315                         break;
3316                 }
3317         }
3318
3319         tx->bna = NULL;
3320         tx->priv = NULL;
3321
3322         prev_qe = NULL;
3323         list_for_each(qe, &tx_mod->tx_free_q) {
3324                 if (((struct bna_tx *)qe)->rid < tx->rid)
3325                         prev_qe = qe;
3326                 else {
3327                         break;
3328                 }
3329         }
3330
3331         if (prev_qe == NULL) {
3332                 /* This is the first entry */
3333                 bfa_q_enq_head(&tx_mod->tx_free_q, &tx->qe);
3334         } else if (bfa_q_next(prev_qe) == &tx_mod->tx_free_q) {
3335                 /* This is the last entry */
3336                 list_add_tail(&tx->qe, &tx_mod->tx_free_q);
3337         } else {
3338                 /* Somewhere in the middle */
3339                 bfa_q_next(&tx->qe) = bfa_q_next(prev_qe);
3340                 bfa_q_prev(&tx->qe) = prev_qe;
3341                 bfa_q_next(prev_qe) = &tx->qe;
3342                 bfa_q_prev(bfa_q_next(&tx->qe)) = &tx->qe;
3343         }
3344 }
3345
3346 static void
3347 bna_tx_start(struct bna_tx *tx)
3348 {
3349         tx->flags |= BNA_TX_F_ENET_STARTED;
3350         if (tx->flags & BNA_TX_F_ENABLED)
3351                 bfa_fsm_send_event(tx, TX_E_START);
3352 }
3353
3354 static void
3355 bna_tx_stop(struct bna_tx *tx)
3356 {
3357         tx->stop_cbfn = bna_tx_mod_cb_tx_stopped;
3358         tx->stop_cbarg = &tx->bna->tx_mod;
3359
3360         tx->flags &= ~BNA_TX_F_ENET_STARTED;
3361         bfa_fsm_send_event(tx, TX_E_STOP);
3362 }
3363
3364 static void
3365 bna_tx_fail(struct bna_tx *tx)
3366 {
3367         tx->flags &= ~BNA_TX_F_ENET_STARTED;
3368         bfa_fsm_send_event(tx, TX_E_FAIL);
3369 }
3370
3371 void
3372 bna_bfi_tx_enet_start_rsp(struct bna_tx *tx, struct bfi_msgq_mhdr *msghdr)
3373 {
3374         struct bfi_enet_tx_cfg_rsp *cfg_rsp = &tx->bfi_enet_cmd.cfg_rsp;
3375         struct bna_txq *txq = NULL;
3376         struct list_head *qe;
3377         int i;
3378
3379         bfa_msgq_rsp_copy(&tx->bna->msgq, (u8 *)cfg_rsp,
3380                 sizeof(struct bfi_enet_tx_cfg_rsp));
3381
3382         tx->hw_id = cfg_rsp->hw_id;
3383
3384         for (i = 0, qe = bfa_q_first(&tx->txq_q);
3385                 i < tx->num_txq; i++, qe = bfa_q_next(qe)) {
3386                 txq = (struct bna_txq *)qe;
3387
3388                 /* Setup doorbells */
3389                 txq->tcb->i_dbell->doorbell_addr =
3390                         tx->bna->pcidev.pci_bar_kva
3391                         + ntohl(cfg_rsp->q_handles[i].i_dbell);
3392                 txq->tcb->q_dbell =
3393                         tx->bna->pcidev.pci_bar_kva
3394                         + ntohl(cfg_rsp->q_handles[i].q_dbell);
3395                 txq->hw_id = cfg_rsp->q_handles[i].hw_qid;
3396
3397                 /* Initialize producer/consumer indexes */
3398                 (*txq->tcb->hw_consumer_index) = 0;
3399                 txq->tcb->producer_index = txq->tcb->consumer_index = 0;
3400         }
3401
3402         bfa_fsm_send_event(tx, TX_E_STARTED);
3403 }
3404
3405 void
3406 bna_bfi_tx_enet_stop_rsp(struct bna_tx *tx, struct bfi_msgq_mhdr *msghdr)
3407 {
3408         bfa_fsm_send_event(tx, TX_E_STOPPED);
3409 }
3410
3411 void
3412 bna_bfi_bw_update_aen(struct bna_tx_mod *tx_mod)
3413 {
3414         struct bna_tx *tx;
3415         struct list_head                *qe;
3416
3417         list_for_each(qe, &tx_mod->tx_active_q) {
3418                 tx = (struct bna_tx *)qe;
3419                 bfa_fsm_send_event(tx, TX_E_BW_UPDATE);
3420         }
3421 }
3422
3423 void
3424 bna_tx_res_req(int num_txq, int txq_depth, struct bna_res_info *res_info)
3425 {
3426         u32 q_size;
3427         u32 page_count;
3428         struct bna_mem_info *mem_info;
3429
3430         res_info[BNA_TX_RES_MEM_T_TCB].res_type = BNA_RES_T_MEM;
3431         mem_info = &res_info[BNA_TX_RES_MEM_T_TCB].res_u.mem_info;
3432         mem_info->mem_type = BNA_MEM_T_KVA;
3433         mem_info->len = sizeof(struct bna_tcb);
3434         mem_info->num = num_txq;
3435
3436         q_size = txq_depth * BFI_TXQ_WI_SIZE;
3437         q_size = ALIGN(q_size, PAGE_SIZE);
3438         page_count = q_size >> PAGE_SHIFT;
3439
3440         res_info[BNA_TX_RES_MEM_T_QPT].res_type = BNA_RES_T_MEM;
3441         mem_info = &res_info[BNA_TX_RES_MEM_T_QPT].res_u.mem_info;
3442         mem_info->mem_type = BNA_MEM_T_DMA;
3443         mem_info->len = page_count * sizeof(struct bna_dma_addr);
3444         mem_info->num = num_txq;
3445
3446         res_info[BNA_TX_RES_MEM_T_SWQPT].res_type = BNA_RES_T_MEM;
3447         mem_info = &res_info[BNA_TX_RES_MEM_T_SWQPT].res_u.mem_info;
3448         mem_info->mem_type = BNA_MEM_T_KVA;
3449         mem_info->len = page_count * sizeof(void *);
3450         mem_info->num = num_txq;
3451
3452         res_info[BNA_TX_RES_MEM_T_PAGE].res_type = BNA_RES_T_MEM;
3453         mem_info = &res_info[BNA_TX_RES_MEM_T_PAGE].res_u.mem_info;
3454         mem_info->mem_type = BNA_MEM_T_DMA;
3455         mem_info->len = PAGE_SIZE * page_count;
3456         mem_info->num = num_txq;
3457
3458         res_info[BNA_TX_RES_MEM_T_IBIDX].res_type = BNA_RES_T_MEM;
3459         mem_info = &res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info;
3460         mem_info->mem_type = BNA_MEM_T_DMA;
3461         mem_info->len = BFI_IBIDX_SIZE;
3462         mem_info->num = num_txq;
3463
3464         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_type = BNA_RES_T_INTR;
3465         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info.intr_type =
3466                         BNA_INTR_T_MSIX;
3467         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info.num = num_txq;
3468 }
3469
3470 struct bna_tx *
3471 bna_tx_create(struct bna *bna, struct bnad *bnad,
3472                 struct bna_tx_config *tx_cfg,
3473                 const struct bna_tx_event_cbfn *tx_cbfn,
3474                 struct bna_res_info *res_info, void *priv)
3475 {
3476         struct bna_intr_info *intr_info;
3477         struct bna_tx_mod *tx_mod = &bna->tx_mod;
3478         struct bna_tx *tx;
3479         struct bna_txq *txq;
3480         struct list_head *qe;
3481         int page_count;
3482         int i;
3483
3484         intr_info = &res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info;
3485         page_count = (res_info[BNA_TX_RES_MEM_T_PAGE].res_u.mem_info.len) /
3486                                         PAGE_SIZE;
3487
3488         /**
3489          * Get resources
3490          */
3491
3492         if ((intr_info->num != 1) && (intr_info->num != tx_cfg->num_txq))
3493                 return NULL;
3494
3495         /* Tx */
3496
3497         tx = bna_tx_get(tx_mod, tx_cfg->tx_type);
3498         if (!tx)
3499                 return NULL;
3500         tx->bna = bna;
3501         tx->priv = priv;
3502
3503         /* TxQs */
3504
3505         INIT_LIST_HEAD(&tx->txq_q);
3506         for (i = 0; i < tx_cfg->num_txq; i++) {
3507                 if (list_empty(&tx_mod->txq_free_q))
3508                         goto err_return;
3509
3510                 bfa_q_deq(&tx_mod->txq_free_q, &txq);
3511                 bfa_q_qe_init(&txq->qe);
3512                 list_add_tail(&txq->qe, &tx->txq_q);
3513                 txq->tx = tx;
3514         }
3515
3516         /*
3517          * Initialize
3518          */
3519
3520         /* Tx */
3521
3522         tx->tcb_setup_cbfn = tx_cbfn->tcb_setup_cbfn;
3523         tx->tcb_destroy_cbfn = tx_cbfn->tcb_destroy_cbfn;
3524         /* Following callbacks are mandatory */
3525         tx->tx_stall_cbfn = tx_cbfn->tx_stall_cbfn;
3526         tx->tx_resume_cbfn = tx_cbfn->tx_resume_cbfn;
3527         tx->tx_cleanup_cbfn = tx_cbfn->tx_cleanup_cbfn;
3528
3529         list_add_tail(&tx->qe, &tx_mod->tx_active_q);
3530
3531         tx->num_txq = tx_cfg->num_txq;
3532
3533         tx->flags = 0;
3534         if (tx->bna->tx_mod.flags & BNA_TX_MOD_F_ENET_STARTED) {
3535                 switch (tx->type) {
3536                 case BNA_TX_T_REGULAR:
3537                         if (!(tx->bna->tx_mod.flags &
3538                                 BNA_TX_MOD_F_ENET_LOOPBACK))
3539                                 tx->flags |= BNA_TX_F_ENET_STARTED;
3540                         break;
3541                 case BNA_TX_T_LOOPBACK:
3542                         if (tx->bna->tx_mod.flags & BNA_TX_MOD_F_ENET_LOOPBACK)
3543                                 tx->flags |= BNA_TX_F_ENET_STARTED;
3544                         break;
3545                 }
3546         }
3547
3548         /* TxQ */
3549
3550         i = 0;
3551         list_for_each(qe, &tx->txq_q) {
3552                 txq = (struct bna_txq *)qe;
3553                 txq->tcb = (struct bna_tcb *)
3554                 res_info[BNA_TX_RES_MEM_T_TCB].res_u.mem_info.mdl[i].kva;
3555                 txq->tx_packets = 0;
3556                 txq->tx_bytes = 0;
3557
3558                 /* IB */
3559                 txq->ib.ib_seg_host_addr.lsb =
3560                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.lsb;
3561                 txq->ib.ib_seg_host_addr.msb =
3562                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.msb;
3563                 txq->ib.ib_seg_host_addr_kva =
3564                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].kva;
3565                 txq->ib.intr_type = intr_info->intr_type;
3566                 txq->ib.intr_vector = (intr_info->num == 1) ?
3567                                         intr_info->idl[0].vector :
3568                                         intr_info->idl[i].vector;
3569                 if (intr_info->intr_type == BNA_INTR_T_INTX)
3570                         txq->ib.intr_vector = (1 <<  txq->ib.intr_vector);
3571                 txq->ib.coalescing_timeo = tx_cfg->coalescing_timeo;
3572                 txq->ib.interpkt_timeo = BFI_TX_INTERPKT_TIMEO;
3573                 txq->ib.interpkt_count = BFI_TX_INTERPKT_COUNT;
3574
3575                 /* TCB */
3576
3577                 txq->tcb->q_depth = tx_cfg->txq_depth;
3578                 txq->tcb->unmap_q = (void *)
3579                 res_info[BNA_TX_RES_MEM_T_UNMAPQ].res_u.mem_info.mdl[i].kva;
3580                 txq->tcb->hw_consumer_index =
3581                         (u32 *)txq->ib.ib_seg_host_addr_kva;
3582                 txq->tcb->i_dbell = &txq->ib.door_bell;
3583                 txq->tcb->intr_type = txq->ib.intr_type;
3584                 txq->tcb->intr_vector = txq->ib.intr_vector;
3585                 txq->tcb->txq = txq;
3586                 txq->tcb->bnad = bnad;
3587                 txq->tcb->id = i;
3588
3589                 /* QPT, SWQPT, Pages */
3590                 bna_txq_qpt_setup(txq, page_count, PAGE_SIZE,
3591                         &res_info[BNA_TX_RES_MEM_T_QPT].res_u.mem_info.mdl[i],
3592                         &res_info[BNA_TX_RES_MEM_T_SWQPT].res_u.mem_info.mdl[i],
3593                         &res_info[BNA_TX_RES_MEM_T_PAGE].
3594                                   res_u.mem_info.mdl[i]);
3595
3596                 /* Callback to bnad for setting up TCB */
3597                 if (tx->tcb_setup_cbfn)
3598                         (tx->tcb_setup_cbfn)(bna->bnad, txq->tcb);
3599
3600                 if (tx_cfg->num_txq == BFI_TX_MAX_PRIO)
3601                         txq->priority = txq->tcb->id;
3602                 else
3603                         txq->priority = tx_mod->default_prio;
3604
3605                 i++;
3606         }
3607
3608         tx->txf_vlan_id = 0;
3609
3610         bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3611
3612         tx_mod->rid_mask |= (1 << tx->rid);
3613
3614         return tx;
3615
3616 err_return:
3617         bna_tx_free(tx);
3618         return NULL;
3619 }
3620
3621 void
3622 bna_tx_destroy(struct bna_tx *tx)
3623 {
3624         struct bna_txq *txq;
3625         struct list_head *qe;
3626
3627         list_for_each(qe, &tx->txq_q) {
3628                 txq = (struct bna_txq *)qe;
3629                 if (tx->tcb_destroy_cbfn)
3630                         (tx->tcb_destroy_cbfn)(tx->bna->bnad, txq->tcb);
3631         }
3632
3633         tx->bna->tx_mod.rid_mask &= ~(1 << tx->rid);
3634         bna_tx_free(tx);
3635 }
3636
3637 void
3638 bna_tx_enable(struct bna_tx *tx)
3639 {
3640         if (tx->fsm != (bfa_sm_t)bna_tx_sm_stopped)
3641                 return;
3642
3643         tx->flags |= BNA_TX_F_ENABLED;
3644
3645         if (tx->flags & BNA_TX_F_ENET_STARTED)
3646                 bfa_fsm_send_event(tx, TX_E_START);
3647 }
3648
3649 void
3650 bna_tx_disable(struct bna_tx *tx, enum bna_cleanup_type type,
3651                 void (*cbfn)(void *, struct bna_tx *))
3652 {
3653         if (type == BNA_SOFT_CLEANUP) {
3654                 (*cbfn)(tx->bna->bnad, tx);
3655                 return;
3656         }
3657
3658         tx->stop_cbfn = cbfn;
3659         tx->stop_cbarg = tx->bna->bnad;
3660
3661         tx->flags &= ~BNA_TX_F_ENABLED;
3662
3663         bfa_fsm_send_event(tx, TX_E_STOP);
3664 }
3665
3666 void
3667 bna_tx_cleanup_complete(struct bna_tx *tx)
3668 {
3669         bfa_fsm_send_event(tx, TX_E_CLEANUP_DONE);
3670 }
3671
3672 static void
3673 bna_tx_mod_cb_tx_stopped(void *arg, struct bna_tx *tx)
3674 {
3675         struct bna_tx_mod *tx_mod = (struct bna_tx_mod *)arg;
3676
3677         bfa_wc_down(&tx_mod->tx_stop_wc);
3678 }
3679
3680 static void
3681 bna_tx_mod_cb_tx_stopped_all(void *arg)
3682 {
3683         struct bna_tx_mod *tx_mod = (struct bna_tx_mod *)arg;
3684
3685         if (tx_mod->stop_cbfn)
3686                 tx_mod->stop_cbfn(&tx_mod->bna->enet);
3687         tx_mod->stop_cbfn = NULL;
3688 }
3689
3690 void
3691 bna_tx_mod_init(struct bna_tx_mod *tx_mod, struct bna *bna,
3692                 struct bna_res_info *res_info)
3693 {
3694         int i;
3695
3696         tx_mod->bna = bna;
3697         tx_mod->flags = 0;
3698
3699         tx_mod->tx = (struct bna_tx *)
3700                 res_info[BNA_MOD_RES_MEM_T_TX_ARRAY].res_u.mem_info.mdl[0].kva;
3701         tx_mod->txq = (struct bna_txq *)
3702                 res_info[BNA_MOD_RES_MEM_T_TXQ_ARRAY].res_u.mem_info.mdl[0].kva;
3703
3704         INIT_LIST_HEAD(&tx_mod->tx_free_q);
3705         INIT_LIST_HEAD(&tx_mod->tx_active_q);
3706
3707         INIT_LIST_HEAD(&tx_mod->txq_free_q);
3708
3709         for (i = 0; i < bna->ioceth.attr.num_txq; i++) {
3710                 tx_mod->tx[i].rid = i;
3711                 bfa_q_qe_init(&tx_mod->tx[i].qe);
3712                 list_add_tail(&tx_mod->tx[i].qe, &tx_mod->tx_free_q);
3713                 bfa_q_qe_init(&tx_mod->txq[i].qe);
3714                 list_add_tail(&tx_mod->txq[i].qe, &tx_mod->txq_free_q);
3715         }
3716
3717         tx_mod->prio_map = BFI_TX_PRIO_MAP_ALL;
3718         tx_mod->default_prio = 0;
3719         tx_mod->iscsi_over_cee = BNA_STATUS_T_DISABLED;
3720         tx_mod->iscsi_prio = -1;
3721 }
3722
3723 void
3724 bna_tx_mod_uninit(struct bna_tx_mod *tx_mod)
3725 {
3726         struct list_head                *qe;
3727         int i;
3728
3729         i = 0;
3730         list_for_each(qe, &tx_mod->tx_free_q)
3731                 i++;
3732
3733         i = 0;
3734         list_for_each(qe, &tx_mod->txq_free_q)
3735                 i++;
3736
3737         tx_mod->bna = NULL;
3738 }
3739
3740 void
3741 bna_tx_mod_start(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3742 {
3743         struct bna_tx *tx;
3744         struct list_head                *qe;
3745
3746         tx_mod->flags |= BNA_TX_MOD_F_ENET_STARTED;
3747         if (type == BNA_TX_T_LOOPBACK)
3748                 tx_mod->flags |= BNA_TX_MOD_F_ENET_LOOPBACK;
3749
3750         list_for_each(qe, &tx_mod->tx_active_q) {
3751                 tx = (struct bna_tx *)qe;
3752                 if (tx->type == type)
3753                         bna_tx_start(tx);
3754         }
3755 }
3756
3757 void
3758 bna_tx_mod_stop(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3759 {
3760         struct bna_tx *tx;
3761         struct list_head                *qe;
3762
3763         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_STARTED;
3764         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_LOOPBACK;
3765
3766         tx_mod->stop_cbfn = bna_enet_cb_tx_stopped;
3767
3768         bfa_wc_init(&tx_mod->tx_stop_wc, bna_tx_mod_cb_tx_stopped_all, tx_mod);
3769
3770         list_for_each(qe, &tx_mod->tx_active_q) {
3771                 tx = (struct bna_tx *)qe;
3772                 if (tx->type == type) {
3773                         bfa_wc_up(&tx_mod->tx_stop_wc);
3774                         bna_tx_stop(tx);
3775                 }
3776         }
3777
3778         bfa_wc_wait(&tx_mod->tx_stop_wc);
3779 }
3780
3781 void
3782 bna_tx_mod_fail(struct bna_tx_mod *tx_mod)
3783 {
3784         struct bna_tx *tx;
3785         struct list_head                *qe;
3786
3787         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_STARTED;
3788         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_LOOPBACK;
3789
3790         list_for_each(qe, &tx_mod->tx_active_q) {
3791                 tx = (struct bna_tx *)qe;
3792                 bna_tx_fail(tx);
3793         }
3794 }
3795
3796 void
3797 bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo)
3798 {
3799         struct bna_txq *txq;
3800         struct list_head *qe;
3801
3802         list_for_each(qe, &tx->txq_q) {
3803                 txq = (struct bna_txq *)qe;
3804                 bna_ib_coalescing_timeo_set(&txq->ib, coalescing_timeo);
3805         }
3806 }