1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
47 #include <net/mac80211.h>
49 #include <asm/div64.h>
51 #define DRV_NAME "iwl4965"
56 /******************************************************************************
60 ******************************************************************************/
63 * module name, copyright, version, etc.
65 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi 4965 driver for Linux"
67 #ifdef CONFIG_IWLEGACY_DEBUG
73 #define DRV_VERSION IWLWIFI_VERSION VD
75 MODULE_DESCRIPTION(DRV_DESCRIPTION);
76 MODULE_VERSION(DRV_VERSION);
77 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
78 MODULE_LICENSE("GPL");
79 MODULE_ALIAS("iwl4965");
82 il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status)
84 if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
85 IL_ERR("Tx flush command to flush out all frames\n");
86 if (!test_bit(S_EXIT_PENDING, &il->status))
87 queue_work(il->workqueue, &il->tx_flush);
94 struct il_mod_params il4965_mod_params = {
97 /* the rest are 0 by default */
101 il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
105 spin_lock_irqsave(&rxq->lock, flags);
106 INIT_LIST_HEAD(&rxq->rx_free);
107 INIT_LIST_HEAD(&rxq->rx_used);
108 /* Fill the rx_used queue with _all_ of the Rx buffers */
109 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
110 /* In the reset function, these buffers may have been allocated
111 * to an SKB, so we need to unmap and free potential storage */
112 if (rxq->pool[i].page != NULL) {
113 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
114 PAGE_SIZE << il->hw_params.rx_page_order,
116 __il_free_pages(il, rxq->pool[i].page);
117 rxq->pool[i].page = NULL;
119 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
122 for (i = 0; i < RX_QUEUE_SIZE; i++)
123 rxq->queue[i] = NULL;
125 /* Set us so that we have processed and used all buffers, but have
126 * not restocked the Rx queue with fresh buffers */
127 rxq->read = rxq->write = 0;
128 rxq->write_actual = 0;
130 spin_unlock_irqrestore(&rxq->lock, flags);
134 il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
137 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
140 if (il->cfg->mod_params->amsdu_size_8K)
141 rb_size = FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
143 rb_size = FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
146 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0);
148 /* Reset driver's Rx queue write idx */
149 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
151 /* Tell device where to find RBD circular buffer in DRAM */
152 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, (u32) (rxq->bd_dma >> 8));
154 /* Tell device where in DRAM to update its Rx status */
155 il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, rxq->rb_stts_dma >> 4);
158 * Direct rx interrupts to hosts
159 * Rx buffer size 4 or 8k
163 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG,
164 FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
165 FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
166 FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
168 (rb_timeout << FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) |
169 (rfdnlog << FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
171 /* Set interrupt coalescing timer to default (2048 usecs) */
172 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF);
178 il4965_set_pwr_vmain(struct il_priv *il)
181 * (for documentation purposes)
182 * to set power to V_AUX, do:
184 if (pci_pme_capable(il->pci_dev, PCI_D3cold))
185 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
186 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
187 ~APMG_PS_CTRL_MSK_PWR_SRC);
190 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
191 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
192 ~APMG_PS_CTRL_MSK_PWR_SRC);
196 il4965_hw_nic_init(struct il_priv *il)
199 struct il_rx_queue *rxq = &il->rxq;
202 spin_lock_irqsave(&il->lock, flags);
204 /* Set interrupt coalescing calibration timer to default (512 usecs) */
205 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_CALIB_TIMEOUT_DEF);
206 spin_unlock_irqrestore(&il->lock, flags);
208 il4965_set_pwr_vmain(il);
209 il4965_nic_config(il);
211 /* Allocate the RX queue, or reset if it is already allocated */
213 ret = il_rx_queue_alloc(il);
215 IL_ERR("Unable to initialize Rx queue\n");
219 il4965_rx_queue_reset(il, rxq);
221 il4965_rx_replenish(il);
223 il4965_rx_init(il, rxq);
225 spin_lock_irqsave(&il->lock, flags);
227 rxq->need_update = 1;
228 il_rx_queue_update_write_ptr(il, rxq);
230 spin_unlock_irqrestore(&il->lock, flags);
232 /* Allocate or reset and init all Tx and Command queues */
234 ret = il4965_txq_ctx_alloc(il);
238 il4965_txq_ctx_reset(il);
240 set_bit(S_INIT, &il->status);
246 * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
249 il4965_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
251 return cpu_to_le32((u32) (dma_addr >> 8));
255 * il4965_rx_queue_restock - refill RX queue from pre-allocated pool
257 * If there are slots in the RX queue that need to be restocked,
258 * and we have free pre-allocated buffers, fill the ranks as much
259 * as we can, pulling from rx_free.
261 * This moves the 'write' idx forward to catch up with 'processed', and
262 * also updates the memory address in the firmware to reference the new
266 il4965_rx_queue_restock(struct il_priv *il)
268 struct il_rx_queue *rxq = &il->rxq;
269 struct list_head *element;
270 struct il_rx_buf *rxb;
273 spin_lock_irqsave(&rxq->lock, flags);
274 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
275 /* The overwritten rxb must be a used one */
276 rxb = rxq->queue[rxq->write];
277 BUG_ON(rxb && rxb->page);
279 /* Get next free Rx buffer, remove from free list */
280 element = rxq->rx_free.next;
281 rxb = list_entry(element, struct il_rx_buf, list);
284 /* Point to Rx buffer via next RBD in circular buffer */
285 rxq->bd[rxq->write] =
286 il4965_dma_addr2rbd_ptr(il, rxb->page_dma);
287 rxq->queue[rxq->write] = rxb;
288 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
291 spin_unlock_irqrestore(&rxq->lock, flags);
292 /* If the pre-allocated buffer pool is dropping low, schedule to
294 if (rxq->free_count <= RX_LOW_WATERMARK)
295 queue_work(il->workqueue, &il->rx_replenish);
297 /* If we've added more space for the firmware to place data, tell it.
298 * Increment device's write pointer in multiples of 8. */
299 if (rxq->write_actual != (rxq->write & ~0x7)) {
300 spin_lock_irqsave(&rxq->lock, flags);
301 rxq->need_update = 1;
302 spin_unlock_irqrestore(&rxq->lock, flags);
303 il_rx_queue_update_write_ptr(il, rxq);
308 * il4965_rx_replenish - Move all used packet from rx_used to rx_free
310 * When moving to rx_free an SKB is allocated for the slot.
312 * Also restock the Rx queue via il_rx_queue_restock.
313 * This is called as a scheduled work item (except for during initialization)
316 il4965_rx_allocate(struct il_priv *il, gfp_t priority)
318 struct il_rx_queue *rxq = &il->rxq;
319 struct list_head *element;
320 struct il_rx_buf *rxb;
323 gfp_t gfp_mask = priority;
326 spin_lock_irqsave(&rxq->lock, flags);
327 if (list_empty(&rxq->rx_used)) {
328 spin_unlock_irqrestore(&rxq->lock, flags);
331 spin_unlock_irqrestore(&rxq->lock, flags);
333 if (rxq->free_count > RX_LOW_WATERMARK)
334 gfp_mask |= __GFP_NOWARN;
336 if (il->hw_params.rx_page_order > 0)
337 gfp_mask |= __GFP_COMP;
339 /* Alloc a new receive buffer */
340 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
343 D_INFO("alloc_pages failed, " "order: %d\n",
344 il->hw_params.rx_page_order);
346 if (rxq->free_count <= RX_LOW_WATERMARK &&
348 IL_ERR("Failed to alloc_pages with %s. "
349 "Only %u free buffers remaining.\n",
351 GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
353 /* We don't reschedule replenish work here -- we will
354 * call the restock method and if it still needs
355 * more buffers it will schedule replenish */
359 spin_lock_irqsave(&rxq->lock, flags);
361 if (list_empty(&rxq->rx_used)) {
362 spin_unlock_irqrestore(&rxq->lock, flags);
363 __free_pages(page, il->hw_params.rx_page_order);
366 element = rxq->rx_used.next;
367 rxb = list_entry(element, struct il_rx_buf, list);
370 spin_unlock_irqrestore(&rxq->lock, flags);
374 /* Get physical address of the RB */
376 pci_map_page(il->pci_dev, page, 0,
377 PAGE_SIZE << il->hw_params.rx_page_order,
379 /* dma address must be no more than 36 bits */
380 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
381 /* and also 256 byte aligned! */
382 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
384 spin_lock_irqsave(&rxq->lock, flags);
386 list_add_tail(&rxb->list, &rxq->rx_free);
388 il->alloc_rxb_page++;
390 spin_unlock_irqrestore(&rxq->lock, flags);
395 il4965_rx_replenish(struct il_priv *il)
399 il4965_rx_allocate(il, GFP_KERNEL);
401 spin_lock_irqsave(&il->lock, flags);
402 il4965_rx_queue_restock(il);
403 spin_unlock_irqrestore(&il->lock, flags);
407 il4965_rx_replenish_now(struct il_priv *il)
409 il4965_rx_allocate(il, GFP_ATOMIC);
411 il4965_rx_queue_restock(il);
414 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
415 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
416 * This free routine walks the list of POOL entries and if SKB is set to
417 * non NULL it is unmapped and freed
420 il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
423 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
424 if (rxq->pool[i].page != NULL) {
425 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
426 PAGE_SIZE << il->hw_params.rx_page_order,
428 __il_free_pages(il, rxq->pool[i].page);
429 rxq->pool[i].page = NULL;
433 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
435 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
436 rxq->rb_stts, rxq->rb_stts_dma);
442 il4965_rxq_stop(struct il_priv *il)
446 _il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0);
447 ret = _il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG,
448 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
449 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
452 IL_ERR("Can't stop Rx DMA.\n");
458 il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
463 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
464 if (rate_n_flags & RATE_MCS_HT_MSK) {
465 idx = (rate_n_flags & 0xff);
467 /* Legacy rate format, search for match in table */
469 if (band == IEEE80211_BAND_5GHZ)
470 band_offset = IL_FIRST_OFDM_RATE;
471 for (idx = band_offset; idx < RATE_COUNT_LEGACY; idx++)
472 if (il_rates[idx].plcp == (rate_n_flags & 0xFF))
473 return idx - band_offset;
480 il4965_calc_rssi(struct il_priv *il, struct il_rx_phy_res *rx_resp)
482 /* data from PHY/DSP regarding signal strength, etc.,
483 * contents are always there, not configurable by host. */
484 struct il4965_rx_non_cfg_phy *ncphy =
485 (struct il4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
487 (le16_to_cpu(ncphy->agc_info) & IL49_AGC_DB_MASK) >>
491 (le16_to_cpu(rx_resp->phy_flags) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK)
492 >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
496 /* Find max rssi among 3 possible receivers.
497 * These values are measured by the digital signal processor (DSP).
498 * They should stay fairly constant even as the signal strength varies,
499 * if the radio's automatic gain control (AGC) is working right.
500 * AGC value (see below) will provide the "interesting" info. */
501 for (i = 0; i < 3; i++)
502 if (valid_antennae & (1 << i))
503 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
505 D_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
506 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
509 /* dBm = max_rssi dB - agc dB - constant.
510 * Higher AGC (higher radio gain) means lower signal. */
511 return max_rssi - agc - IL4965_RSSI_OFFSET;
515 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in)
519 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
520 RX_RES_STATUS_STATION_FOUND)
522 (RX_RES_STATUS_STATION_FOUND |
523 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
525 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
527 /* packet was not encrypted */
528 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
529 RX_RES_STATUS_SEC_TYPE_NONE)
532 /* packet was encrypted with unknown alg */
533 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
534 RX_RES_STATUS_SEC_TYPE_ERR)
537 /* decryption was not done in HW */
538 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
539 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
542 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
544 case RX_RES_STATUS_SEC_TYPE_CCMP:
545 /* alg is CCM: check MIC only */
546 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
548 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
550 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
554 case RX_RES_STATUS_SEC_TYPE_TKIP:
555 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
557 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
560 /* fall through if TTAK OK */
562 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
563 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
565 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
569 D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", decrypt_in, decrypt_out);
575 il4965_pass_packet_to_mac80211(struct il_priv *il, struct ieee80211_hdr *hdr,
576 u16 len, u32 ampdu_status, struct il_rx_buf *rxb,
577 struct ieee80211_rx_status *stats)
580 __le16 fc = hdr->frame_control;
582 /* We only process data packets if the interface is open */
583 if (unlikely(!il->is_open)) {
584 D_DROP("Dropping packet while interface is not open.\n");
588 /* In case of HW accelerated crypto and bad decryption, drop */
589 if (!il->cfg->mod_params->sw_crypto &&
590 il_set_decrypted_flag(il, hdr, ampdu_status, stats))
593 skb = dev_alloc_skb(128);
595 IL_ERR("dev_alloc_skb failed\n");
599 skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len,
602 il_update_stats(il, false, fc, len);
603 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
605 ieee80211_rx(il->hw, skb);
606 il->alloc_rxb_page--;
610 /* Called for N_RX (legacy ABG frames), or
611 * N_RX_MPDU (HT high-throughput N frames). */
613 il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb)
615 struct ieee80211_hdr *header;
616 struct ieee80211_rx_status rx_status;
617 struct il_rx_pkt *pkt = rxb_addr(rxb);
618 struct il_rx_phy_res *phy_res;
619 __le32 rx_pkt_status;
620 struct il_rx_mpdu_res_start *amsdu;
626 * N_RX and N_RX_MPDU are handled differently.
627 * N_RX: physical layer info is in this buffer
628 * N_RX_MPDU: physical layer info was sent in separate
629 * command and cached in il->last_phy_res
631 * Here we set up local variables depending on which command is
634 if (pkt->hdr.cmd == N_RX) {
635 phy_res = (struct il_rx_phy_res *)pkt->u.raw;
637 (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res) +
638 phy_res->cfg_phy_cnt);
640 len = le16_to_cpu(phy_res->byte_count);
642 *(__le32 *) (pkt->u.raw + sizeof(*phy_res) +
643 phy_res->cfg_phy_cnt + len);
644 ampdu_status = le32_to_cpu(rx_pkt_status);
646 if (!il->_4965.last_phy_res_valid) {
647 IL_ERR("MPDU frame without cached PHY data\n");
650 phy_res = &il->_4965.last_phy_res;
651 amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw;
652 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
653 len = le16_to_cpu(amsdu->byte_count);
654 rx_pkt_status = *(__le32 *) (pkt->u.raw + sizeof(*amsdu) + len);
656 il4965_translate_rx_status(il, le32_to_cpu(rx_pkt_status));
659 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
660 D_DROP("dsp size out of range [0,20]: %d/n",
661 phy_res->cfg_phy_cnt);
665 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
666 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
667 D_RX("Bad CRC or FIFO: 0x%08X.\n", le32_to_cpu(rx_pkt_status));
671 /* This will be used in several places later */
672 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
674 /* rx_status carries information about the packet to mac80211 */
675 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
678 phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ :
681 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel),
684 il4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
687 /* TSF isn't reliable. In order to allow smooth user experience,
688 * this W/A doesn't propagate it to the mac80211 */
689 /*rx_status.flag |= RX_FLAG_MACTIME_MPDU; */
691 il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
693 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
694 rx_status.signal = il4965_calc_rssi(il, phy_res);
696 D_STATS("Rssi %d, TSF %llu\n", rx_status.signal,
697 (unsigned long long)rx_status.mactime);
702 * It seems that the antenna field in the phy flags value
703 * is actually a bit field. This is undefined by radiotap,
704 * it wants an actual antenna number but I always get "7"
705 * for most legacy frames I receive indicating that the
706 * same frame was received on all three RX chains.
708 * I think this field should be removed in favor of a
709 * new 802.11n radiotap field "RX chains" that is defined
713 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >>
714 RX_RES_PHY_FLAGS_ANTENNA_POS;
716 /* set the preamble flag if appropriate */
717 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
718 rx_status.flag |= RX_FLAG_SHORTPRE;
720 /* Set up the HT phy flags */
721 if (rate_n_flags & RATE_MCS_HT_MSK)
722 rx_status.flag |= RX_FLAG_HT;
723 if (rate_n_flags & RATE_MCS_HT40_MSK)
724 rx_status.flag |= RX_FLAG_40MHZ;
725 if (rate_n_flags & RATE_MCS_SGI_MSK)
726 rx_status.flag |= RX_FLAG_SHORT_GI;
728 il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, rxb,
732 /* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY).
733 * This will be used later in il_hdl_rx() for N_RX_MPDU. */
735 il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb)
737 struct il_rx_pkt *pkt = rxb_addr(rxb);
738 il->_4965.last_phy_res_valid = true;
739 memcpy(&il->_4965.last_phy_res, pkt->u.raw,
740 sizeof(struct il_rx_phy_res));
744 il4965_get_channels_for_scan(struct il_priv *il, struct ieee80211_vif *vif,
745 enum ieee80211_band band, u8 is_active,
746 u8 n_probes, struct il_scan_channel *scan_ch)
748 struct ieee80211_channel *chan;
749 const struct ieee80211_supported_band *sband;
750 const struct il_channel_info *ch_info;
751 u16 passive_dwell = 0;
752 u16 active_dwell = 0;
756 sband = il_get_hw_mode(il, band);
760 active_dwell = il_get_active_dwell_time(il, band, n_probes);
761 passive_dwell = il_get_passive_dwell_time(il, band, vif);
763 if (passive_dwell <= active_dwell)
764 passive_dwell = active_dwell + 1;
766 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
767 chan = il->scan_request->channels[i];
769 if (chan->band != band)
772 channel = chan->hw_value;
773 scan_ch->channel = cpu_to_le16(channel);
775 ch_info = il_get_channel_info(il, band, channel);
776 if (!il_is_channel_valid(ch_info)) {
777 D_SCAN("Channel %d is INVALID for this band.\n",
782 if (!is_active || il_is_channel_passive(ch_info) ||
783 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
784 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
786 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
789 scan_ch->type |= IL_SCAN_PROBE_MASK(n_probes);
791 scan_ch->active_dwell = cpu_to_le16(active_dwell);
792 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
794 /* Set txpower levels to defaults */
795 scan_ch->dsp_atten = 110;
797 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
799 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
801 if (band == IEEE80211_BAND_5GHZ)
802 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
804 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
806 D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", channel,
807 le32_to_cpu(scan_ch->type),
809 type & SCAN_CHANNEL_TYPE_ACTIVE) ? "ACTIVE" : "PASSIVE",
811 type & SCAN_CHANNEL_TYPE_ACTIVE) ? active_dwell :
818 D_SCAN("total channels to scan %d\n", added);
823 il4965_toggle_tx_ant(struct il_priv *il, u8 *ant, u8 valid)
828 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
829 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
830 if (valid & BIT(ind)) {
838 il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
840 struct il_host_cmd cmd = {
842 .len = sizeof(struct il_scan_cmd),
843 .flags = CMD_SIZE_HUGE,
845 struct il_scan_cmd *scan;
849 enum ieee80211_band band;
851 u8 rx_ant = il->hw_params.valid_rx_ant;
853 bool is_active = false;
856 u8 scan_tx_antennas = il->hw_params.valid_tx_ant;
859 lockdep_assert_held(&il->mutex);
863 kmalloc(sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE,
866 D_SCAN("fail to allocate memory for scan\n");
871 memset(scan, 0, sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE);
873 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
874 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
876 if (il_is_any_associated(il)) {
879 u32 suspend_time = 100;
880 u32 scan_suspend_time = 100;
882 D_INFO("Scanning while associated...\n");
883 interval = vif->bss_conf.beacon_int;
885 scan->suspend_time = 0;
886 scan->max_out_time = cpu_to_le32(200 * 1024);
888 interval = suspend_time;
890 extra = (suspend_time / interval) << 22;
892 (extra | ((suspend_time % interval) * 1024));
893 scan->suspend_time = cpu_to_le32(scan_suspend_time);
894 D_SCAN("suspend_time 0x%X beacon interval %d\n",
895 scan_suspend_time, interval);
898 if (il->scan_request->n_ssids) {
900 D_SCAN("Kicking off active scan\n");
901 for (i = 0; i < il->scan_request->n_ssids; i++) {
902 /* always does wildcard anyway */
903 if (!il->scan_request->ssids[i].ssid_len)
905 scan->direct_scan[p].id = WLAN_EID_SSID;
906 scan->direct_scan[p].len =
907 il->scan_request->ssids[i].ssid_len;
908 memcpy(scan->direct_scan[p].ssid,
909 il->scan_request->ssids[i].ssid,
910 il->scan_request->ssids[i].ssid_len);
916 D_SCAN("Start passive scan.\n");
918 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
919 scan->tx_cmd.sta_id = il->hw_params.bcast_id;
920 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
922 switch (il->scan_band) {
923 case IEEE80211_BAND_2GHZ:
924 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
926 le32_to_cpu(il->active.flags & RXON_FLG_CHANNEL_MODE_MSK) >>
927 RXON_FLG_CHANNEL_MODE_POS;
928 if (chan_mod == CHANNEL_MODE_PURE_40) {
932 rate_flags = RATE_MCS_CCK_MSK;
935 case IEEE80211_BAND_5GHZ:
939 IL_WARN("Invalid scan band\n");
944 * If active scanning is requested but a certain channel is
945 * marked passive, we can do active scanning if we detect
948 * There is an issue with some firmware versions that triggers
949 * a sysassert on a "good CRC threshold" of zero (== disabled),
950 * on a radar channel even though this means that we should NOT
953 * The "good CRC threshold" is the number of frames that we
954 * need to receive during our dwell time on a channel before
955 * sending out probes -- setting this to a huge value will
956 * mean we never reach it, but at the same time work around
957 * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER
958 * here instead of IL_GOOD_CRC_TH_DISABLED.
961 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
963 band = il->scan_band;
965 if (il->cfg->scan_rx_antennas[band])
966 rx_ant = il->cfg->scan_rx_antennas[band];
968 il4965_toggle_tx_ant(il, &il->scan_tx_ant[band], scan_tx_antennas);
969 rate_flags |= BIT(il->scan_tx_ant[band]) << RATE_MCS_ANT_POS;
970 scan->tx_cmd.rate_n_flags = cpu_to_le32(rate | rate_flags);
972 /* In power save mode use one chain, otherwise use all chains */
973 if (test_bit(S_POWER_PMI, &il->status)) {
974 /* rx_ant has been set to all valid chains previously */
976 rx_ant & ((u8) (il->chain_noise_data.active_chains));
978 active_chains = rx_ant;
980 D_SCAN("chain_noise_data.active_chains: %u\n",
981 il->chain_noise_data.active_chains);
983 rx_ant = il4965_first_antenna(active_chains);
986 /* MIMO is not used here, but value is required */
987 rx_chain |= il->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
988 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
989 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
990 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
991 scan->rx_chain = cpu_to_le16(rx_chain);
994 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
995 vif->addr, il->scan_request->ie,
996 il->scan_request->ie_len,
997 IL_MAX_SCAN_SIZE - sizeof(*scan));
998 scan->tx_cmd.len = cpu_to_le16(cmd_len);
1000 scan->filter_flags |=
1001 (RXON_FILTER_ACCEPT_GRP_MSK | RXON_FILTER_BCON_AWARE_MSK);
1003 scan->channel_count =
1004 il4965_get_channels_for_scan(il, vif, band, is_active, n_probes,
1005 (void *)&scan->data[cmd_len]);
1006 if (scan->channel_count == 0) {
1007 D_SCAN("channel count %d\n", scan->channel_count);
1012 le16_to_cpu(scan->tx_cmd.len) +
1013 scan->channel_count * sizeof(struct il_scan_channel);
1015 scan->len = cpu_to_le16(cmd.len);
1017 set_bit(S_SCAN_HW, &il->status);
1019 ret = il_send_cmd_sync(il, &cmd);
1021 clear_bit(S_SCAN_HW, &il->status);
1027 il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif,
1030 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
1033 return il4965_add_bssid_station(il, vif->bss_conf.bssid,
1034 &vif_priv->ibss_bssid_sta_id);
1035 return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
1036 vif->bss_conf.bssid);
1040 il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, int freed)
1042 lockdep_assert_held(&il->sta_lock);
1044 if (il->stations[sta_id].tid[tid].tfds_in_queue >= freed)
1045 il->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1047 D_TX("free more than tfds_in_queue (%u:%d)\n",
1048 il->stations[sta_id].tid[tid].tfds_in_queue, freed);
1049 il->stations[sta_id].tid[tid].tfds_in_queue = 0;
1053 #define IL_TX_QUEUE_MSK 0xfffff
1056 il4965_is_single_rx_stream(struct il_priv *il)
1058 return il->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
1059 il->current_ht_config.single_chain_sufficient;
1062 #define IL_NUM_RX_CHAINS_MULTIPLE 3
1063 #define IL_NUM_RX_CHAINS_SINGLE 2
1064 #define IL_NUM_IDLE_CHAINS_DUAL 2
1065 #define IL_NUM_IDLE_CHAINS_SINGLE 1
1068 * Determine how many receiver/antenna chains to use.
1070 * More provides better reception via diversity. Fewer saves power
1071 * at the expense of throughput, but only when not in powersave to
1074 * MIMO (dual stream) requires at least 2, but works better with 3.
1075 * This does not determine *which* chains to use, just how many.
1078 il4965_get_active_rx_chain_count(struct il_priv *il)
1080 /* # of Rx chains to use when expecting MIMO. */
1081 if (il4965_is_single_rx_stream(il))
1082 return IL_NUM_RX_CHAINS_SINGLE;
1084 return IL_NUM_RX_CHAINS_MULTIPLE;
1088 * When we are in power saving mode, unless device support spatial
1089 * multiplexing power save, use the active count for rx chain count.
1092 il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt)
1094 /* # Rx chains when idling, depending on SMPS mode */
1095 switch (il->current_ht_config.smps) {
1096 case IEEE80211_SMPS_STATIC:
1097 case IEEE80211_SMPS_DYNAMIC:
1098 return IL_NUM_IDLE_CHAINS_SINGLE;
1099 case IEEE80211_SMPS_OFF:
1102 WARN(1, "invalid SMPS mode %d", il->current_ht_config.smps);
1107 /* up to 4 chains */
1109 il4965_count_chain_bitmap(u32 chain_bitmap)
1112 res = (chain_bitmap & BIT(0)) >> 0;
1113 res += (chain_bitmap & BIT(1)) >> 1;
1114 res += (chain_bitmap & BIT(2)) >> 2;
1115 res += (chain_bitmap & BIT(3)) >> 3;
1120 * il4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1122 * Selects how many and which Rx receivers/antennas/chains to use.
1123 * This should not be used for scan command ... it puts data in wrong place.
1126 il4965_set_rxon_chain(struct il_priv *il)
1128 bool is_single = il4965_is_single_rx_stream(il);
1129 bool is_cam = !test_bit(S_POWER_PMI, &il->status);
1130 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1134 /* Tell uCode which antennas are actually connected.
1135 * Before first association, we assume all antennas are connected.
1136 * Just after first association, il4965_chain_noise_calibration()
1137 * checks which antennas actually *are* connected. */
1138 if (il->chain_noise_data.active_chains)
1139 active_chains = il->chain_noise_data.active_chains;
1141 active_chains = il->hw_params.valid_rx_ant;
1143 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1145 /* How many receivers should we use? */
1146 active_rx_cnt = il4965_get_active_rx_chain_count(il);
1147 idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt);
1149 /* correct rx chain count according hw settings
1150 * and chain noise calibration
1152 valid_rx_cnt = il4965_count_chain_bitmap(active_chains);
1153 if (valid_rx_cnt < active_rx_cnt)
1154 active_rx_cnt = valid_rx_cnt;
1156 if (valid_rx_cnt < idle_rx_cnt)
1157 idle_rx_cnt = valid_rx_cnt;
1159 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1160 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1162 il->staging.rx_chain = cpu_to_le16(rx_chain);
1164 if (!is_single && active_rx_cnt >= IL_NUM_RX_CHAINS_SINGLE && is_cam)
1165 il->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1167 il->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1169 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", il->staging.rx_chain,
1170 active_rx_cnt, idle_rx_cnt);
1172 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1173 active_rx_cnt < idle_rx_cnt);
1177 il4965_get_fh_string(int cmd)
1180 IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG);
1181 IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG);
1182 IL_CMD(FH49_RSCSR_CHNL0_WPTR);
1183 IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG);
1184 IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG);
1185 IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG);
1186 IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
1187 IL_CMD(FH49_TSSR_TX_STATUS_REG);
1188 IL_CMD(FH49_TSSR_TX_ERROR_REG);
1195 il4965_dump_fh(struct il_priv *il, char **buf, bool display)
1198 #ifdef CONFIG_IWLEGACY_DEBUG
1202 static const u32 fh_tbl[] = {
1203 FH49_RSCSR_CHNL0_STTS_WPTR_REG,
1204 FH49_RSCSR_CHNL0_RBDCB_BASE_REG,
1205 FH49_RSCSR_CHNL0_WPTR,
1206 FH49_MEM_RCSR_CHNL0_CONFIG_REG,
1207 FH49_MEM_RSSR_SHARED_CTRL_REG,
1208 FH49_MEM_RSSR_RX_STATUS_REG,
1209 FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
1210 FH49_TSSR_TX_STATUS_REG,
1211 FH49_TSSR_TX_ERROR_REG
1213 #ifdef CONFIG_IWLEGACY_DEBUG
1215 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
1216 *buf = kmalloc(bufsz, GFP_KERNEL);
1220 scnprintf(*buf + pos, bufsz - pos, "FH register values:\n");
1221 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1223 scnprintf(*buf + pos, bufsz - pos,
1225 il4965_get_fh_string(fh_tbl[i]),
1226 il_rd(il, fh_tbl[i]));
1231 IL_ERR("FH register values:\n");
1232 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1233 IL_ERR(" %34s: 0X%08x\n", il4965_get_fh_string(fh_tbl[i]),
1234 il_rd(il, fh_tbl[i]));
1240 il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb)
1242 struct il_rx_pkt *pkt = rxb_addr(rxb);
1243 struct il_missed_beacon_notif *missed_beacon;
1245 missed_beacon = &pkt->u.missed_beacon;
1246 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
1247 il->missed_beacon_threshold) {
1248 D_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
1249 le32_to_cpu(missed_beacon->consecutive_missed_beacons),
1250 le32_to_cpu(missed_beacon->total_missed_becons),
1251 le32_to_cpu(missed_beacon->num_recvd_beacons),
1252 le32_to_cpu(missed_beacon->num_expected_beacons));
1253 if (!test_bit(S_SCANNING, &il->status))
1254 il4965_init_sensitivity(il);
1258 /* Calculate noise level, based on measurements during network silence just
1259 * before arriving beacon. This measurement can be done only if we know
1260 * exactly when to expect beacons, therefore only when we're associated. */
1262 il4965_rx_calc_noise(struct il_priv *il)
1264 struct stats_rx_non_phy *rx_info;
1265 int num_active_rx = 0;
1266 int total_silence = 0;
1267 int bcn_silence_a, bcn_silence_b, bcn_silence_c;
1270 rx_info = &(il->_4965.stats.rx.general);
1272 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
1274 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
1276 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
1278 if (bcn_silence_a) {
1279 total_silence += bcn_silence_a;
1282 if (bcn_silence_b) {
1283 total_silence += bcn_silence_b;
1286 if (bcn_silence_c) {
1287 total_silence += bcn_silence_c;
1291 /* Average among active antennas */
1293 last_rx_noise = (total_silence / num_active_rx) - 107;
1295 last_rx_noise = IL_NOISE_MEAS_NOT_AVAILABLE;
1297 D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", bcn_silence_a,
1298 bcn_silence_b, bcn_silence_c, last_rx_noise);
1301 #ifdef CONFIG_IWLEGACY_DEBUGFS
1303 * based on the assumption of all stats counter are in DWORD
1304 * FIXME: This function is for debugging, do not deal with
1305 * the case of counters roll-over.
1308 il4965_accumulative_stats(struct il_priv *il, __le32 * stats)
1313 u32 *delta, *max_delta;
1314 struct stats_general_common *general, *accum_general;
1315 struct stats_tx *tx, *accum_tx;
1317 prev_stats = (__le32 *) &il->_4965.stats;
1318 accum_stats = (u32 *) &il->_4965.accum_stats;
1319 size = sizeof(struct il_notif_stats);
1320 general = &il->_4965.stats.general.common;
1321 accum_general = &il->_4965.accum_stats.general.common;
1322 tx = &il->_4965.stats.tx;
1323 accum_tx = &il->_4965.accum_stats.tx;
1324 delta = (u32 *) &il->_4965.delta_stats;
1325 max_delta = (u32 *) &il->_4965.max_delta;
1327 for (i = sizeof(__le32); i < size;
1329 sizeof(__le32), stats++, prev_stats++, delta++, max_delta++,
1331 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
1333 (le32_to_cpu(*stats) - le32_to_cpu(*prev_stats));
1334 *accum_stats += *delta;
1335 if (*delta > *max_delta)
1336 *max_delta = *delta;
1340 /* reset accumulative stats for "no-counter" type stats */
1341 accum_general->temperature = general->temperature;
1342 accum_general->ttl_timestamp = general->ttl_timestamp;
1347 il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb)
1349 const int recalib_seconds = 60;
1351 struct il_rx_pkt *pkt = rxb_addr(rxb);
1353 D_RX("Statistics notification received (%d vs %d).\n",
1354 (int)sizeof(struct il_notif_stats),
1355 le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK);
1358 ((il->_4965.stats.general.common.temperature !=
1359 pkt->u.stats.general.common.temperature) ||
1360 ((il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK) !=
1361 (pkt->u.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)));
1362 #ifdef CONFIG_IWLEGACY_DEBUGFS
1363 il4965_accumulative_stats(il, (__le32 *) &pkt->u.stats);
1366 /* TODO: reading some of stats is unneeded */
1367 memcpy(&il->_4965.stats, &pkt->u.stats, sizeof(il->_4965.stats));
1369 set_bit(S_STATS, &il->status);
1372 * Reschedule the stats timer to occur in recalib_seconds to ensure
1373 * we get a thermal update even if the uCode doesn't give us one
1375 mod_timer(&il->stats_periodic,
1376 jiffies + msecs_to_jiffies(recalib_seconds * 1000));
1378 if (unlikely(!test_bit(S_SCANNING, &il->status)) &&
1379 (pkt->hdr.cmd == N_STATS)) {
1380 il4965_rx_calc_noise(il);
1381 queue_work(il->workqueue, &il->run_time_calib_work);
1385 il4965_temperature_calib(il);
1389 il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb)
1391 struct il_rx_pkt *pkt = rxb_addr(rxb);
1393 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATS_CLEAR_MSK) {
1394 #ifdef CONFIG_IWLEGACY_DEBUGFS
1395 memset(&il->_4965.accum_stats, 0,
1396 sizeof(struct il_notif_stats));
1397 memset(&il->_4965.delta_stats, 0,
1398 sizeof(struct il_notif_stats));
1399 memset(&il->_4965.max_delta, 0, sizeof(struct il_notif_stats));
1401 D_RX("Statistics have been cleared\n");
1403 il4965_hdl_stats(il, rxb);
1408 * mac80211 queues, ACs, hardware queues, FIFOs.
1410 * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
1412 * Mac80211 uses the following numbers, which we get as from it
1413 * by way of skb_get_queue_mapping(skb):
1421 * Regular (not A-MPDU) frames are put into hardware queues corresponding
1422 * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
1423 * own queue per aggregation session (RA/TID combination), such queues are
1424 * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
1425 * order to map frames to the right queue, we also need an AC->hw queue
1426 * mapping. This is implemented here.
1428 * Due to the way hw queues are set up (by the hw specific modules like
1429 * 4965.c), the AC->hw queue mapping is the identity
1433 static const u8 tid_to_ac[] = {
1445 il4965_get_ac_from_tid(u16 tid)
1447 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
1448 return tid_to_ac[tid];
1450 /* no support for TIDs 8-15 yet */
1455 il4965_get_fifo_from_tid(u16 tid)
1457 const u8 ac_to_fifo[] = {
1464 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
1465 return ac_to_fifo[tid_to_ac[tid]];
1467 /* no support for TIDs 8-15 yet */
1472 * handle build C_TX command notification.
1475 il4965_tx_cmd_build_basic(struct il_priv *il, struct sk_buff *skb,
1476 struct il_tx_cmd *tx_cmd,
1477 struct ieee80211_tx_info *info,
1478 struct ieee80211_hdr *hdr, u8 std_id)
1480 __le16 fc = hdr->frame_control;
1481 __le32 tx_flags = tx_cmd->tx_flags;
1483 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1484 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1485 tx_flags |= TX_CMD_FLG_ACK_MSK;
1486 if (ieee80211_is_mgmt(fc))
1487 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1488 if (ieee80211_is_probe_resp(fc) &&
1489 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1490 tx_flags |= TX_CMD_FLG_TSF_MSK;
1492 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1493 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1496 if (ieee80211_is_back_req(fc))
1497 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
1499 tx_cmd->sta_id = std_id;
1500 if (ieee80211_has_morefrags(fc))
1501 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1503 if (ieee80211_is_data_qos(fc)) {
1504 u8 *qc = ieee80211_get_qos_ctl(hdr);
1505 tx_cmd->tid_tspec = qc[0] & 0xf;
1506 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
1508 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1511 il_tx_cmd_protection(il, info, fc, &tx_flags);
1513 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
1514 if (ieee80211_is_mgmt(fc)) {
1515 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
1516 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
1518 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
1520 tx_cmd->timeout.pm_frame_timeout = 0;
1523 tx_cmd->driver_txop = 0;
1524 tx_cmd->tx_flags = tx_flags;
1525 tx_cmd->next_frame_len = 0;
1529 il4965_tx_cmd_build_rate(struct il_priv *il,
1530 struct il_tx_cmd *tx_cmd,
1531 struct ieee80211_tx_info *info,
1532 struct ieee80211_sta *sta,
1535 const u8 rts_retry_limit = 60;
1538 u8 data_retry_limit;
1541 /* Set retry limit on DATA packets and Probe Responses */
1542 if (ieee80211_is_probe_resp(fc))
1543 data_retry_limit = 3;
1545 data_retry_limit = IL4965_DEFAULT_TX_RETRY;
1546 tx_cmd->data_retry_limit = data_retry_limit;
1547 /* Set retry limit on RTS packets */
1548 tx_cmd->rts_retry_limit = min(data_retry_limit, rts_retry_limit);
1550 /* DATA packets will use the uCode station table for rate/antenna
1552 if (ieee80211_is_data(fc)) {
1553 tx_cmd->initial_rate_idx = 0;
1554 tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
1559 * If the current TX rate stored in mac80211 has the MCS bit set, it's
1560 * not really a TX rate. Thus, we use the lowest supported rate for
1561 * this band. Also use the lowest supported rate if the stored rate
1564 rate_idx = info->control.rates[0].idx;
1565 if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) || rate_idx < 0
1566 || rate_idx > RATE_COUNT_LEGACY)
1567 rate_idx = rate_lowest_index(&il->bands[info->band], sta);
1568 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
1569 if (info->band == IEEE80211_BAND_5GHZ)
1570 rate_idx += IL_FIRST_OFDM_RATE;
1571 /* Get PLCP rate for tx_cmd->rate_n_flags */
1572 rate_plcp = il_rates[rate_idx].plcp;
1573 /* Zero out flags for this packet */
1576 /* Set CCK flag as needed */
1577 if (rate_idx >= IL_FIRST_CCK_RATE && rate_idx <= IL_LAST_CCK_RATE)
1578 rate_flags |= RATE_MCS_CCK_MSK;
1580 /* Set up antennas */
1581 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant);
1582 rate_flags |= BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS;
1584 /* Set the rate in the TX cmd */
1585 tx_cmd->rate_n_flags = cpu_to_le32(rate_plcp | rate_flags);
1589 il4965_tx_cmd_build_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
1590 struct il_tx_cmd *tx_cmd, struct sk_buff *skb_frag,
1593 struct ieee80211_key_conf *keyconf = info->control.hw_key;
1595 switch (keyconf->cipher) {
1596 case WLAN_CIPHER_SUITE_CCMP:
1597 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
1598 memcpy(tx_cmd->key, keyconf->key, keyconf->keylen);
1599 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1600 tx_cmd->tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
1601 D_TX("tx_cmd with AES hwcrypto\n");
1604 case WLAN_CIPHER_SUITE_TKIP:
1605 tx_cmd->sec_ctl = TX_CMD_SEC_TKIP;
1606 ieee80211_get_tkip_p2k(keyconf, skb_frag, tx_cmd->key);
1607 D_TX("tx_cmd with tkip hwcrypto\n");
1610 case WLAN_CIPHER_SUITE_WEP104:
1611 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
1613 case WLAN_CIPHER_SUITE_WEP40:
1615 (TX_CMD_SEC_WEP | (keyconf->keyidx & TX_CMD_SEC_MSK) <<
1618 memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
1620 D_TX("Configuring packet for WEP encryption " "with key %d\n",
1625 IL_ERR("Unknown encode cipher %x\n", keyconf->cipher);
1631 * start C_TX command process
1634 il4965_tx_skb(struct il_priv *il,
1635 struct ieee80211_sta *sta,
1636 struct sk_buff *skb)
1638 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1639 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1640 struct il_station_priv *sta_priv = NULL;
1641 struct il_tx_queue *txq;
1643 struct il_device_cmd *out_cmd;
1644 struct il_cmd_meta *out_meta;
1645 struct il_tx_cmd *tx_cmd;
1647 dma_addr_t phys_addr;
1648 dma_addr_t txcmd_phys;
1649 dma_addr_t scratch_phys;
1650 u16 len, firstlen, secondlen;
1655 u8 wait_write_ptr = 0;
1658 unsigned long flags;
1659 bool is_agg = false;
1661 spin_lock_irqsave(&il->lock, flags);
1662 if (il_is_rfkill(il)) {
1663 D_DROP("Dropping - RF KILL\n");
1667 fc = hdr->frame_control;
1669 #ifdef CONFIG_IWLEGACY_DEBUG
1670 if (ieee80211_is_auth(fc))
1671 D_TX("Sending AUTH frame\n");
1672 else if (ieee80211_is_assoc_req(fc))
1673 D_TX("Sending ASSOC frame\n");
1674 else if (ieee80211_is_reassoc_req(fc))
1675 D_TX("Sending REASSOC frame\n");
1678 hdr_len = ieee80211_hdrlen(fc);
1680 /* For management frames use broadcast id to do not break aggregation */
1681 if (!ieee80211_is_data(fc))
1682 sta_id = il->hw_params.bcast_id;
1684 /* Find idx into station table for destination station */
1685 sta_id = il_sta_id_or_broadcast(il, sta);
1687 if (sta_id == IL_INVALID_STATION) {
1688 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
1693 D_TX("station Id %d\n", sta_id);
1696 sta_priv = (void *)sta->drv_priv;
1698 if (sta_priv && sta_priv->asleep &&
1699 (info->flags & IEEE80211_TX_CTL_NO_PS_BUFFER)) {
1701 * This sends an asynchronous command to the device,
1702 * but we can rely on it being processed before the
1703 * next frame is processed -- and the next frame to
1704 * this station is the one that will consume this
1706 * For now set the counter to just 1 since we do not
1707 * support uAPSD yet.
1709 il4965_sta_modify_sleep_tx_count(il, sta_id, 1);
1712 /* FIXME: remove me ? */
1713 WARN_ON_ONCE(info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM);
1715 /* Access category (AC) is also the queue number */
1716 txq_id = skb_get_queue_mapping(skb);
1718 /* irqs already disabled/saved above when locking il->lock */
1719 spin_lock(&il->sta_lock);
1721 if (ieee80211_is_data_qos(fc)) {
1722 qc = ieee80211_get_qos_ctl(hdr);
1723 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
1724 if (WARN_ON_ONCE(tid >= MAX_TID_COUNT)) {
1725 spin_unlock(&il->sta_lock);
1728 seq_number = il->stations[sta_id].tid[tid].seq_number;
1729 seq_number &= IEEE80211_SCTL_SEQ;
1731 hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG);
1732 hdr->seq_ctrl |= cpu_to_le16(seq_number);
1734 /* aggregation is on for this <sta,tid> */
1735 if (info->flags & IEEE80211_TX_CTL_AMPDU &&
1736 il->stations[sta_id].tid[tid].agg.state == IL_AGG_ON) {
1737 txq_id = il->stations[sta_id].tid[tid].agg.txq_id;
1742 txq = &il->txq[txq_id];
1745 if (unlikely(il_queue_space(q) < q->high_mark)) {
1746 spin_unlock(&il->sta_lock);
1750 if (ieee80211_is_data_qos(fc)) {
1751 il->stations[sta_id].tid[tid].tfds_in_queue++;
1752 if (!ieee80211_has_morefrags(fc))
1753 il->stations[sta_id].tid[tid].seq_number = seq_number;
1756 spin_unlock(&il->sta_lock);
1758 txq->skbs[q->write_ptr] = skb;
1760 /* Set up first empty entry in queue's array of Tx/cmd buffers */
1761 out_cmd = txq->cmd[q->write_ptr];
1762 out_meta = &txq->meta[q->write_ptr];
1763 tx_cmd = &out_cmd->cmd.tx;
1764 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
1765 memset(tx_cmd, 0, sizeof(struct il_tx_cmd));
1768 * Set up the Tx-command (not MAC!) header.
1769 * Store the chosen Tx queue and TFD idx within the sequence field;
1770 * after Tx, uCode's Tx response will return this value so driver can
1771 * locate the frame within the tx queue and do post-tx processing.
1773 out_cmd->hdr.cmd = C_TX;
1774 out_cmd->hdr.sequence =
1776 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
1778 /* Copy MAC header from skb into command buffer */
1779 memcpy(tx_cmd->hdr, hdr, hdr_len);
1781 /* Total # bytes to be transmitted */
1782 len = (u16) skb->len;
1783 tx_cmd->len = cpu_to_le16(len);
1785 if (info->control.hw_key)
1786 il4965_tx_cmd_build_hwcrypto(il, info, tx_cmd, skb, sta_id);
1788 /* TODO need this for burst mode later on */
1789 il4965_tx_cmd_build_basic(il, skb, tx_cmd, info, hdr, sta_id);
1791 il4965_tx_cmd_build_rate(il, tx_cmd, info, sta, fc);
1793 il_update_stats(il, true, fc, len);
1795 * Use the first empty entry in this queue's command buffer array
1796 * to contain the Tx command and MAC header concatenated together
1797 * (payload data will be in another buffer).
1798 * Size of this varies, due to varying MAC header length.
1799 * If end is not dword aligned, we'll have 2 extra bytes at the end
1800 * of the MAC header (device reads on dword boundaries).
1801 * We'll tell device about this padding later.
1803 len = sizeof(struct il_tx_cmd) + sizeof(struct il_cmd_header) + hdr_len;
1804 firstlen = (len + 3) & ~3;
1806 /* Tell NIC about any 2-byte padding after MAC header */
1807 if (firstlen != len)
1808 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
1810 /* Physical address of this Tx command's header (not MAC header!),
1811 * within command buffer array. */
1813 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
1814 PCI_DMA_BIDIRECTIONAL);
1815 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
1816 dma_unmap_len_set(out_meta, len, firstlen);
1817 /* Add buffer containing Tx command and MAC(!) header to TFD's
1819 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
1821 if (!ieee80211_has_morefrags(hdr->frame_control)) {
1822 txq->need_update = 1;
1825 txq->need_update = 0;
1828 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1829 * if any (802.11 null frames have no payload). */
1830 secondlen = skb->len - hdr_len;
1831 if (secondlen > 0) {
1833 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
1835 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen,
1840 txcmd_phys + sizeof(struct il_cmd_header) +
1841 offsetof(struct il_tx_cmd, scratch);
1843 /* take back ownership of DMA buffer to enable update */
1844 pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen,
1845 PCI_DMA_BIDIRECTIONAL);
1846 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
1847 tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys);
1849 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
1850 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
1851 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd, sizeof(*tx_cmd));
1852 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, hdr_len);
1854 /* Set up entry for this TFD in Tx byte-count array */
1855 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1856 il->ops->txq_update_byte_cnt_tbl(il, txq, le16_to_cpu(tx_cmd->len));
1858 pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen,
1859 PCI_DMA_BIDIRECTIONAL);
1861 /* Tell device the write idx *just past* this latest filled TFD */
1862 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
1863 il_txq_update_write_ptr(il, txq);
1864 spin_unlock_irqrestore(&il->lock, flags);
1867 * At this point the frame is "transmitted" successfully
1868 * and we will get a TX status notification eventually,
1869 * regardless of the value of ret. "ret" only indicates
1870 * whether or not we should update the write pointer.
1874 * Avoid atomic ops if it isn't an associated client.
1875 * Also, if this is a packet for aggregation, don't
1876 * increase the counter because the ucode will stop
1877 * aggregation queues when their respective station
1880 if (sta_priv && sta_priv->client && !is_agg)
1881 atomic_inc(&sta_priv->pending_frames);
1883 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
1884 if (wait_write_ptr) {
1885 spin_lock_irqsave(&il->lock, flags);
1886 txq->need_update = 1;
1887 il_txq_update_write_ptr(il, txq);
1888 spin_unlock_irqrestore(&il->lock, flags);
1890 il_stop_queue(il, txq);
1897 spin_unlock_irqrestore(&il->lock, flags);
1902 il4965_alloc_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr, size_t size)
1905 dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, GFP_KERNEL);
1913 il4965_free_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr)
1915 if (unlikely(!ptr->addr))
1918 dma_free_coherent(&il->pci_dev->dev, ptr->size, ptr->addr, ptr->dma);
1919 memset(ptr, 0, sizeof(*ptr));
1923 * il4965_hw_txq_ctx_free - Free TXQ Context
1925 * Destroy all TX DMA queues and structures
1928 il4965_hw_txq_ctx_free(struct il_priv *il)
1934 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
1935 if (txq_id == il->cmd_queue)
1936 il_cmd_queue_free(il);
1938 il_tx_queue_free(il, txq_id);
1940 il4965_free_dma_ptr(il, &il->kw);
1942 il4965_free_dma_ptr(il, &il->scd_bc_tbls);
1944 /* free tx queue structure */
1945 il_free_txq_mem(il);
1949 * il4965_txq_ctx_alloc - allocate TX queue context
1950 * Allocate all Tx DMA structures and initialize them
1953 * @return error code
1956 il4965_txq_ctx_alloc(struct il_priv *il)
1959 unsigned long flags;
1961 /* Free all tx/cmd queues and keep-warm buffer */
1962 il4965_hw_txq_ctx_free(il);
1965 il4965_alloc_dma_ptr(il, &il->scd_bc_tbls,
1966 il->hw_params.scd_bc_tbls_size);
1968 IL_ERR("Scheduler BC Table allocation failed\n");
1971 /* Alloc keep-warm buffer */
1972 ret = il4965_alloc_dma_ptr(il, &il->kw, IL_KW_SIZE);
1974 IL_ERR("Keep Warm allocation failed\n");
1978 /* allocate tx queue structure */
1979 ret = il_alloc_txq_mem(il);
1983 spin_lock_irqsave(&il->lock, flags);
1985 /* Turn off all Tx DMA fifos */
1986 il4965_txq_set_sched(il, 0);
1988 /* Tell NIC where to find the "keep warm" buffer */
1989 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4);
1991 spin_unlock_irqrestore(&il->lock, flags);
1993 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
1994 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
1995 ret = il_tx_queue_init(il, txq_id);
1997 IL_ERR("Tx %d queue init failed\n", txq_id);
2005 il4965_hw_txq_ctx_free(il);
2006 il4965_free_dma_ptr(il, &il->kw);
2008 il4965_free_dma_ptr(il, &il->scd_bc_tbls);
2014 il4965_txq_ctx_reset(struct il_priv *il)
2017 unsigned long flags;
2019 spin_lock_irqsave(&il->lock, flags);
2021 /* Turn off all Tx DMA fifos */
2022 il4965_txq_set_sched(il, 0);
2023 /* Tell NIC where to find the "keep warm" buffer */
2024 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4);
2026 spin_unlock_irqrestore(&il->lock, flags);
2028 /* Alloc and init all Tx queues, including the command queue (#4) */
2029 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2030 il_tx_queue_reset(il, txq_id);
2034 il4965_txq_ctx_unmap(struct il_priv *il)
2041 /* Unmap DMA from host system and free skb's */
2042 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2043 if (txq_id == il->cmd_queue)
2044 il_cmd_queue_unmap(il);
2046 il_tx_queue_unmap(il, txq_id);
2050 * il4965_txq_ctx_stop - Stop all Tx DMA channels
2053 il4965_txq_ctx_stop(struct il_priv *il)
2057 _il_wr_prph(il, IL49_SCD_TXFACT, 0);
2059 /* Stop each Tx DMA channel, and wait for it to be idle */
2060 for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) {
2061 _il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
2063 _il_poll_bit(il, FH49_TSSR_TX_STATUS_REG,
2064 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
2065 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
2068 IL_ERR("Timeout stopping DMA channel %d [0x%08x]",
2069 ch, _il_rd(il, FH49_TSSR_TX_STATUS_REG));
2074 * Find first available (lowest unused) Tx Queue, mark it "active".
2075 * Called only when finding queue for aggregation.
2076 * Should never return anything < 7, because they should already
2077 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
2080 il4965_txq_ctx_activate_free(struct il_priv *il)
2084 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2085 if (!test_and_set_bit(txq_id, &il->txq_ctx_active_msk))
2091 * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2094 il4965_tx_queue_stop_scheduler(struct il_priv *il, u16 txq_id)
2096 /* Simply stop the queue, but don't change any configuration;
2097 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2098 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
2099 (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
2100 (1 << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2104 * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2107 il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, u16 txq_id)
2113 scd_q2ratid = ra_tid & IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
2116 il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
2118 tbl_dw = il_read_targ_mem(il, tbl_dw_addr);
2121 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
2123 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
2125 il_write_targ_mem(il, tbl_dw_addr, tbl_dw);
2131 * il4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2133 * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE,
2134 * i.e. it must be one of the higher queues used for aggregation
2137 il4965_txq_agg_enable(struct il_priv *il, int txq_id, int tx_fifo, int sta_id,
2138 int tid, u16 ssn_idx)
2140 unsigned long flags;
2144 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2145 (IL49_FIRST_AMPDU_QUEUE +
2146 il->cfg->num_of_ampdu_queues <= txq_id)) {
2147 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2148 txq_id, IL49_FIRST_AMPDU_QUEUE,
2149 IL49_FIRST_AMPDU_QUEUE +
2150 il->cfg->num_of_ampdu_queues - 1);
2154 ra_tid = BUILD_RAxTID(sta_id, tid);
2156 /* Modify device's station table to Tx this TID */
2157 ret = il4965_sta_tx_modify_enable_tid(il, sta_id, tid);
2161 spin_lock_irqsave(&il->lock, flags);
2163 /* Stop this Tx queue before configuring it */
2164 il4965_tx_queue_stop_scheduler(il, txq_id);
2166 /* Map receiver-address / traffic-ID to this queue */
2167 il4965_tx_queue_set_q2ratid(il, ra_tid, txq_id);
2169 /* Set this queue as a chain-building queue */
2170 il_set_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2172 /* Place first TFD at idx corresponding to start sequence number.
2173 * Assumes that ssn_idx is valid (!= 0xFFF) */
2174 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2175 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2176 il4965_set_wr_ptrs(il, txq_id, ssn_idx);
2178 /* Set up Tx win size and frame limit for this queue */
2179 il_write_targ_mem(il,
2181 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2182 (SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS)
2183 & IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2185 il_write_targ_mem(il,
2187 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2189 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
2190 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2192 il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2194 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2195 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 1);
2197 spin_unlock_irqrestore(&il->lock, flags);
2203 il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2204 struct ieee80211_sta *sta, u16 tid, u16 * ssn)
2210 unsigned long flags;
2211 struct il_tid_data *tid_data;
2213 /* FIXME: warning if tx fifo not found ? */
2214 tx_fifo = il4965_get_fifo_from_tid(tid);
2215 if (unlikely(tx_fifo < 0))
2218 D_HT("%s on ra = %pM tid = %d\n", __func__, sta->addr, tid);
2220 sta_id = il_sta_id(sta);
2221 if (sta_id == IL_INVALID_STATION) {
2222 IL_ERR("Start AGG on invalid station\n");
2225 if (unlikely(tid >= MAX_TID_COUNT))
2228 if (il->stations[sta_id].tid[tid].agg.state != IL_AGG_OFF) {
2229 IL_ERR("Start AGG when state is not IL_AGG_OFF !\n");
2233 txq_id = il4965_txq_ctx_activate_free(il);
2235 IL_ERR("No free aggregation queue available\n");
2239 spin_lock_irqsave(&il->sta_lock, flags);
2240 tid_data = &il->stations[sta_id].tid[tid];
2241 *ssn = SEQ_TO_SN(tid_data->seq_number);
2242 tid_data->agg.txq_id = txq_id;
2243 il_set_swq_id(&il->txq[txq_id], il4965_get_ac_from_tid(tid), txq_id);
2244 spin_unlock_irqrestore(&il->sta_lock, flags);
2246 ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, sta_id, tid, *ssn);
2250 spin_lock_irqsave(&il->sta_lock, flags);
2251 tid_data = &il->stations[sta_id].tid[tid];
2252 if (tid_data->tfds_in_queue == 0) {
2253 D_HT("HW queue is empty\n");
2254 tid_data->agg.state = IL_AGG_ON;
2255 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2257 D_HT("HW queue is NOT empty: %d packets in HW queue\n",
2258 tid_data->tfds_in_queue);
2259 tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA;
2261 spin_unlock_irqrestore(&il->sta_lock, flags);
2266 * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE
2267 * il->lock must be held by the caller
2270 il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, u16 ssn_idx, u8 tx_fifo)
2272 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2273 (IL49_FIRST_AMPDU_QUEUE +
2274 il->cfg->num_of_ampdu_queues <= txq_id)) {
2275 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2276 txq_id, IL49_FIRST_AMPDU_QUEUE,
2277 IL49_FIRST_AMPDU_QUEUE +
2278 il->cfg->num_of_ampdu_queues - 1);
2282 il4965_tx_queue_stop_scheduler(il, txq_id);
2284 il_clear_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2286 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2287 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2288 /* supposes that ssn_idx is valid (!= 0xFFF) */
2289 il4965_set_wr_ptrs(il, txq_id, ssn_idx);
2291 il_clear_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2292 il_txq_ctx_deactivate(il, txq_id);
2293 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0);
2299 il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif,
2300 struct ieee80211_sta *sta, u16 tid)
2302 int tx_fifo_id, txq_id, sta_id, ssn;
2303 struct il_tid_data *tid_data;
2304 int write_ptr, read_ptr;
2305 unsigned long flags;
2307 /* FIXME: warning if tx_fifo_id not found ? */
2308 tx_fifo_id = il4965_get_fifo_from_tid(tid);
2309 if (unlikely(tx_fifo_id < 0))
2312 sta_id = il_sta_id(sta);
2314 if (sta_id == IL_INVALID_STATION) {
2315 IL_ERR("Invalid station for AGG tid %d\n", tid);
2319 spin_lock_irqsave(&il->sta_lock, flags);
2321 tid_data = &il->stations[sta_id].tid[tid];
2322 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
2323 txq_id = tid_data->agg.txq_id;
2325 switch (il->stations[sta_id].tid[tid].agg.state) {
2326 case IL_EMPTYING_HW_QUEUE_ADDBA:
2328 * This can happen if the peer stops aggregation
2329 * again before we've had a chance to drain the
2330 * queue we selected previously, i.e. before the
2331 * session was really started completely.
2333 D_HT("AGG stop before setup done\n");
2338 IL_WARN("Stopping AGG while state not ON or starting\n");
2341 write_ptr = il->txq[txq_id].q.write_ptr;
2342 read_ptr = il->txq[txq_id].q.read_ptr;
2344 /* The queue is not empty */
2345 if (write_ptr != read_ptr) {
2346 D_HT("Stopping a non empty AGG HW QUEUE\n");
2347 il->stations[sta_id].tid[tid].agg.state =
2348 IL_EMPTYING_HW_QUEUE_DELBA;
2349 spin_unlock_irqrestore(&il->sta_lock, flags);
2353 D_HT("HW queue is empty\n");
2355 il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF;
2357 /* do not restore/save irqs */
2358 spin_unlock(&il->sta_lock);
2359 spin_lock(&il->lock);
2362 * the only reason this call can fail is queue number out of range,
2363 * which can happen if uCode is reloaded and all the station
2364 * information are lost. if it is outside the range, there is no need
2365 * to deactivate the uCode queue, just return "success" to allow
2366 * mac80211 to clean up it own data.
2368 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo_id);
2369 spin_unlock_irqrestore(&il->lock, flags);
2371 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2377 il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id)
2379 struct il_queue *q = &il->txq[txq_id].q;
2380 u8 *addr = il->stations[sta_id].sta.sta.addr;
2381 struct il_tid_data *tid_data = &il->stations[sta_id].tid[tid];
2383 lockdep_assert_held(&il->sta_lock);
2385 switch (il->stations[sta_id].tid[tid].agg.state) {
2386 case IL_EMPTYING_HW_QUEUE_DELBA:
2387 /* We are reclaiming the last packet of the */
2388 /* aggregated HW queue */
2389 if (txq_id == tid_data->agg.txq_id &&
2390 q->read_ptr == q->write_ptr) {
2391 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
2392 int tx_fifo = il4965_get_fifo_from_tid(tid);
2393 D_HT("HW queue empty: continue DELBA flow\n");
2394 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo);
2395 tid_data->agg.state = IL_AGG_OFF;
2396 ieee80211_stop_tx_ba_cb_irqsafe(il->vif, addr, tid);
2399 case IL_EMPTYING_HW_QUEUE_ADDBA:
2400 /* We are reclaiming the last packet of the queue */
2401 if (tid_data->tfds_in_queue == 0) {
2402 D_HT("HW queue empty: continue ADDBA flow\n");
2403 tid_data->agg.state = IL_AGG_ON;
2404 ieee80211_start_tx_ba_cb_irqsafe(il->vif, addr, tid);
2413 il4965_non_agg_tx_status(struct il_priv *il, const u8 *addr1)
2415 struct ieee80211_sta *sta;
2416 struct il_station_priv *sta_priv;
2419 sta = ieee80211_find_sta(il->vif, addr1);
2421 sta_priv = (void *)sta->drv_priv;
2422 /* avoid atomic ops if this isn't a client */
2423 if (sta_priv->client &&
2424 atomic_dec_return(&sta_priv->pending_frames) == 0)
2425 ieee80211_sta_block_awake(il->hw, sta, false);
2431 il4965_tx_status(struct il_priv *il, struct sk_buff *skb, bool is_agg)
2433 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2436 il4965_non_agg_tx_status(il, hdr->addr1);
2438 ieee80211_tx_status_irqsafe(il->hw, skb);
2442 il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
2444 struct il_tx_queue *txq = &il->txq[txq_id];
2445 struct il_queue *q = &txq->q;
2447 struct ieee80211_hdr *hdr;
2448 struct sk_buff *skb;
2450 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
2451 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
2452 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
2453 q->write_ptr, q->read_ptr);
2457 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
2458 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
2460 skb = txq->skbs[txq->q.read_ptr];
2462 if (WARN_ON_ONCE(skb == NULL))
2465 hdr = (struct ieee80211_hdr *) skb->data;
2466 if (ieee80211_is_data_qos(hdr->frame_control))
2469 il4965_tx_status(il, skb, txq_id >= IL4965_FIRST_AMPDU_QUEUE);
2471 txq->skbs[txq->q.read_ptr] = NULL;
2472 il->ops->txq_free_tfd(il, txq);
2478 * il4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2480 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2481 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2484 il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg,
2485 struct il_compressed_ba_resp *ba_resp)
2488 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2489 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2491 struct ieee80211_tx_info *info;
2492 u64 bitmap, sent_bitmap;
2494 if (unlikely(!agg->wait_for_ba)) {
2495 if (unlikely(ba_resp->bitmap))
2496 IL_ERR("Received BA when not expected\n");
2500 /* Mark that the expected block-ack response arrived */
2501 agg->wait_for_ba = 0;
2502 D_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2504 /* Calculate shift to align block-ack bits with our Tx win bits */
2505 sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4);
2506 if (sh < 0) /* tbw something is wrong with indices */
2509 if (agg->frame_count > (64 - sh)) {
2510 D_TX_REPLY("more frames than bitmap size");
2514 /* don't use 64-bit values for now */
2515 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
2517 /* check for success or failure according to the
2518 * transmitted bitmap and block-ack bitmap */
2519 sent_bitmap = bitmap & agg->bitmap;
2521 /* For each frame attempted in aggregation,
2522 * update driver's record of tx frame's status. */
2524 while (sent_bitmap) {
2525 ack = sent_bitmap & 1ULL;
2527 D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", ack ? "ACK" : "NACK",
2528 i, (agg->start_idx + i) & 0xff, agg->start_idx + i);
2533 D_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2535 info = IEEE80211_SKB_CB(il->txq[scd_flow].skbs[agg->start_idx]);
2536 memset(&info->status, 0, sizeof(info->status));
2537 info->flags |= IEEE80211_TX_STAT_ACK;
2538 info->flags |= IEEE80211_TX_STAT_AMPDU;
2539 info->status.ampdu_ack_len = successes;
2540 info->status.ampdu_len = agg->frame_count;
2541 il4965_hwrate_to_tx_control(il, agg->rate_n_flags, info);
2547 il4965_is_tx_success(u32 status)
2549 status &= TX_STATUS_MSK;
2550 return (status == TX_STATUS_SUCCESS || status == TX_STATUS_DIRECT_DONE);
2554 il4965_find_station(struct il_priv *il, const u8 *addr)
2558 int ret = IL_INVALID_STATION;
2559 unsigned long flags;
2561 if (il->iw_mode == NL80211_IFTYPE_ADHOC)
2564 if (is_broadcast_ether_addr(addr))
2565 return il->hw_params.bcast_id;
2567 spin_lock_irqsave(&il->sta_lock, flags);
2568 for (i = start; i < il->hw_params.max_stations; i++)
2569 if (il->stations[i].used &&
2570 ether_addr_equal(il->stations[i].sta.sta.addr, addr)) {
2575 D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations);
2579 * It may be possible that more commands interacting with stations
2580 * arrive before we completed processing the adding of
2583 if (ret != IL_INVALID_STATION &&
2584 (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
2585 ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
2586 (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
2587 IL_ERR("Requested station info for sta %d before ready.\n",
2589 ret = IL_INVALID_STATION;
2591 spin_unlock_irqrestore(&il->sta_lock, flags);
2596 il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2598 if (il->iw_mode == NL80211_IFTYPE_STATION)
2601 u8 *da = ieee80211_get_DA(hdr);
2603 return il4965_find_station(il, da);
2608 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
2610 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2614 il4965_tx_status_to_mac80211(u32 status)
2616 status &= TX_STATUS_MSK;
2619 case TX_STATUS_SUCCESS:
2620 case TX_STATUS_DIRECT_DONE:
2621 return IEEE80211_TX_STAT_ACK;
2622 case TX_STATUS_FAIL_DEST_PS:
2623 return IEEE80211_TX_STAT_TX_FILTERED;
2630 * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2633 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg,
2634 struct il4965_tx_resp *tx_resp, int txq_id,
2638 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2639 struct ieee80211_tx_info *info = NULL;
2640 struct ieee80211_hdr *hdr = NULL;
2641 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2644 if (agg->wait_for_ba)
2645 D_TX_REPLY("got tx response w/o block-ack\n");
2647 agg->frame_count = tx_resp->frame_count;
2648 agg->start_idx = start_idx;
2649 agg->rate_n_flags = rate_n_flags;
2652 /* num frames attempted by Tx command */
2653 if (agg->frame_count == 1) {
2654 /* Only one frame was attempted; no block-ack will arrive */
2655 status = le16_to_cpu(frame_status[0].status);
2658 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2659 agg->frame_count, agg->start_idx, idx);
2661 info = IEEE80211_SKB_CB(il->txq[txq_id].skbs[idx]);
2662 info->status.rates[0].count = tx_resp->failure_frame + 1;
2663 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2664 info->flags |= il4965_tx_status_to_mac80211(status);
2665 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
2667 D_TX_REPLY("1 Frame 0x%x failure :%d\n", status & 0xff,
2668 tx_resp->failure_frame);
2669 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2671 agg->wait_for_ba = 0;
2673 /* Two or more frames were attempted; expect block-ack */
2675 int start = agg->start_idx;
2676 struct sk_buff *skb;
2678 /* Construct bit-map of pending frames within Tx win */
2679 for (i = 0; i < agg->frame_count; i++) {
2681 status = le16_to_cpu(frame_status[i].status);
2682 seq = le16_to_cpu(frame_status[i].sequence);
2683 idx = SEQ_TO_IDX(seq);
2684 txq_id = SEQ_TO_QUEUE(seq);
2687 (AGG_TX_STATE_FEW_BYTES_MSK |
2688 AGG_TX_STATE_ABORT_MSK))
2691 D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2692 agg->frame_count, txq_id, idx);
2694 skb = il->txq[txq_id].skbs[idx];
2695 if (WARN_ON_ONCE(skb == NULL))
2697 hdr = (struct ieee80211_hdr *) skb->data;
2699 sc = le16_to_cpu(hdr->seq_ctrl);
2700 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2701 IL_ERR("BUG_ON idx doesn't match seq control"
2702 " idx=%d, seq_idx=%d, seq=%d\n", idx,
2703 SEQ_TO_SN(sc), hdr->seq_ctrl);
2707 D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i, idx,
2712 sh = (start - idx) + 0xff;
2713 bitmap = bitmap << sh;
2716 } else if (sh < -64)
2717 sh = 0xff - (start - idx);
2721 bitmap = bitmap << sh;
2724 bitmap |= 1ULL << sh;
2725 D_TX_REPLY("start=%d bitmap=0x%llx\n", start,
2726 (unsigned long long)bitmap);
2729 agg->bitmap = bitmap;
2730 agg->start_idx = start;
2731 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2732 agg->frame_count, agg->start_idx,
2733 (unsigned long long)agg->bitmap);
2736 agg->wait_for_ba = 1;
2742 * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2745 il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
2747 struct il_rx_pkt *pkt = rxb_addr(rxb);
2748 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2749 int txq_id = SEQ_TO_QUEUE(sequence);
2750 int idx = SEQ_TO_IDX(sequence);
2751 struct il_tx_queue *txq = &il->txq[txq_id];
2752 struct sk_buff *skb;
2753 struct ieee80211_hdr *hdr;
2754 struct ieee80211_tx_info *info;
2755 struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2756 u32 status = le32_to_cpu(tx_resp->u.status);
2757 int uninitialized_var(tid);
2761 unsigned long flags;
2763 if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2764 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2765 "is out of range [0-%d] %d %d\n", txq_id, idx,
2766 txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr);
2770 txq->time_stamp = jiffies;
2772 skb = txq->skbs[txq->q.read_ptr];
2773 info = IEEE80211_SKB_CB(skb);
2774 memset(&info->status, 0, sizeof(info->status));
2776 hdr = (struct ieee80211_hdr *) skb->data;
2777 if (ieee80211_is_data_qos(hdr->frame_control)) {
2778 qc = ieee80211_get_qos_ctl(hdr);
2782 sta_id = il4965_get_ra_sta_id(il, hdr);
2783 if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2784 IL_ERR("Station not known\n");
2788 spin_lock_irqsave(&il->sta_lock, flags);
2789 if (txq->sched_retry) {
2790 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2791 struct il_ht_agg *agg = NULL;
2794 agg = &il->stations[sta_id].tid[tid].agg;
2796 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2798 /* check if BAR is needed */
2799 if (tx_resp->frame_count == 1 &&
2800 !il4965_is_tx_success(status))
2801 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2803 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2804 idx = il_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2805 D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2806 "%d idx %d\n", scd_ssn, idx);
2807 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2809 il4965_free_tfds_in_queue(il, sta_id, tid,
2812 if (il->mac80211_registered &&
2813 il_queue_space(&txq->q) > txq->q.low_mark &&
2814 agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2815 il_wake_queue(il, txq);
2818 info->status.rates[0].count = tx_resp->failure_frame + 1;
2819 info->flags |= il4965_tx_status_to_mac80211(status);
2820 il4965_hwrate_to_tx_control(il,
2821 le32_to_cpu(tx_resp->rate_n_flags),
2824 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2825 "rate_n_flags 0x%x retries %d\n", txq_id,
2826 il4965_get_tx_fail_reason(status), status,
2827 le32_to_cpu(tx_resp->rate_n_flags),
2828 tx_resp->failure_frame);
2830 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2831 if (qc && likely(sta_id != IL_INVALID_STATION))
2832 il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2833 else if (sta_id == IL_INVALID_STATION)
2834 D_TX_REPLY("Station not known\n");
2836 if (il->mac80211_registered &&
2837 il_queue_space(&txq->q) > txq->q.low_mark)
2838 il_wake_queue(il, txq);
2840 if (qc && likely(sta_id != IL_INVALID_STATION))
2841 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2843 il4965_check_abort_status(il, tx_resp->frame_count, status);
2845 spin_unlock_irqrestore(&il->sta_lock, flags);
2849 * translate ucode response to mac80211 tx status control values
2852 il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags,
2853 struct ieee80211_tx_info *info)
2855 struct ieee80211_tx_rate *r = &info->status.rates[0];
2857 info->status.antenna =
2858 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
2859 if (rate_n_flags & RATE_MCS_HT_MSK)
2860 r->flags |= IEEE80211_TX_RC_MCS;
2861 if (rate_n_flags & RATE_MCS_GF_MSK)
2862 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
2863 if (rate_n_flags & RATE_MCS_HT40_MSK)
2864 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
2865 if (rate_n_flags & RATE_MCS_DUP_MSK)
2866 r->flags |= IEEE80211_TX_RC_DUP_DATA;
2867 if (rate_n_flags & RATE_MCS_SGI_MSK)
2868 r->flags |= IEEE80211_TX_RC_SHORT_GI;
2869 r->idx = il4965_hwrate_to_mac80211_idx(rate_n_flags, info->band);
2873 * il4965_hdl_compressed_ba - Handler for N_COMPRESSED_BA
2875 * Handles block-acknowledge notification from device, which reports success
2876 * of frames sent via aggregation.
2879 il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb)
2881 struct il_rx_pkt *pkt = rxb_addr(rxb);
2882 struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
2883 struct il_tx_queue *txq = NULL;
2884 struct il_ht_agg *agg;
2888 unsigned long flags;
2890 /* "flow" corresponds to Tx queue */
2891 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2893 /* "ssn" is start of block-ack Tx win, corresponds to idx
2894 * (in Tx queue's circular buffer) of first TFD/frame in win */
2895 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
2897 if (scd_flow >= il->hw_params.max_txq_num) {
2898 IL_ERR("BUG_ON scd_flow is bigger than number of queues\n");
2902 txq = &il->txq[scd_flow];
2903 sta_id = ba_resp->sta_id;
2905 agg = &il->stations[sta_id].tid[tid].agg;
2906 if (unlikely(agg->txq_id != scd_flow)) {
2908 * FIXME: this is a uCode bug which need to be addressed,
2909 * log the information and return for now!
2910 * since it is possible happen very often and in order
2911 * not to fill the syslog, don't enable the logging by default
2913 D_TX_REPLY("BA scd_flow %d does not match txq_id %d\n",
2914 scd_flow, agg->txq_id);
2918 /* Find idx just before block-ack win */
2919 idx = il_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
2921 spin_lock_irqsave(&il->sta_lock, flags);
2923 D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " "sta_id = %d\n",
2924 agg->wait_for_ba, (u8 *) &ba_resp->sta_addr_lo32,
2926 D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," "scd_flow = "
2927 "%d, scd_ssn = %d\n", ba_resp->tid, ba_resp->seq_ctl,
2928 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
2929 ba_resp->scd_flow, ba_resp->scd_ssn);
2930 D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg->start_idx,
2931 (unsigned long long)agg->bitmap);
2933 /* Update driver's record of ACK vs. not for each frame in win */
2934 il4965_tx_status_reply_compressed_ba(il, agg, ba_resp);
2936 /* Release all TFDs before the SSN, i.e. all TFDs in front of
2937 * block-ack win (we assume that they've been successfully
2938 * transmitted ... if not, it's too late anyway). */
2939 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
2940 /* calculate mac80211 ampdu sw queue to wake */
2941 int freed = il4965_tx_queue_reclaim(il, scd_flow, idx);
2942 il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2944 if (il_queue_space(&txq->q) > txq->q.low_mark &&
2945 il->mac80211_registered &&
2946 agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2947 il_wake_queue(il, txq);
2949 il4965_txq_check_empty(il, sta_id, tid, scd_flow);
2952 spin_unlock_irqrestore(&il->sta_lock, flags);
2955 #ifdef CONFIG_IWLEGACY_DEBUG
2957 il4965_get_tx_fail_reason(u32 status)
2959 #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
2960 #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
2962 switch (status & TX_STATUS_MSK) {
2963 case TX_STATUS_SUCCESS:
2965 TX_STATUS_POSTPONE(DELAY);
2966 TX_STATUS_POSTPONE(FEW_BYTES);
2967 TX_STATUS_POSTPONE(QUIET_PERIOD);
2968 TX_STATUS_POSTPONE(CALC_TTAK);
2969 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY);
2970 TX_STATUS_FAIL(SHORT_LIMIT);
2971 TX_STATUS_FAIL(LONG_LIMIT);
2972 TX_STATUS_FAIL(FIFO_UNDERRUN);
2973 TX_STATUS_FAIL(DRAIN_FLOW);
2974 TX_STATUS_FAIL(RFKILL_FLUSH);
2975 TX_STATUS_FAIL(LIFE_EXPIRE);
2976 TX_STATUS_FAIL(DEST_PS);
2977 TX_STATUS_FAIL(HOST_ABORTED);
2978 TX_STATUS_FAIL(BT_RETRY);
2979 TX_STATUS_FAIL(STA_INVALID);
2980 TX_STATUS_FAIL(FRAG_DROPPED);
2981 TX_STATUS_FAIL(TID_DISABLE);
2982 TX_STATUS_FAIL(FIFO_FLUSHED);
2983 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL);
2984 TX_STATUS_FAIL(PASSIVE_NO_RX);
2985 TX_STATUS_FAIL(NO_BEACON_ON_RADAR);
2990 #undef TX_STATUS_FAIL
2991 #undef TX_STATUS_POSTPONE
2993 #endif /* CONFIG_IWLEGACY_DEBUG */
2995 static struct il_link_quality_cmd *
2996 il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id)
2999 struct il_link_quality_cmd *link_cmd;
3001 __le32 rate_n_flags;
3003 link_cmd = kzalloc(sizeof(struct il_link_quality_cmd), GFP_KERNEL);
3005 IL_ERR("Unable to allocate memory for LQ cmd.\n");
3008 /* Set up the rate scaling to start at selected rate, fall back
3009 * all the way down to 1M in IEEE order, and then spin on 1M */
3010 if (il->band == IEEE80211_BAND_5GHZ)
3015 if (r >= IL_FIRST_CCK_RATE && r <= IL_LAST_CCK_RATE)
3016 rate_flags |= RATE_MCS_CCK_MSK;
3019 il4965_first_antenna(il->hw_params.
3020 valid_tx_ant) << RATE_MCS_ANT_POS;
3021 rate_n_flags = cpu_to_le32(il_rates[r].plcp | rate_flags);
3022 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
3023 link_cmd->rs_table[i].rate_n_flags = rate_n_flags;
3025 link_cmd->general_params.single_stream_ant_msk =
3026 il4965_first_antenna(il->hw_params.valid_tx_ant);
3028 link_cmd->general_params.dual_stream_ant_msk =
3029 il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params.
3031 if (!link_cmd->general_params.dual_stream_ant_msk) {
3032 link_cmd->general_params.dual_stream_ant_msk = ANT_AB;
3033 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) {
3034 link_cmd->general_params.dual_stream_ant_msk =
3035 il->hw_params.valid_tx_ant;
3038 link_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
3039 link_cmd->agg_params.agg_time_limit =
3040 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
3042 link_cmd->sta_id = sta_id;
3048 * il4965_add_bssid_station - Add the special IBSS BSSID station
3053 il4965_add_bssid_station(struct il_priv *il, const u8 *addr, u8 *sta_id_r)
3057 struct il_link_quality_cmd *link_cmd;
3058 unsigned long flags;
3061 *sta_id_r = IL_INVALID_STATION;
3063 ret = il_add_station_common(il, addr, 0, NULL, &sta_id);
3065 IL_ERR("Unable to add station %pM\n", addr);
3072 spin_lock_irqsave(&il->sta_lock, flags);
3073 il->stations[sta_id].used |= IL_STA_LOCAL;
3074 spin_unlock_irqrestore(&il->sta_lock, flags);
3076 /* Set up default rate scaling table in device's station table */
3077 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3079 IL_ERR("Unable to initialize rate scaling for station %pM.\n",
3084 ret = il_send_lq_cmd(il, link_cmd, CMD_SYNC, true);
3086 IL_ERR("Link quality command failed (%d)\n", ret);
3088 spin_lock_irqsave(&il->sta_lock, flags);
3089 il->stations[sta_id].lq = link_cmd;
3090 spin_unlock_irqrestore(&il->sta_lock, flags);
3096 il4965_static_wepkey_cmd(struct il_priv *il, bool send_if_empty)
3099 u8 buff[sizeof(struct il_wep_cmd) +
3100 sizeof(struct il_wep_key) * WEP_KEYS_MAX];
3101 struct il_wep_cmd *wep_cmd = (struct il_wep_cmd *)buff;
3102 size_t cmd_size = sizeof(struct il_wep_cmd);
3103 struct il_host_cmd cmd = {
3108 bool not_empty = false;
3113 cmd_size + (sizeof(struct il_wep_key) * WEP_KEYS_MAX));
3115 for (i = 0; i < WEP_KEYS_MAX; i++) {
3116 u8 key_size = il->_4965.wep_keys[i].key_size;
3118 wep_cmd->key[i].key_idx = i;
3120 wep_cmd->key[i].key_offset = i;
3123 wep_cmd->key[i].key_offset = WEP_INVALID_OFFSET;
3125 wep_cmd->key[i].key_size = key_size;
3126 memcpy(&wep_cmd->key[i].key[3], il->_4965.wep_keys[i].key, key_size);
3129 wep_cmd->global_key_type = WEP_KEY_WEP_TYPE;
3130 wep_cmd->num_keys = WEP_KEYS_MAX;
3132 cmd_size += sizeof(struct il_wep_key) * WEP_KEYS_MAX;
3135 if (not_empty || send_if_empty)
3136 return il_send_cmd(il, &cmd);
3142 il4965_restore_default_wep_keys(struct il_priv *il)
3144 lockdep_assert_held(&il->mutex);
3146 return il4965_static_wepkey_cmd(il, false);
3150 il4965_remove_default_wep_key(struct il_priv *il,
3151 struct ieee80211_key_conf *keyconf)
3154 int idx = keyconf->keyidx;
3156 lockdep_assert_held(&il->mutex);
3158 D_WEP("Removing default WEP key: idx=%d\n", idx);
3160 memset(&il->_4965.wep_keys[idx], 0, sizeof(struct il_wep_key));
3161 if (il_is_rfkill(il)) {
3162 D_WEP("Not sending C_WEPKEY command due to RFKILL.\n");
3163 /* but keys in device are clear anyway so return success */
3166 ret = il4965_static_wepkey_cmd(il, 1);
3167 D_WEP("Remove default WEP key: idx=%d ret=%d\n", idx, ret);
3173 il4965_set_default_wep_key(struct il_priv *il,
3174 struct ieee80211_key_conf *keyconf)
3177 int len = keyconf->keylen;
3178 int idx = keyconf->keyidx;
3180 lockdep_assert_held(&il->mutex);
3182 if (len != WEP_KEY_LEN_128 && len != WEP_KEY_LEN_64) {
3183 D_WEP("Bad WEP key length %d\n", keyconf->keylen);
3187 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV;
3188 keyconf->hw_key_idx = HW_KEY_DEFAULT;
3189 il->stations[IL_AP_ID].keyinfo.cipher = keyconf->cipher;
3191 il->_4965.wep_keys[idx].key_size = len;
3192 memcpy(&il->_4965.wep_keys[idx].key, &keyconf->key, len);
3194 ret = il4965_static_wepkey_cmd(il, false);
3196 D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", len, idx, ret);
3201 il4965_set_wep_dynamic_key_info(struct il_priv *il,
3202 struct ieee80211_key_conf *keyconf, u8 sta_id)
3204 unsigned long flags;
3205 __le16 key_flags = 0;
3206 struct il_addsta_cmd sta_cmd;
3208 lockdep_assert_held(&il->mutex);
3210 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV;
3212 key_flags |= (STA_KEY_FLG_WEP | STA_KEY_FLG_MAP_KEY_MSK);
3213 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3214 key_flags &= ~STA_KEY_FLG_INVALID;
3216 if (keyconf->keylen == WEP_KEY_LEN_128)
3217 key_flags |= STA_KEY_FLG_KEY_SIZE_MSK;
3219 if (sta_id == il->hw_params.bcast_id)
3220 key_flags |= STA_KEY_MULTICAST_MSK;
3222 spin_lock_irqsave(&il->sta_lock, flags);
3224 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3225 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
3226 il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx;
3228 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
3230 memcpy(&il->stations[sta_id].sta.key.key[3], keyconf->key,
3233 if ((il->stations[sta_id].sta.key.
3234 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3235 il->stations[sta_id].sta.key.key_offset =
3236 il_get_free_ucode_key_idx(il);
3237 /* else, we are overriding an existing key => no need to allocated room
3240 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3241 "no space for a new key");
3243 il->stations[sta_id].sta.key.key_flags = key_flags;
3244 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3245 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3247 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3248 sizeof(struct il_addsta_cmd));
3249 spin_unlock_irqrestore(&il->sta_lock, flags);
3251 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3255 il4965_set_ccmp_dynamic_key_info(struct il_priv *il,
3256 struct ieee80211_key_conf *keyconf, u8 sta_id)
3258 unsigned long flags;
3259 __le16 key_flags = 0;
3260 struct il_addsta_cmd sta_cmd;
3262 lockdep_assert_held(&il->mutex);
3264 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
3265 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3266 key_flags &= ~STA_KEY_FLG_INVALID;
3268 if (sta_id == il->hw_params.bcast_id)
3269 key_flags |= STA_KEY_MULTICAST_MSK;
3271 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3273 spin_lock_irqsave(&il->sta_lock, flags);
3274 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3275 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
3277 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
3279 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
3281 if ((il->stations[sta_id].sta.key.
3282 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3283 il->stations[sta_id].sta.key.key_offset =
3284 il_get_free_ucode_key_idx(il);
3285 /* else, we are overriding an existing key => no need to allocated room
3288 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3289 "no space for a new key");
3291 il->stations[sta_id].sta.key.key_flags = key_flags;
3292 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3293 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3295 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3296 sizeof(struct il_addsta_cmd));
3297 spin_unlock_irqrestore(&il->sta_lock, flags);
3299 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3303 il4965_set_tkip_dynamic_key_info(struct il_priv *il,
3304 struct ieee80211_key_conf *keyconf, u8 sta_id)
3306 unsigned long flags;
3308 __le16 key_flags = 0;
3310 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3311 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3312 key_flags &= ~STA_KEY_FLG_INVALID;
3314 if (sta_id == il->hw_params.bcast_id)
3315 key_flags |= STA_KEY_MULTICAST_MSK;
3317 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3318 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
3320 spin_lock_irqsave(&il->sta_lock, flags);
3322 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3323 il->stations[sta_id].keyinfo.keylen = 16;
3325 if ((il->stations[sta_id].sta.key.
3326 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3327 il->stations[sta_id].sta.key.key_offset =
3328 il_get_free_ucode_key_idx(il);
3329 /* else, we are overriding an existing key => no need to allocated room
3332 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3333 "no space for a new key");
3335 il->stations[sta_id].sta.key.key_flags = key_flags;
3337 /* This copy is acutally not needed: we get the key with each TX */
3338 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16);
3340 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, 16);
3342 spin_unlock_irqrestore(&il->sta_lock, flags);
3348 il4965_update_tkip_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
3349 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key)
3352 unsigned long flags;
3355 if (il_scan_cancel(il)) {
3356 /* cancel scan failed, just live w/ bad key and rely
3357 briefly on SW decryption */
3361 sta_id = il_sta_id_or_broadcast(il, sta);
3362 if (sta_id == IL_INVALID_STATION)
3365 spin_lock_irqsave(&il->sta_lock, flags);
3367 il->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3369 for (i = 0; i < 5; i++)
3370 il->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3371 cpu_to_le16(phase1key[i]);
3373 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3374 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3376 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
3378 spin_unlock_irqrestore(&il->sta_lock, flags);
3382 il4965_remove_dynamic_key(struct il_priv *il,
3383 struct ieee80211_key_conf *keyconf, u8 sta_id)
3385 unsigned long flags;
3388 struct il_addsta_cmd sta_cmd;
3390 lockdep_assert_held(&il->mutex);
3392 il->_4965.key_mapping_keys--;
3394 spin_lock_irqsave(&il->sta_lock, flags);
3395 key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags);
3396 keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3;
3398 D_WEP("Remove dynamic key: idx=%d sta=%d\n", keyconf->keyidx, sta_id);
3400 if (keyconf->keyidx != keyidx) {
3401 /* We need to remove a key with idx different that the one
3402 * in the uCode. This means that the key we need to remove has
3403 * been replaced by another one with different idx.
3404 * Don't do anything and return ok
3406 spin_unlock_irqrestore(&il->sta_lock, flags);
3410 if (il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_INVALID) {
3411 IL_WARN("Removing wrong key %d 0x%x\n", keyconf->keyidx,
3413 spin_unlock_irqrestore(&il->sta_lock, flags);
3417 if (!test_and_clear_bit
3418 (il->stations[sta_id].sta.key.key_offset, &il->ucode_key_table))
3419 IL_ERR("idx %d not used in uCode key table.\n",
3420 il->stations[sta_id].sta.key.key_offset);
3421 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
3422 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
3423 il->stations[sta_id].sta.key.key_flags =
3424 STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID;
3425 il->stations[sta_id].sta.key.key_offset = keyconf->hw_key_idx;
3426 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3427 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3429 if (il_is_rfkill(il)) {
3431 ("Not sending C_ADD_STA command because RFKILL enabled.\n");
3432 spin_unlock_irqrestore(&il->sta_lock, flags);
3435 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3436 sizeof(struct il_addsta_cmd));
3437 spin_unlock_irqrestore(&il->sta_lock, flags);
3439 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3443 il4965_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
3448 lockdep_assert_held(&il->mutex);
3450 il->_4965.key_mapping_keys++;
3451 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
3453 switch (keyconf->cipher) {
3454 case WLAN_CIPHER_SUITE_CCMP:
3456 il4965_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
3458 case WLAN_CIPHER_SUITE_TKIP:
3460 il4965_set_tkip_dynamic_key_info(il, keyconf, sta_id);
3462 case WLAN_CIPHER_SUITE_WEP40:
3463 case WLAN_CIPHER_SUITE_WEP104:
3464 ret = il4965_set_wep_dynamic_key_info(il, keyconf, sta_id);
3467 IL_ERR("Unknown alg: %s cipher = %x\n", __func__,
3472 D_WEP("Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n",
3473 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
3479 * il4965_alloc_bcast_station - add broadcast station into driver's station table.
3481 * This adds the broadcast station into the driver's station table
3482 * and marks it driver active, so that it will be restored to the
3483 * device at the next best time.
3486 il4965_alloc_bcast_station(struct il_priv *il)
3488 struct il_link_quality_cmd *link_cmd;
3489 unsigned long flags;
3492 spin_lock_irqsave(&il->sta_lock, flags);
3493 sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
3494 if (sta_id == IL_INVALID_STATION) {
3495 IL_ERR("Unable to prepare broadcast station\n");
3496 spin_unlock_irqrestore(&il->sta_lock, flags);
3501 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
3502 il->stations[sta_id].used |= IL_STA_BCAST;
3503 spin_unlock_irqrestore(&il->sta_lock, flags);
3505 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3508 ("Unable to initialize rate scaling for bcast station.\n");
3512 spin_lock_irqsave(&il->sta_lock, flags);
3513 il->stations[sta_id].lq = link_cmd;
3514 spin_unlock_irqrestore(&il->sta_lock, flags);
3520 * il4965_update_bcast_station - update broadcast station's LQ command
3522 * Only used by iwl4965. Placed here to have all bcast station management
3526 il4965_update_bcast_station(struct il_priv *il)
3528 unsigned long flags;
3529 struct il_link_quality_cmd *link_cmd;
3530 u8 sta_id = il->hw_params.bcast_id;
3532 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3534 IL_ERR("Unable to initialize rate scaling for bcast sta.\n");
3538 spin_lock_irqsave(&il->sta_lock, flags);
3539 if (il->stations[sta_id].lq)
3540 kfree(il->stations[sta_id].lq);
3542 D_INFO("Bcast sta rate scaling has not been initialized.\n");
3543 il->stations[sta_id].lq = link_cmd;
3544 spin_unlock_irqrestore(&il->sta_lock, flags);
3550 il4965_update_bcast_stations(struct il_priv *il)
3552 return il4965_update_bcast_station(il);
3556 * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table
3559 il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid)
3561 unsigned long flags;
3562 struct il_addsta_cmd sta_cmd;
3564 lockdep_assert_held(&il->mutex);
3566 /* Remove "disable" flag, to enable Tx for this TID */
3567 spin_lock_irqsave(&il->sta_lock, flags);
3568 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3569 il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3570 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3571 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3572 sizeof(struct il_addsta_cmd));
3573 spin_unlock_irqrestore(&il->sta_lock, flags);
3575 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3579 il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, int tid,
3582 unsigned long flags;
3584 struct il_addsta_cmd sta_cmd;
3586 lockdep_assert_held(&il->mutex);
3588 sta_id = il_sta_id(sta);
3589 if (sta_id == IL_INVALID_STATION)
3592 spin_lock_irqsave(&il->sta_lock, flags);
3593 il->stations[sta_id].sta.station_flags_msk = 0;
3594 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3595 il->stations[sta_id].sta.add_immediate_ba_tid = (u8) tid;
3596 il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3597 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3598 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3599 sizeof(struct il_addsta_cmd));
3600 spin_unlock_irqrestore(&il->sta_lock, flags);
3602 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3606 il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, int tid)
3608 unsigned long flags;
3610 struct il_addsta_cmd sta_cmd;
3612 lockdep_assert_held(&il->mutex);
3614 sta_id = il_sta_id(sta);
3615 if (sta_id == IL_INVALID_STATION) {
3616 IL_ERR("Invalid station for AGG tid %d\n", tid);
3620 spin_lock_irqsave(&il->sta_lock, flags);
3621 il->stations[sta_id].sta.station_flags_msk = 0;
3622 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3623 il->stations[sta_id].sta.remove_immediate_ba_tid = (u8) tid;
3624 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3625 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3626 sizeof(struct il_addsta_cmd));
3627 spin_unlock_irqrestore(&il->sta_lock, flags);
3629 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3633 il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt)
3635 unsigned long flags;
3637 spin_lock_irqsave(&il->sta_lock, flags);
3638 il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK;
3639 il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3640 il->stations[sta_id].sta.sta.modify_mask =
3641 STA_MODIFY_SLEEP_TX_COUNT_MSK;
3642 il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt);
3643 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3644 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
3645 spin_unlock_irqrestore(&il->sta_lock, flags);
3650 il4965_update_chain_flags(struct il_priv *il)
3652 if (il->ops->set_rxon_chain) {
3653 il->ops->set_rxon_chain(il);
3654 if (il->active.rx_chain != il->staging.rx_chain)
3660 il4965_clear_free_frames(struct il_priv *il)
3662 struct list_head *element;
3664 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
3666 while (!list_empty(&il->free_frames)) {
3667 element = il->free_frames.next;
3669 kfree(list_entry(element, struct il_frame, list));
3673 if (il->frames_count) {
3674 IL_WARN("%d frames still in use. Did we lose one?\n",
3676 il->frames_count = 0;
3680 static struct il_frame *
3681 il4965_get_free_frame(struct il_priv *il)
3683 struct il_frame *frame;
3684 struct list_head *element;
3685 if (list_empty(&il->free_frames)) {
3686 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
3688 IL_ERR("Could not allocate frame!\n");
3696 element = il->free_frames.next;
3698 return list_entry(element, struct il_frame, list);
3702 il4965_free_frame(struct il_priv *il, struct il_frame *frame)
3704 memset(frame, 0, sizeof(*frame));
3705 list_add(&frame->list, &il->free_frames);
3709 il4965_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
3712 lockdep_assert_held(&il->mutex);
3714 if (!il->beacon_skb)
3717 if (il->beacon_skb->len > left)
3720 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
3722 return il->beacon_skb->len;
3725 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
3727 il4965_set_beacon_tim(struct il_priv *il,
3728 struct il_tx_beacon_cmd *tx_beacon_cmd, u8 * beacon,
3732 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
3735 * The idx is relative to frame start but we start looking at the
3736 * variable-length part of the beacon.
3738 tim_idx = mgmt->u.beacon.variable - beacon;
3740 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
3741 while ((tim_idx < (frame_size - 2)) &&
3742 (beacon[tim_idx] != WLAN_EID_TIM))
3743 tim_idx += beacon[tim_idx + 1] + 2;
3745 /* If TIM field was found, set variables */
3746 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
3747 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
3748 tx_beacon_cmd->tim_size = beacon[tim_idx + 1];
3750 IL_WARN("Unable to find TIM Element in beacon\n");
3754 il4965_hw_get_beacon_cmd(struct il_priv *il, struct il_frame *frame)
3756 struct il_tx_beacon_cmd *tx_beacon_cmd;
3761 * We have to set up the TX command, the TX Beacon command, and the
3765 lockdep_assert_held(&il->mutex);
3767 if (!il->beacon_enabled) {
3768 IL_ERR("Trying to build beacon without beaconing enabled\n");
3772 /* Initialize memory */
3773 tx_beacon_cmd = &frame->u.beacon;
3774 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
3776 /* Set up TX beacon contents */
3778 il4965_fill_beacon_frame(il, tx_beacon_cmd->frame,
3779 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
3780 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
3785 /* Set up TX command fields */
3786 tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size);
3787 tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id;
3788 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3789 tx_beacon_cmd->tx.tx_flags =
3790 TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK |
3791 TX_CMD_FLG_STA_RATE_MSK;
3793 /* Set up TX beacon command fields */
3794 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *) tx_beacon_cmd->frame,
3797 /* Set up packet rate and flags */
3798 rate = il_get_lowest_plcp(il);
3799 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant);
3800 rate_flags = BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS;
3801 if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE))
3802 rate_flags |= RATE_MCS_CCK_MSK;
3803 tx_beacon_cmd->tx.rate_n_flags = cpu_to_le32(rate | rate_flags);
3805 return sizeof(*tx_beacon_cmd) + frame_size;
3809 il4965_send_beacon_cmd(struct il_priv *il)
3811 struct il_frame *frame;
3812 unsigned int frame_size;
3815 frame = il4965_get_free_frame(il);
3817 IL_ERR("Could not obtain free frame buffer for beacon "
3822 frame_size = il4965_hw_get_beacon_cmd(il, frame);
3824 IL_ERR("Error configuring the beacon command\n");
3825 il4965_free_frame(il, frame);
3829 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
3831 il4965_free_frame(il, frame);
3836 static inline dma_addr_t
3837 il4965_tfd_tb_get_addr(struct il_tfd *tfd, u8 idx)
3839 struct il_tfd_tb *tb = &tfd->tbs[idx];
3841 dma_addr_t addr = get_unaligned_le32(&tb->lo);
3842 if (sizeof(dma_addr_t) > sizeof(u32))
3844 ((dma_addr_t) (le16_to_cpu(tb->hi_n_len) & 0xF) << 16) <<
3851 il4965_tfd_tb_get_len(struct il_tfd *tfd, u8 idx)
3853 struct il_tfd_tb *tb = &tfd->tbs[idx];
3855 return le16_to_cpu(tb->hi_n_len) >> 4;
3859 il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, dma_addr_t addr, u16 len)
3861 struct il_tfd_tb *tb = &tfd->tbs[idx];
3862 u16 hi_n_len = len << 4;
3864 put_unaligned_le32(addr, &tb->lo);
3865 if (sizeof(dma_addr_t) > sizeof(u32))
3866 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
3868 tb->hi_n_len = cpu_to_le16(hi_n_len);
3870 tfd->num_tbs = idx + 1;
3874 il4965_tfd_get_num_tbs(struct il_tfd *tfd)
3876 return tfd->num_tbs & 0x1f;
3880 * il4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
3881 * @il - driver ilate data
3884 * Does NOT advance any TFD circular buffer read/write idxes
3885 * Does NOT free the TFD itself (which is within circular buffer)
3888 il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
3890 struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds;
3892 struct pci_dev *dev = il->pci_dev;
3893 int idx = txq->q.read_ptr;
3897 tfd = &tfd_tmp[idx];
3899 /* Sanity check on number of chunks */
3900 num_tbs = il4965_tfd_get_num_tbs(tfd);
3902 if (num_tbs >= IL_NUM_OF_TBS) {
3903 IL_ERR("Too many chunks: %i\n", num_tbs);
3904 /* @todo issue fatal error, it is quite serious situation */
3910 pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
3911 dma_unmap_len(&txq->meta[idx], len),
3912 PCI_DMA_BIDIRECTIONAL);
3914 /* Unmap chunks, if any. */
3915 for (i = 1; i < num_tbs; i++)
3916 pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i),
3917 il4965_tfd_tb_get_len(tfd, i),
3922 struct sk_buff *skb = txq->skbs[txq->q.read_ptr];
3924 /* can be called from irqs-disabled context */
3926 dev_kfree_skb_any(skb);
3927 txq->skbs[txq->q.read_ptr] = NULL;
3933 il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
3934 dma_addr_t addr, u16 len, u8 reset, u8 pad)
3937 struct il_tfd *tfd, *tfd_tmp;
3941 tfd_tmp = (struct il_tfd *)txq->tfds;
3942 tfd = &tfd_tmp[q->write_ptr];
3945 memset(tfd, 0, sizeof(*tfd));
3947 num_tbs = il4965_tfd_get_num_tbs(tfd);
3949 /* Each TFD can point to a maximum 20 Tx buffers */
3950 if (num_tbs >= IL_NUM_OF_TBS) {
3951 IL_ERR("Error can not send more than %d chunks\n",
3956 BUG_ON(addr & ~DMA_BIT_MASK(36));
3957 if (unlikely(addr & ~IL_TX_DMA_MASK))
3958 IL_ERR("Unaligned address = %llx\n", (unsigned long long)addr);
3960 il4965_tfd_set_tb(tfd, num_tbs, addr, len);
3966 * Tell nic where to find circular buffer of Tx Frame Descriptors for
3967 * given Tx queue, and enable the DMA channel used for that queue.
3969 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
3970 * channels supported in hardware.
3973 il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
3975 int txq_id = txq->q.id;
3977 /* Circular buffer (TFD queue in DRAM) physical base address */
3978 il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), txq->q.dma_addr >> 8);
3983 /******************************************************************************
3985 * Generic RX handler implementations
3987 ******************************************************************************/
3989 il4965_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
3991 struct il_rx_pkt *pkt = rxb_addr(rxb);
3992 struct il_alive_resp *palive;
3993 struct delayed_work *pwork;
3995 palive = &pkt->u.alive_frame;
3997 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
3998 palive->is_valid, palive->ver_type, palive->ver_subtype);
4000 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
4001 D_INFO("Initialization Alive received.\n");
4002 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
4003 sizeof(struct il_init_alive_resp));
4004 pwork = &il->init_alive_start;
4006 D_INFO("Runtime Alive received.\n");
4007 memcpy(&il->card_alive, &pkt->u.alive_frame,
4008 sizeof(struct il_alive_resp));
4009 pwork = &il->alive_start;
4012 /* We delay the ALIVE response by 5ms to
4013 * give the HW RF Kill time to activate... */
4014 if (palive->is_valid == UCODE_VALID_OK)
4015 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
4017 IL_WARN("uCode did not respond OK.\n");
4021 * il4965_bg_stats_periodic - Timer callback to queue stats
4023 * This callback is provided in order to send a stats request.
4025 * This timer function is continually reset to execute within
4026 * 60 seconds since the last N_STATS was received. We need to
4027 * ensure we receive the stats in order to update the temperature
4028 * used for calibrating the TXPOWER.
4031 il4965_bg_stats_periodic(unsigned long data)
4033 struct il_priv *il = (struct il_priv *)data;
4035 if (test_bit(S_EXIT_PENDING, &il->status))
4038 /* dont send host command if rf-kill is on */
4039 if (!il_is_ready_rf(il))
4042 il_send_stats_request(il, CMD_ASYNC, false);
4046 il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
4048 struct il_rx_pkt *pkt = rxb_addr(rxb);
4049 struct il4965_beacon_notif *beacon =
4050 (struct il4965_beacon_notif *)pkt->u.raw;
4051 #ifdef CONFIG_IWLEGACY_DEBUG
4052 u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
4054 D_RX("beacon status %x retries %d iss %d tsf:0x%.8x%.8x rate %d\n",
4055 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
4056 beacon->beacon_notify_hdr.failure_frame,
4057 le32_to_cpu(beacon->ibss_mgr_status),
4058 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
4060 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
4064 il4965_perform_ct_kill_task(struct il_priv *il)
4066 unsigned long flags;
4068 D_POWER("Stop all queues\n");
4070 if (il->mac80211_registered)
4071 ieee80211_stop_queues(il->hw);
4073 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
4074 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4075 _il_rd(il, CSR_UCODE_DRV_GP1);
4077 spin_lock_irqsave(&il->reg_lock, flags);
4078 if (likely(_il_grab_nic_access(il)))
4079 _il_release_nic_access(il);
4080 spin_unlock_irqrestore(&il->reg_lock, flags);
4083 /* Handle notification from uCode that card's power state is changing
4084 * due to software, hardware, or critical temperature RFKILL */
4086 il4965_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
4088 struct il_rx_pkt *pkt = rxb_addr(rxb);
4089 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4090 unsigned long status = il->status;
4092 D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n",
4093 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4094 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
4095 (flags & CT_CARD_DISABLED) ? "Reached" : "Not reached");
4097 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | CT_CARD_DISABLED)) {
4099 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
4100 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4102 il_wr(il, HBUS_TARG_MBX_C, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4104 if (!(flags & RXON_CARD_DISABLED)) {
4105 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
4106 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4107 il_wr(il, HBUS_TARG_MBX_C,
4108 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4112 if (flags & CT_CARD_DISABLED)
4113 il4965_perform_ct_kill_task(il);
4115 if (flags & HW_CARD_DISABLED)
4116 set_bit(S_RFKILL, &il->status);
4118 clear_bit(S_RFKILL, &il->status);
4120 if (!(flags & RXON_CARD_DISABLED))
4123 if ((test_bit(S_RFKILL, &status) !=
4124 test_bit(S_RFKILL, &il->status)))
4125 wiphy_rfkill_set_hw_state(il->hw->wiphy,
4126 test_bit(S_RFKILL, &il->status));
4128 wake_up(&il->wait_command_queue);
4132 * il4965_setup_handlers - Initialize Rx handler callbacks
4134 * Setup the RX handlers for each of the reply types sent from the uCode
4137 * This function chains into the hardware specific files for them to setup
4138 * any hardware specific handlers as well.
4141 il4965_setup_handlers(struct il_priv *il)
4143 il->handlers[N_ALIVE] = il4965_hdl_alive;
4144 il->handlers[N_ERROR] = il_hdl_error;
4145 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
4146 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
4147 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
4148 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
4149 il->handlers[N_BEACON] = il4965_hdl_beacon;
4152 * The same handler is used for both the REPLY to a discrete
4153 * stats request from the host as well as for the periodic
4154 * stats notifications (after received beacons) from the uCode.
4156 il->handlers[C_STATS] = il4965_hdl_c_stats;
4157 il->handlers[N_STATS] = il4965_hdl_stats;
4159 il_setup_rx_scan_handlers(il);
4161 /* status change handler */
4162 il->handlers[N_CARD_STATE] = il4965_hdl_card_state;
4164 il->handlers[N_MISSED_BEACONS] = il4965_hdl_missed_beacon;
4166 il->handlers[N_RX_PHY] = il4965_hdl_rx_phy;
4167 il->handlers[N_RX_MPDU] = il4965_hdl_rx;
4168 il->handlers[N_RX] = il4965_hdl_rx;
4170 il->handlers[N_COMPRESSED_BA] = il4965_hdl_compressed_ba;
4172 il->handlers[C_TX] = il4965_hdl_tx;
4176 * il4965_rx_handle - Main entry function for receiving responses from uCode
4178 * Uses the il->handlers callback function array to invoke
4179 * the appropriate handlers, including command responses,
4180 * frame-received notifications, and other notifications.
4183 il4965_rx_handle(struct il_priv *il)
4185 struct il_rx_buf *rxb;
4186 struct il_rx_pkt *pkt;
4187 struct il_rx_queue *rxq = &il->rxq;
4190 unsigned long flags;
4195 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
4196 * buffer that the driver may process (last buffer filled by ucode). */
4197 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
4200 /* Rx interrupt, but nothing sent from uCode */
4202 D_RX("r = %d, i = %d\n", r, i);
4204 /* calculate total frames need to be restock after handling RX */
4205 total_empty = r - rxq->write_actual;
4206 if (total_empty < 0)
4207 total_empty += RX_QUEUE_SIZE;
4209 if (total_empty > (RX_QUEUE_SIZE / 2))
4215 rxb = rxq->queue[i];
4217 /* If an RXB doesn't have a Rx queue slot associated with it,
4218 * then a bug has been introduced in the queue refilling
4219 * routines -- catch it here */
4220 BUG_ON(rxb == NULL);
4222 rxq->queue[i] = NULL;
4224 pci_unmap_page(il->pci_dev, rxb->page_dma,
4225 PAGE_SIZE << il->hw_params.rx_page_order,
4226 PCI_DMA_FROMDEVICE);
4227 pkt = rxb_addr(rxb);
4229 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4230 len += sizeof(u32); /* account for status word */
4232 /* Reclaim a command buffer only if this packet is a response
4233 * to a (driver-originated) command.
4234 * If the packet (e.g. Rx frame) originated from uCode,
4235 * there is no command buffer to reclaim.
4236 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4237 * but apparently a few don't get set; catch them here. */
4238 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4239 (pkt->hdr.cmd != N_RX_PHY) && (pkt->hdr.cmd != N_RX) &&
4240 (pkt->hdr.cmd != N_RX_MPDU) &&
4241 (pkt->hdr.cmd != N_COMPRESSED_BA) &&
4242 (pkt->hdr.cmd != N_STATS) && (pkt->hdr.cmd != C_TX);
4244 /* Based on type of command response or notification,
4245 * handle those that need handling via function in
4246 * handlers table. See il4965_setup_handlers() */
4247 if (il->handlers[pkt->hdr.cmd]) {
4248 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
4249 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4250 il->isr_stats.handlers[pkt->hdr.cmd]++;
4251 il->handlers[pkt->hdr.cmd] (il, rxb);
4253 /* No handling needed */
4254 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
4255 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4259 * XXX: After here, we should always check rxb->page
4260 * against NULL before touching it or its virtual
4261 * memory (pkt). Because some handler might have
4262 * already taken or freed the pages.
4266 /* Invoke any callbacks, transfer the buffer to caller,
4267 * and fire off the (possibly) blocking il_send_cmd()
4268 * as we reclaim the driver command queue */
4270 il_tx_cmd_complete(il, rxb);
4272 IL_WARN("Claim null rxb?\n");
4275 /* Reuse the page if possible. For notification packets and
4276 * SKBs that fail to Rx correctly, add them back into the
4277 * rx_free list for reuse later. */
4278 spin_lock_irqsave(&rxq->lock, flags);
4279 if (rxb->page != NULL) {
4281 pci_map_page(il->pci_dev, rxb->page, 0,
4282 PAGE_SIZE << il->hw_params.
4283 rx_page_order, PCI_DMA_FROMDEVICE);
4284 list_add_tail(&rxb->list, &rxq->rx_free);
4287 list_add_tail(&rxb->list, &rxq->rx_used);
4289 spin_unlock_irqrestore(&rxq->lock, flags);
4291 i = (i + 1) & RX_QUEUE_MASK;
4292 /* If there are a lot of unused frames,
4293 * restock the Rx queue so ucode wont assert. */
4298 il4965_rx_replenish_now(il);
4304 /* Backtrack one entry */
4307 il4965_rx_replenish_now(il);
4309 il4965_rx_queue_restock(il);
4312 /* call this function to flush any scheduled tasklet */
4314 il4965_synchronize_irq(struct il_priv *il)
4316 /* wait to make sure we flush pending tasklet */
4317 synchronize_irq(il->pci_dev->irq);
4318 tasklet_kill(&il->irq_tasklet);
4322 il4965_irq_tasklet(struct il_priv *il)
4324 u32 inta, handled = 0;
4326 unsigned long flags;
4328 #ifdef CONFIG_IWLEGACY_DEBUG
4332 spin_lock_irqsave(&il->lock, flags);
4334 /* Ack/clear/reset pending uCode interrupts.
4335 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4336 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4337 inta = _il_rd(il, CSR_INT);
4338 _il_wr(il, CSR_INT, inta);
4340 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4341 * Any new interrupts that happen after this, either while we're
4342 * in this tasklet, or later, will show up in next ISR/tasklet. */
4343 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
4344 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
4346 #ifdef CONFIG_IWLEGACY_DEBUG
4347 if (il_get_debug_level(il) & IL_DL_ISR) {
4348 /* just for debug */
4349 inta_mask = _il_rd(il, CSR_INT_MASK);
4350 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
4351 inta_mask, inta_fh);
4355 spin_unlock_irqrestore(&il->lock, flags);
4357 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4358 * atomic, make sure that inta covers all the interrupts that
4359 * we've discovered, even if FH interrupt came in just after
4360 * reading CSR_INT. */
4361 if (inta_fh & CSR49_FH_INT_RX_MASK)
4362 inta |= CSR_INT_BIT_FH_RX;
4363 if (inta_fh & CSR49_FH_INT_TX_MASK)
4364 inta |= CSR_INT_BIT_FH_TX;
4366 /* Now service all interrupt bits discovered above. */
4367 if (inta & CSR_INT_BIT_HW_ERR) {
4368 IL_ERR("Hardware error detected. Restarting.\n");
4370 /* Tell the device to stop sending interrupts */
4371 il_disable_interrupts(il);
4374 il_irq_handle_error(il);
4376 handled |= CSR_INT_BIT_HW_ERR;
4380 #ifdef CONFIG_IWLEGACY_DEBUG
4381 if (il_get_debug_level(il) & (IL_DL_ISR)) {
4382 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4383 if (inta & CSR_INT_BIT_SCD) {
4384 D_ISR("Scheduler finished to transmit "
4385 "the frame/frames.\n");
4386 il->isr_stats.sch++;
4389 /* Alive notification via Rx interrupt will do the real work */
4390 if (inta & CSR_INT_BIT_ALIVE) {
4391 D_ISR("Alive interrupt\n");
4392 il->isr_stats.alive++;
4396 /* Safely ignore these bits for debug checks below */
4397 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4399 /* HW RF KILL switch toggled */
4400 if (inta & CSR_INT_BIT_RF_KILL) {
4403 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4406 IL_WARN("RF_KILL bit toggled to %s.\n",
4407 hw_rf_kill ? "disable radio" : "enable radio");
4409 il->isr_stats.rfkill++;
4411 /* driver only loads ucode once setting the interface up.
4412 * the driver allows loading the ucode even if the radio
4413 * is killed. Hence update the killswitch state here. The
4414 * rfkill handler will care about restarting if needed.
4416 if (!test_bit(S_ALIVE, &il->status)) {
4418 set_bit(S_RFKILL, &il->status);
4420 clear_bit(S_RFKILL, &il->status);
4421 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rf_kill);
4424 handled |= CSR_INT_BIT_RF_KILL;
4427 /* Chip got too hot and stopped itself */
4428 if (inta & CSR_INT_BIT_CT_KILL) {
4429 IL_ERR("Microcode CT kill error detected.\n");
4430 il->isr_stats.ctkill++;
4431 handled |= CSR_INT_BIT_CT_KILL;
4434 /* Error detected by uCode */
4435 if (inta & CSR_INT_BIT_SW_ERR) {
4436 IL_ERR("Microcode SW error detected. " " Restarting 0x%X.\n",
4439 il_irq_handle_error(il);
4440 handled |= CSR_INT_BIT_SW_ERR;
4444 * uCode wakes up after power-down sleep.
4445 * Tell device about any new tx or host commands enqueued,
4446 * and about any Rx buffers made available while asleep.
4448 if (inta & CSR_INT_BIT_WAKEUP) {
4449 D_ISR("Wakeup interrupt\n");
4450 il_rx_queue_update_write_ptr(il, &il->rxq);
4451 for (i = 0; i < il->hw_params.max_txq_num; i++)
4452 il_txq_update_write_ptr(il, &il->txq[i]);
4453 il->isr_stats.wakeup++;
4454 handled |= CSR_INT_BIT_WAKEUP;
4457 /* All uCode command responses, including Tx command responses,
4458 * Rx "responses" (frame-received notification), and other
4459 * notifications from uCode come through here*/
4460 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4461 il4965_rx_handle(il);
4463 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4466 /* This "Tx" DMA channel is used only for loading uCode */
4467 if (inta & CSR_INT_BIT_FH_TX) {
4468 D_ISR("uCode load interrupt\n");
4470 handled |= CSR_INT_BIT_FH_TX;
4471 /* Wake up uCode load routine, now that load is complete */
4472 il->ucode_write_complete = 1;
4473 wake_up(&il->wait_command_queue);
4476 if (inta & ~handled) {
4477 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4478 il->isr_stats.unhandled++;
4481 if (inta & ~(il->inta_mask)) {
4482 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
4483 inta & ~il->inta_mask);
4484 IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh);
4487 /* Re-enable all interrupts */
4488 /* only Re-enable if disabled by irq */
4489 if (test_bit(S_INT_ENABLED, &il->status))
4490 il_enable_interrupts(il);
4491 /* Re-enable RF_KILL if it occurred */
4492 else if (handled & CSR_INT_BIT_RF_KILL)
4493 il_enable_rfkill_int(il);
4495 #ifdef CONFIG_IWLEGACY_DEBUG
4496 if (il_get_debug_level(il) & (IL_DL_ISR)) {
4497 inta = _il_rd(il, CSR_INT);
4498 inta_mask = _il_rd(il, CSR_INT_MASK);
4499 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
4500 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4501 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4506 /*****************************************************************************
4510 *****************************************************************************/
4512 #ifdef CONFIG_IWLEGACY_DEBUG
4515 * The following adds a new attribute to the sysfs representation
4516 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
4517 * used for controlling the debug level.
4519 * See the level definitions in iwl for details.
4521 * The debug_level being managed using sysfs below is a per device debug
4522 * level that is used instead of the global debug level if it (the per
4523 * device debug level) is set.
4526 il4965_show_debug_level(struct device *d, struct device_attribute *attr,
4529 struct il_priv *il = dev_get_drvdata(d);
4530 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
4534 il4965_store_debug_level(struct device *d, struct device_attribute *attr,
4535 const char *buf, size_t count)
4537 struct il_priv *il = dev_get_drvdata(d);
4541 ret = strict_strtoul(buf, 0, &val);
4543 IL_ERR("%s is not in hex or decimal form.\n", buf);
4545 il->debug_level = val;
4547 return strnlen(buf, count);
4550 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il4965_show_debug_level,
4551 il4965_store_debug_level);
4553 #endif /* CONFIG_IWLEGACY_DEBUG */
4556 il4965_show_temperature(struct device *d, struct device_attribute *attr,
4559 struct il_priv *il = dev_get_drvdata(d);
4561 if (!il_is_alive(il))
4564 return sprintf(buf, "%d\n", il->temperature);
4567 static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL);
4570 il4965_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
4572 struct il_priv *il = dev_get_drvdata(d);
4574 if (!il_is_ready_rf(il))
4575 return sprintf(buf, "off\n");
4577 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
4581 il4965_store_tx_power(struct device *d, struct device_attribute *attr,
4582 const char *buf, size_t count)
4584 struct il_priv *il = dev_get_drvdata(d);
4588 ret = strict_strtoul(buf, 10, &val);
4590 IL_INFO("%s is not in decimal form.\n", buf);
4592 ret = il_set_tx_power(il, val, false);
4594 IL_ERR("failed setting tx power (0x%d).\n", ret);
4601 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il4965_show_tx_power,
4602 il4965_store_tx_power);
4604 static struct attribute *il_sysfs_entries[] = {
4605 &dev_attr_temperature.attr,
4606 &dev_attr_tx_power.attr,
4607 #ifdef CONFIG_IWLEGACY_DEBUG
4608 &dev_attr_debug_level.attr,
4613 static struct attribute_group il_attribute_group = {
4614 .name = NULL, /* put in device directory */
4615 .attrs = il_sysfs_entries,
4618 /******************************************************************************
4620 * uCode download functions
4622 ******************************************************************************/
4625 il4965_dealloc_ucode_pci(struct il_priv *il)
4627 il_free_fw_desc(il->pci_dev, &il->ucode_code);
4628 il_free_fw_desc(il->pci_dev, &il->ucode_data);
4629 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
4630 il_free_fw_desc(il->pci_dev, &il->ucode_init);
4631 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
4632 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
4636 il4965_nic_start(struct il_priv *il)
4638 /* Remove all resets to allow NIC to operate */
4639 _il_wr(il, CSR_RESET, 0);
4642 static void il4965_ucode_callback(const struct firmware *ucode_raw,
4644 static int il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length);
4646 static int __must_check
4647 il4965_request_firmware(struct il_priv *il, bool first)
4649 const char *name_pre = il->cfg->fw_name_pre;
4653 il->fw_idx = il->cfg->ucode_api_max;
4654 sprintf(tag, "%d", il->fw_idx);
4657 sprintf(tag, "%d", il->fw_idx);
4660 if (il->fw_idx < il->cfg->ucode_api_min) {
4661 IL_ERR("no suitable firmware found!\n");
4665 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
4667 D_INFO("attempting to load firmware '%s'\n", il->firmware_name);
4669 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name,
4670 &il->pci_dev->dev, GFP_KERNEL, il,
4671 il4965_ucode_callback);
4674 struct il4965_firmware_pieces {
4675 const void *inst, *data, *init, *init_data, *boot;
4676 size_t inst_size, data_size, init_size, init_data_size, boot_size;
4680 il4965_load_firmware(struct il_priv *il, const struct firmware *ucode_raw,
4681 struct il4965_firmware_pieces *pieces)
4683 struct il_ucode_header *ucode = (void *)ucode_raw->data;
4684 u32 api_ver, hdr_size;
4687 il->ucode_ver = le32_to_cpu(ucode->ver);
4688 api_ver = IL_UCODE_API(il->ucode_ver);
4696 if (ucode_raw->size < hdr_size) {
4697 IL_ERR("File size too small!\n");
4700 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size);
4701 pieces->data_size = le32_to_cpu(ucode->v1.data_size);
4702 pieces->init_size = le32_to_cpu(ucode->v1.init_size);
4703 pieces->init_data_size = le32_to_cpu(ucode->v1.init_data_size);
4704 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size);
4705 src = ucode->v1.data;
4709 /* Verify size of file vs. image size info in file's header */
4710 if (ucode_raw->size !=
4711 hdr_size + pieces->inst_size + pieces->data_size +
4712 pieces->init_size + pieces->init_data_size + pieces->boot_size) {
4714 IL_ERR("uCode file size %d does not match expected size\n",
4715 (int)ucode_raw->size);
4720 src += pieces->inst_size;
4722 src += pieces->data_size;
4724 src += pieces->init_size;
4725 pieces->init_data = src;
4726 src += pieces->init_data_size;
4728 src += pieces->boot_size;
4734 * il4965_ucode_callback - callback when firmware was loaded
4736 * If loaded successfully, copies the firmware into buffers
4737 * for the card to fetch (via DMA).
4740 il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4742 struct il_priv *il = context;
4743 struct il_ucode_header *ucode;
4745 struct il4965_firmware_pieces pieces;
4746 const unsigned int api_max = il->cfg->ucode_api_max;
4747 const unsigned int api_min = il->cfg->ucode_api_min;
4750 u32 max_probe_length = 200;
4751 u32 standard_phy_calibration_size =
4752 IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE;
4754 memset(&pieces, 0, sizeof(pieces));
4757 if (il->fw_idx <= il->cfg->ucode_api_max)
4758 IL_ERR("request for firmware file '%s' failed.\n",
4763 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il->firmware_name,
4766 /* Make sure that we got at least the API version number */
4767 if (ucode_raw->size < 4) {
4768 IL_ERR("File size way too small!\n");
4772 /* Data from ucode file: header followed by uCode images */
4773 ucode = (struct il_ucode_header *)ucode_raw->data;
4775 err = il4965_load_firmware(il, ucode_raw, &pieces);
4780 api_ver = IL_UCODE_API(il->ucode_ver);
4783 * api_ver should match the api version forming part of the
4784 * firmware filename ... but we don't check for that and only rely
4785 * on the API version read from firmware header from here on forward
4787 if (api_ver < api_min || api_ver > api_max) {
4788 IL_ERR("Driver unable to support your firmware API. "
4789 "Driver supports v%u, firmware is v%u.\n", api_max,
4794 if (api_ver != api_max)
4795 IL_ERR("Firmware has old API version. Expected v%u, "
4796 "got v%u. New firmware can be obtained "
4797 "from http://www.intellinuxwireless.org.\n", api_max,
4800 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
4801 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
4802 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
4804 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
4805 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
4806 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
4807 IL_UCODE_SERIAL(il->ucode_ver));
4810 * For any of the failures below (before allocating pci memory)
4811 * we will try to load a version with a smaller API -- maybe the
4812 * user just got a corrupted version of the latest API.
4815 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
4816 D_INFO("f/w package hdr runtime inst size = %Zd\n", pieces.inst_size);
4817 D_INFO("f/w package hdr runtime data size = %Zd\n", pieces.data_size);
4818 D_INFO("f/w package hdr init inst size = %Zd\n", pieces.init_size);
4819 D_INFO("f/w package hdr init data size = %Zd\n", pieces.init_data_size);
4820 D_INFO("f/w package hdr boot inst size = %Zd\n", pieces.boot_size);
4822 /* Verify that uCode images will fit in card's SRAM */
4823 if (pieces.inst_size > il->hw_params.max_inst_size) {
4824 IL_ERR("uCode instr len %Zd too large to fit in\n",
4829 if (pieces.data_size > il->hw_params.max_data_size) {
4830 IL_ERR("uCode data len %Zd too large to fit in\n",
4835 if (pieces.init_size > il->hw_params.max_inst_size) {
4836 IL_ERR("uCode init instr len %Zd too large to fit in\n",
4841 if (pieces.init_data_size > il->hw_params.max_data_size) {
4842 IL_ERR("uCode init data len %Zd too large to fit in\n",
4843 pieces.init_data_size);
4847 if (pieces.boot_size > il->hw_params.max_bsm_size) {
4848 IL_ERR("uCode boot instr len %Zd too large to fit in\n",
4853 /* Allocate ucode buffers for card's bus-master loading ... */
4855 /* Runtime instructions and 2 copies of data:
4856 * 1) unmodified from disk
4857 * 2) backup cache for save/restore during power-downs */
4858 il->ucode_code.len = pieces.inst_size;
4859 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
4861 il->ucode_data.len = pieces.data_size;
4862 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
4864 il->ucode_data_backup.len = pieces.data_size;
4865 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
4867 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
4868 !il->ucode_data_backup.v_addr)
4871 /* Initialization instructions and data */
4872 if (pieces.init_size && pieces.init_data_size) {
4873 il->ucode_init.len = pieces.init_size;
4874 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
4876 il->ucode_init_data.len = pieces.init_data_size;
4877 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
4879 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
4883 /* Bootstrap (instructions only, no data) */
4884 if (pieces.boot_size) {
4885 il->ucode_boot.len = pieces.boot_size;
4886 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
4888 if (!il->ucode_boot.v_addr)
4892 /* Now that we can no longer fail, copy information */
4894 il->sta_key_max_num = STA_KEY_MAX_NUM;
4896 /* Copy images into buffers for card's bus-master reads ... */
4898 /* Runtime instructions (first block of data in file) */
4899 D_INFO("Copying (but not loading) uCode instr len %Zd\n",
4901 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size);
4903 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4904 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
4908 * NOTE: Copy into backup buffer will be done in il_up()
4910 D_INFO("Copying (but not loading) uCode data len %Zd\n",
4912 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size);
4913 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
4915 /* Initialization instructions */
4916 if (pieces.init_size) {
4917 D_INFO("Copying (but not loading) init instr len %Zd\n",
4919 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size);
4922 /* Initialization data */
4923 if (pieces.init_data_size) {
4924 D_INFO("Copying (but not loading) init data len %Zd\n",
4925 pieces.init_data_size);
4926 memcpy(il->ucode_init_data.v_addr, pieces.init_data,
4927 pieces.init_data_size);
4930 /* Bootstrap instructions */
4931 D_INFO("Copying (but not loading) boot instr len %Zd\n",
4933 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
4936 * figure out the offset of chain noise reset and gain commands
4937 * base on the size of standard phy calibration commands table size
4939 il->_4965.phy_calib_chain_noise_reset_cmd =
4940 standard_phy_calibration_size;
4941 il->_4965.phy_calib_chain_noise_gain_cmd =
4942 standard_phy_calibration_size + 1;
4944 /**************************************************
4945 * This is still part of probe() in a sense...
4947 * 9. Setup and register with mac80211 and debugfs
4948 **************************************************/
4949 err = il4965_mac_setup_register(il, max_probe_length);
4953 err = il_dbgfs_register(il, DRV_NAME);
4955 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
4958 err = sysfs_create_group(&il->pci_dev->dev.kobj, &il_attribute_group);
4960 IL_ERR("failed to create sysfs device attributes\n");
4964 /* We have our copies now, allow OS release its copies */
4965 release_firmware(ucode_raw);
4966 complete(&il->_4965.firmware_loading_complete);
4970 /* try next, if any */
4971 if (il4965_request_firmware(il, false))
4973 release_firmware(ucode_raw);
4977 IL_ERR("failed to allocate pci memory\n");
4978 il4965_dealloc_ucode_pci(il);
4980 complete(&il->_4965.firmware_loading_complete);
4981 device_release_driver(&il->pci_dev->dev);
4982 release_firmware(ucode_raw);
4985 static const char *const desc_lookup_text[] = {
4990 "NMI_INTERRUPT_WDG",
4994 "HW_ERROR_TUNE_LOCK",
4995 "HW_ERROR_TEMPERATURE",
4996 "ILLEGAL_CHAN_FREQ",
4999 "NMI_INTERRUPT_HOST",
5000 "NMI_INTERRUPT_ACTION_PT",
5001 "NMI_INTERRUPT_UNKNOWN",
5002 "UCODE_VERSION_MISMATCH",
5003 "HW_ERROR_ABS_LOCK",
5004 "HW_ERROR_CAL_LOCK_FAIL",
5005 "NMI_INTERRUPT_INST_ACTION_PT",
5006 "NMI_INTERRUPT_DATA_ACTION_PT",
5008 "NMI_INTERRUPT_TRM",
5009 "NMI_INTERRUPT_BREAK_POINT",
5019 } advanced_lookup[] = {
5021 "NMI_INTERRUPT_WDG", 0x34}, {
5022 "SYSASSERT", 0x35}, {
5023 "UCODE_VERSION_MISMATCH", 0x37}, {
5024 "BAD_COMMAND", 0x38}, {
5025 "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C}, {
5026 "FATAL_ERROR", 0x3D}, {
5027 "NMI_TRM_HW_ERR", 0x46}, {
5028 "NMI_INTERRUPT_TRM", 0x4C}, {
5029 "NMI_INTERRUPT_BREAK_POINT", 0x54}, {
5030 "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C}, {
5031 "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64}, {
5032 "NMI_INTERRUPT_HOST", 0x66}, {
5033 "NMI_INTERRUPT_ACTION_PT", 0x7C}, {
5034 "NMI_INTERRUPT_UNKNOWN", 0x84}, {
5035 "NMI_INTERRUPT_INST_ACTION_PT", 0x86}, {
5036 "ADVANCED_SYSASSERT", 0},};
5039 il4965_desc_lookup(u32 num)
5042 int max = ARRAY_SIZE(desc_lookup_text);
5045 return desc_lookup_text[num];
5047 max = ARRAY_SIZE(advanced_lookup) - 1;
5048 for (i = 0; i < max; i++) {
5049 if (advanced_lookup[i].num == num)
5052 return advanced_lookup[i].name;
5055 #define ERROR_START_OFFSET (1 * sizeof(u32))
5056 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
5059 il4965_dump_nic_error_log(struct il_priv *il)
5062 u32 desc, time, count, base, data1;
5063 u32 blink1, blink2, ilink1, ilink2;
5066 if (il->ucode_type == UCODE_INIT)
5067 base = le32_to_cpu(il->card_alive_init.error_event_table_ptr);
5069 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
5071 if (!il->ops->is_valid_rtc_data_addr(base)) {
5072 IL_ERR("Not valid error log pointer 0x%08X for %s uCode\n",
5073 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT");
5077 count = il_read_targ_mem(il, base);
5079 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
5080 IL_ERR("Start IWL Error Log Dump:\n");
5081 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
5084 desc = il_read_targ_mem(il, base + 1 * sizeof(u32));
5085 il->isr_stats.err_code = desc;
5086 pc = il_read_targ_mem(il, base + 2 * sizeof(u32));
5087 blink1 = il_read_targ_mem(il, base + 3 * sizeof(u32));
5088 blink2 = il_read_targ_mem(il, base + 4 * sizeof(u32));
5089 ilink1 = il_read_targ_mem(il, base + 5 * sizeof(u32));
5090 ilink2 = il_read_targ_mem(il, base + 6 * sizeof(u32));
5091 data1 = il_read_targ_mem(il, base + 7 * sizeof(u32));
5092 data2 = il_read_targ_mem(il, base + 8 * sizeof(u32));
5093 line = il_read_targ_mem(il, base + 9 * sizeof(u32));
5094 time = il_read_targ_mem(il, base + 11 * sizeof(u32));
5095 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32));
5098 "data1 data2 line\n");
5099 IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
5100 il4965_desc_lookup(desc), desc, time, data1, data2, line);
5101 IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n");
5102 IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", pc, blink1,
5103 blink2, ilink1, ilink2, hcmd);
5107 il4965_rf_kill_ct_config(struct il_priv *il)
5109 struct il_ct_kill_config cmd;
5110 unsigned long flags;
5113 spin_lock_irqsave(&il->lock, flags);
5114 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
5115 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
5116 spin_unlock_irqrestore(&il->lock, flags);
5118 cmd.critical_temperature_R =
5119 cpu_to_le32(il->hw_params.ct_kill_threshold);
5121 ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, sizeof(cmd), &cmd);
5123 IL_ERR("C_CT_KILL_CONFIG failed\n");
5125 D_INFO("C_CT_KILL_CONFIG " "succeeded, "
5126 "critical temperature is %d\n",
5127 il->hw_params.ct_kill_threshold);
5130 static const s8 default_queue_to_tx_fifo[] = {
5140 #define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
5143 il4965_alive_notify(struct il_priv *il)
5146 unsigned long flags;
5150 spin_lock_irqsave(&il->lock, flags);
5152 /* Clear 4965's internal Tx Scheduler data base */
5153 il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR);
5154 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET;
5155 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
5156 il_write_targ_mem(il, a, 0);
5157 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
5158 il_write_targ_mem(il, a, 0);
5162 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num);
5164 il_write_targ_mem(il, a, 0);
5166 /* Tel 4965 where to find Tx byte count tables */
5167 il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, il->scd_bc_tbls.dma >> 10);
5169 /* Enable DMA channel */
5170 for (chan = 0; chan < FH49_TCSR_CHNL_NUM; chan++)
5171 il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(chan),
5172 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
5173 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
5175 /* Update FH chicken bits */
5176 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG);
5177 il_wr(il, FH49_TX_CHICKEN_BITS_REG,
5178 reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
5180 /* Disable chain mode for all queues */
5181 il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0);
5183 /* Initialize each Tx queue (including the command queue) */
5184 for (i = 0; i < il->hw_params.max_txq_num; i++) {
5186 /* TFD circular buffer read/write idxes */
5187 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(i), 0);
5188 il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8));
5190 /* Max Tx Window size for Scheduler-ACK mode */
5191 il_write_targ_mem(il,
5193 IL49_SCD_CONTEXT_QUEUE_OFFSET(i),
5195 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
5196 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
5199 il_write_targ_mem(il,
5201 IL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
5204 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
5205 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
5208 il_wr_prph(il, IL49_SCD_INTERRUPT_MASK,
5209 (1 << il->hw_params.max_txq_num) - 1);
5211 /* Activate all Tx DMA/FIFO channels */
5212 il4965_txq_set_sched(il, IL_MASK(0, 6));
5214 il4965_set_wr_ptrs(il, IL_DEFAULT_CMD_QUEUE_NUM, 0);
5216 /* make sure all queue are not stopped */
5217 memset(&il->queue_stopped[0], 0, sizeof(il->queue_stopped));
5218 for (i = 0; i < 4; i++)
5219 atomic_set(&il->queue_stop_count[i], 0);
5221 /* reset to 0 to enable all the queue first */
5222 il->txq_ctx_active_msk = 0;
5223 /* Map each Tx/cmd queue to its corresponding fifo */
5224 BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
5226 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
5227 int ac = default_queue_to_tx_fifo[i];
5229 il_txq_ctx_activate(il, i);
5231 if (ac == IL_TX_FIFO_UNUSED)
5234 il4965_tx_queue_set_status(il, &il->txq[i], ac, 0);
5237 spin_unlock_irqrestore(&il->lock, flags);
5243 * il4965_alive_start - called after N_ALIVE notification received
5244 * from protocol/runtime uCode (initialization uCode's
5245 * Alive gets handled by il_init_alive_start()).
5248 il4965_alive_start(struct il_priv *il)
5252 D_INFO("Runtime Alive received.\n");
5254 if (il->card_alive.is_valid != UCODE_VALID_OK) {
5255 /* We had an error bringing up the hardware, so take it
5256 * all the way back down so we can try again */
5257 D_INFO("Alive failed.\n");
5261 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5262 * This is a paranoid check, because we would not have gotten the
5263 * "runtime" alive if code weren't properly loaded. */
5264 if (il4965_verify_ucode(il)) {
5265 /* Runtime instruction load was bad;
5266 * take it all the way back down so we can try again */
5267 D_INFO("Bad runtime uCode load.\n");
5271 ret = il4965_alive_notify(il);
5273 IL_WARN("Could not complete ALIVE transition [ntf]: %d\n", ret);
5277 /* After the ALIVE response, we can send host commands to the uCode */
5278 set_bit(S_ALIVE, &il->status);
5280 /* Enable watchdog to monitor the driver tx queues */
5281 il_setup_watchdog(il);
5283 if (il_is_rfkill(il))
5286 ieee80211_wake_queues(il->hw);
5288 il->active_rate = RATES_MASK;
5290 if (il_is_associated(il)) {
5291 struct il_rxon_cmd *active_rxon =
5292 (struct il_rxon_cmd *)&il->active;
5293 /* apply any changes in staging */
5294 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
5295 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5297 /* Initialize our rx_config data */
5298 il_connection_init_rx_config(il);
5300 if (il->ops->set_rxon_chain)
5301 il->ops->set_rxon_chain(il);
5304 /* Configure bluetooth coexistence if enabled */
5305 il_send_bt_config(il);
5307 il4965_reset_run_time_calib(il);
5309 set_bit(S_READY, &il->status);
5311 /* Configure the adapter for unassociated operation */
5314 /* At this point, the NIC is initialized and operational */
5315 il4965_rf_kill_ct_config(il);
5317 D_INFO("ALIVE processing complete.\n");
5318 wake_up(&il->wait_command_queue);
5320 il_power_update_mode(il, true);
5321 D_INFO("Updated power mode\n");
5326 queue_work(il->workqueue, &il->restart);
5329 static void il4965_cancel_deferred_work(struct il_priv *il);
5332 __il4965_down(struct il_priv *il)
5334 unsigned long flags;
5337 D_INFO(DRV_NAME " is going down\n");
5339 il_scan_cancel_timeout(il, 200);
5341 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
5343 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
5344 * to prevent rearm timer */
5345 del_timer_sync(&il->watchdog);
5347 il_clear_ucode_stations(il);
5349 /* FIXME: race conditions ? */
5350 spin_lock_irq(&il->sta_lock);
5352 * Remove all key information that is not stored as part
5353 * of station information since mac80211 may not have had
5354 * a chance to remove all the keys. When device is
5355 * reconfigured by mac80211 after an error all keys will
5358 memset(il->_4965.wep_keys, 0, sizeof(il->_4965.wep_keys));
5359 il->_4965.key_mapping_keys = 0;
5360 spin_unlock_irq(&il->sta_lock);
5362 il_dealloc_bcast_stations(il);
5363 il_clear_driver_stations(il);
5365 /* Unblock any waiting calls */
5366 wake_up_all(&il->wait_command_queue);
5368 /* Wipe out the EXIT_PENDING status bit if we are not actually
5369 * exiting the module */
5371 clear_bit(S_EXIT_PENDING, &il->status);
5373 /* stop and reset the on-board processor */
5374 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5376 /* tell the device to stop sending interrupts */
5377 spin_lock_irqsave(&il->lock, flags);
5378 il_disable_interrupts(il);
5379 spin_unlock_irqrestore(&il->lock, flags);
5380 il4965_synchronize_irq(il);
5382 if (il->mac80211_registered)
5383 ieee80211_stop_queues(il->hw);
5385 /* If we have not previously called il_init() then
5386 * clear all bits but the RF Kill bit and return */
5387 if (!il_is_init(il)) {
5389 test_bit(S_RFKILL, &il->status) << S_RFKILL |
5390 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
5391 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5395 /* ...otherwise clear out all the status bits but the RF Kill
5396 * bit and continue taking the NIC down. */
5398 test_bit(S_RFKILL, &il->status) << S_RFKILL |
5399 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
5400 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
5401 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5404 * We disabled and synchronized interrupt, and priv->mutex is taken, so
5405 * here is the only thread which will program device registers, but
5406 * still have lockdep assertions, so we are taking reg_lock.
5408 spin_lock_irq(&il->reg_lock);
5409 /* FIXME: il_grab_nic_access if rfkill is off ? */
5411 il4965_txq_ctx_stop(il);
5412 il4965_rxq_stop(il);
5413 /* Power-down device's busmaster DMA clocks */
5414 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
5416 /* Make sure (redundant) we've released our request to stay awake */
5417 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5418 /* Stop the device, and put it in low power state */
5421 spin_unlock_irq(&il->reg_lock);
5423 il4965_txq_ctx_unmap(il);
5425 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
5427 dev_kfree_skb(il->beacon_skb);
5428 il->beacon_skb = NULL;
5430 /* clear out any free frames */
5431 il4965_clear_free_frames(il);
5435 il4965_down(struct il_priv *il)
5437 mutex_lock(&il->mutex);
5439 mutex_unlock(&il->mutex);
5441 il4965_cancel_deferred_work(il);
5446 il4965_set_hw_ready(struct il_priv *il)
5450 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
5451 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
5453 /* See if we got it */
5454 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5455 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
5456 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
5459 il->hw_ready = true;
5461 D_INFO("hardware %s ready\n", (il->hw_ready) ? "" : "not");
5465 il4965_prepare_card_hw(struct il_priv *il)
5469 il->hw_ready = false;
5471 il4965_set_hw_ready(il);
5475 /* If HW is not ready, prepare the conditions to check again */
5476 il_set_bit(il, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_PREPARE);
5479 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5480 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
5481 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
5483 /* HW should be ready by now, check again. */
5484 if (ret != -ETIMEDOUT)
5485 il4965_set_hw_ready(il);
5488 #define MAX_HW_RESTARTS 5
5491 __il4965_up(struct il_priv *il)
5496 if (test_bit(S_EXIT_PENDING, &il->status)) {
5497 IL_WARN("Exit pending; will not bring the NIC up\n");
5501 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
5502 IL_ERR("ucode not available for device bringup\n");
5506 ret = il4965_alloc_bcast_station(il);
5508 il_dealloc_bcast_stations(il);
5512 il4965_prepare_card_hw(il);
5513 if (!il->hw_ready) {
5514 IL_ERR("HW not ready\n");
5518 /* If platform's RF_KILL switch is NOT set to KILL */
5519 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5520 clear_bit(S_RFKILL, &il->status);
5522 set_bit(S_RFKILL, &il->status);
5523 wiphy_rfkill_set_hw_state(il->hw->wiphy, true);
5525 il_enable_rfkill_int(il);
5526 IL_WARN("Radio disabled by HW RF Kill switch\n");
5530 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5532 /* must be initialised before il_hw_nic_init */
5533 il->cmd_queue = IL_DEFAULT_CMD_QUEUE_NUM;
5535 ret = il4965_hw_nic_init(il);
5537 IL_ERR("Unable to init nic\n");
5541 /* make sure rfkill handshake bits are cleared */
5542 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5543 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5545 /* clear (again), then enable host interrupts */
5546 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5547 il_enable_interrupts(il);
5549 /* really make sure rfkill handshake bits are cleared */
5550 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5551 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5553 /* Copy original ucode data image from disk into backup cache.
5554 * This will be used to initialize the on-board processor's
5555 * data SRAM for a clean start when the runtime program first loads. */
5556 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
5557 il->ucode_data.len);
5559 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5561 /* load bootstrap state machine,
5562 * load bootstrap program into processor's memory,
5563 * prepare to load the "initialize" uCode */
5564 ret = il->ops->load_ucode(il);
5567 IL_ERR("Unable to set up bootstrap uCode: %d\n", ret);
5571 /* start card; "initialize" will load runtime ucode */
5572 il4965_nic_start(il);
5574 D_INFO(DRV_NAME " is coming up\n");
5579 set_bit(S_EXIT_PENDING, &il->status);
5581 clear_bit(S_EXIT_PENDING, &il->status);
5583 /* tried to restart and config the device for as long as our
5584 * patience could withstand */
5585 IL_ERR("Unable to initialize device after %d attempts.\n", i);
5589 /*****************************************************************************
5591 * Workqueue callbacks
5593 *****************************************************************************/
5596 il4965_bg_init_alive_start(struct work_struct *data)
5598 struct il_priv *il =
5599 container_of(data, struct il_priv, init_alive_start.work);
5601 mutex_lock(&il->mutex);
5602 if (test_bit(S_EXIT_PENDING, &il->status))
5605 il->ops->init_alive_start(il);
5607 mutex_unlock(&il->mutex);
5611 il4965_bg_alive_start(struct work_struct *data)
5613 struct il_priv *il =
5614 container_of(data, struct il_priv, alive_start.work);
5616 mutex_lock(&il->mutex);
5617 if (test_bit(S_EXIT_PENDING, &il->status))
5620 il4965_alive_start(il);
5622 mutex_unlock(&il->mutex);
5626 il4965_bg_run_time_calib_work(struct work_struct *work)
5628 struct il_priv *il = container_of(work, struct il_priv,
5629 run_time_calib_work);
5631 mutex_lock(&il->mutex);
5633 if (test_bit(S_EXIT_PENDING, &il->status) ||
5634 test_bit(S_SCANNING, &il->status)) {
5635 mutex_unlock(&il->mutex);
5639 if (il->start_calib) {
5640 il4965_chain_noise_calibration(il, (void *)&il->_4965.stats);
5641 il4965_sensitivity_calibration(il, (void *)&il->_4965.stats);
5644 mutex_unlock(&il->mutex);
5648 il4965_bg_restart(struct work_struct *data)
5650 struct il_priv *il = container_of(data, struct il_priv, restart);
5652 if (test_bit(S_EXIT_PENDING, &il->status))
5655 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
5656 mutex_lock(&il->mutex);
5661 mutex_unlock(&il->mutex);
5662 il4965_cancel_deferred_work(il);
5663 ieee80211_restart_hw(il->hw);
5667 mutex_lock(&il->mutex);
5668 if (test_bit(S_EXIT_PENDING, &il->status)) {
5669 mutex_unlock(&il->mutex);
5674 mutex_unlock(&il->mutex);
5679 il4965_bg_rx_replenish(struct work_struct *data)
5681 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
5683 if (test_bit(S_EXIT_PENDING, &il->status))
5686 mutex_lock(&il->mutex);
5687 il4965_rx_replenish(il);
5688 mutex_unlock(&il->mutex);
5691 /*****************************************************************************
5693 * mac80211 entry point functions
5695 *****************************************************************************/
5697 #define UCODE_READY_TIMEOUT (4 * HZ)
5700 * Not a mac80211 entry point function, but it fits in with all the
5701 * other mac80211 functions grouped here.
5704 il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length)
5707 struct ieee80211_hw *hw = il->hw;
5709 hw->rate_control_algorithm = "iwl-4965-rs";
5711 /* Tell mac80211 our characteristics */
5713 IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_AMPDU_AGGREGATION |
5714 IEEE80211_HW_NEED_DTIM_PERIOD | IEEE80211_HW_SPECTRUM_MGMT |
5715 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
5717 if (il->cfg->sku & IL_SKU_N)
5719 IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
5720 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
5722 hw->sta_data_size = sizeof(struct il_station_priv);
5723 hw->vif_data_size = sizeof(struct il_vif_priv);
5725 hw->wiphy->interface_modes =
5726 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
5729 WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
5730 WIPHY_FLAG_IBSS_RSN;
5733 * For now, disable PS by default because it affects
5734 * RX performance significantly.
5736 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
5738 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
5739 /* we create the 802.11 header and a zero-length SSID element */
5740 hw->wiphy->max_scan_ie_len = max_probe_length - 24 - 2;
5742 /* Default value; 4 EDCA QOS priorities */
5745 hw->max_listen_interval = IL_CONN_MAX_LISTEN_INTERVAL;
5747 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
5748 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5749 &il->bands[IEEE80211_BAND_2GHZ];
5750 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
5751 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5752 &il->bands[IEEE80211_BAND_5GHZ];
5756 ret = ieee80211_register_hw(il->hw);
5758 IL_ERR("Failed to register hw (error %d)\n", ret);
5761 il->mac80211_registered = 1;
5767 il4965_mac_start(struct ieee80211_hw *hw)
5769 struct il_priv *il = hw->priv;
5772 D_MAC80211("enter\n");
5774 /* we should be verifying the device is ready to be opened */
5775 mutex_lock(&il->mutex);
5776 ret = __il4965_up(il);
5777 mutex_unlock(&il->mutex);
5782 if (il_is_rfkill(il))
5785 D_INFO("Start UP work done.\n");
5787 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5788 * mac80211 will not be run successfully. */
5789 ret = wait_event_timeout(il->wait_command_queue,
5790 test_bit(S_READY, &il->status),
5791 UCODE_READY_TIMEOUT);
5793 if (!test_bit(S_READY, &il->status)) {
5794 IL_ERR("START_ALIVE timeout after %dms.\n",
5795 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5800 il4965_led_enable(il);
5804 D_MAC80211("leave\n");
5809 il4965_mac_stop(struct ieee80211_hw *hw)
5811 struct il_priv *il = hw->priv;
5813 D_MAC80211("enter\n");
5822 flush_workqueue(il->workqueue);
5824 /* User space software may expect getting rfkill changes
5825 * even if interface is down */
5826 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5827 il_enable_rfkill_int(il);
5829 D_MAC80211("leave\n");
5833 il4965_mac_tx(struct ieee80211_hw *hw,
5834 struct ieee80211_tx_control *control,
5835 struct sk_buff *skb)
5837 struct il_priv *il = hw->priv;
5839 D_MACDUMP("enter\n");
5841 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
5842 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
5844 if (il4965_tx_skb(il, control->sta, skb))
5845 dev_kfree_skb_any(skb);
5847 D_MACDUMP("leave\n");
5851 il4965_mac_update_tkip_key(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5852 struct ieee80211_key_conf *keyconf,
5853 struct ieee80211_sta *sta, u32 iv32, u16 * phase1key)
5855 struct il_priv *il = hw->priv;
5857 D_MAC80211("enter\n");
5859 il4965_update_tkip_key(il, keyconf, sta, iv32, phase1key);
5861 D_MAC80211("leave\n");
5865 il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
5866 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
5867 struct ieee80211_key_conf *key)
5869 struct il_priv *il = hw->priv;
5872 bool is_default_wep_key = false;
5874 D_MAC80211("enter\n");
5876 if (il->cfg->mod_params->sw_crypto) {
5877 D_MAC80211("leave - hwcrypto disabled\n");
5882 * To support IBSS RSN, don't program group keys in IBSS, the
5883 * hardware will then not attempt to decrypt the frames.
5885 if (vif->type == NL80211_IFTYPE_ADHOC &&
5886 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
5887 D_MAC80211("leave - ad-hoc group key\n");
5891 sta_id = il_sta_id_or_broadcast(il, sta);
5892 if (sta_id == IL_INVALID_STATION)
5895 mutex_lock(&il->mutex);
5896 il_scan_cancel_timeout(il, 100);
5899 * If we are getting WEP group key and we didn't receive any key mapping
5900 * so far, we are in legacy wep mode (group key only), otherwise we are
5902 * In legacy wep mode, we use another host command to the uCode.
5904 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
5905 key->cipher == WLAN_CIPHER_SUITE_WEP104) && !sta) {
5907 is_default_wep_key = !il->_4965.key_mapping_keys;
5909 is_default_wep_key =
5910 (key->hw_key_idx == HW_KEY_DEFAULT);
5915 if (is_default_wep_key)
5916 ret = il4965_set_default_wep_key(il, key);
5918 ret = il4965_set_dynamic_key(il, key, sta_id);
5920 D_MAC80211("enable hwcrypto key\n");
5923 if (is_default_wep_key)
5924 ret = il4965_remove_default_wep_key(il, key);
5926 ret = il4965_remove_dynamic_key(il, key, sta_id);
5928 D_MAC80211("disable hwcrypto key\n");
5934 mutex_unlock(&il->mutex);
5935 D_MAC80211("leave\n");
5941 il4965_mac_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5942 enum ieee80211_ampdu_mlme_action action,
5943 struct ieee80211_sta *sta, u16 tid, u16 * ssn,
5946 struct il_priv *il = hw->priv;
5949 D_HT("A-MPDU action on addr %pM tid %d\n", sta->addr, tid);
5951 if (!(il->cfg->sku & IL_SKU_N))
5954 mutex_lock(&il->mutex);
5957 case IEEE80211_AMPDU_RX_START:
5959 ret = il4965_sta_rx_agg_start(il, sta, tid, *ssn);
5961 case IEEE80211_AMPDU_RX_STOP:
5963 ret = il4965_sta_rx_agg_stop(il, sta, tid);
5964 if (test_bit(S_EXIT_PENDING, &il->status))
5967 case IEEE80211_AMPDU_TX_START:
5969 ret = il4965_tx_agg_start(il, vif, sta, tid, ssn);
5971 case IEEE80211_AMPDU_TX_STOP:
5973 ret = il4965_tx_agg_stop(il, vif, sta, tid);
5974 if (test_bit(S_EXIT_PENDING, &il->status))
5977 case IEEE80211_AMPDU_TX_OPERATIONAL:
5981 mutex_unlock(&il->mutex);
5987 il4965_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5988 struct ieee80211_sta *sta)
5990 struct il_priv *il = hw->priv;
5991 struct il_station_priv *sta_priv = (void *)sta->drv_priv;
5992 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
5996 D_INFO("received request to add station %pM\n", sta->addr);
5997 mutex_lock(&il->mutex);
5998 D_INFO("proceeding to add station %pM\n", sta->addr);
5999 sta_priv->common.sta_id = IL_INVALID_STATION;
6001 atomic_set(&sta_priv->pending_frames, 0);
6004 il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
6006 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
6007 /* Should we return success if return code is EEXIST ? */
6008 mutex_unlock(&il->mutex);
6012 sta_priv->common.sta_id = sta_id;
6014 /* Initialize rate scaling */
6015 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
6016 il4965_rs_rate_init(il, sta, sta_id);
6017 mutex_unlock(&il->mutex);
6023 il4965_mac_channel_switch(struct ieee80211_hw *hw,
6024 struct ieee80211_channel_switch *ch_switch)
6026 struct il_priv *il = hw->priv;
6027 const struct il_channel_info *ch_info;
6028 struct ieee80211_conf *conf = &hw->conf;
6029 struct ieee80211_channel *channel = ch_switch->channel;
6030 struct il_ht_config *ht_conf = &il->current_ht_config;
6033 D_MAC80211("enter\n");
6035 mutex_lock(&il->mutex);
6037 if (il_is_rfkill(il))
6040 if (test_bit(S_EXIT_PENDING, &il->status) ||
6041 test_bit(S_SCANNING, &il->status) ||
6042 test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
6045 if (!il_is_associated(il))
6048 if (!il->ops->set_channel_switch)
6051 ch = channel->hw_value;
6052 if (le16_to_cpu(il->active.channel) == ch)
6055 ch_info = il_get_channel_info(il, channel->band, ch);
6056 if (!il_is_channel_valid(ch_info)) {
6057 D_MAC80211("invalid channel\n");
6061 spin_lock_irq(&il->lock);
6063 il->current_ht_config.smps = conf->smps_mode;
6065 /* Configure HT40 channels */
6066 il->ht.enabled = conf_is_ht(conf);
6067 if (il->ht.enabled) {
6068 if (conf_is_ht40_minus(conf)) {
6069 il->ht.extension_chan_offset =
6070 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
6071 il->ht.is_40mhz = true;
6072 } else if (conf_is_ht40_plus(conf)) {
6073 il->ht.extension_chan_offset =
6074 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
6075 il->ht.is_40mhz = true;
6077 il->ht.extension_chan_offset =
6078 IEEE80211_HT_PARAM_CHA_SEC_NONE;
6079 il->ht.is_40mhz = false;
6082 il->ht.is_40mhz = false;
6084 if ((le16_to_cpu(il->staging.channel) != ch))
6085 il->staging.flags = 0;
6087 il_set_rxon_channel(il, channel);
6088 il_set_rxon_ht(il, ht_conf);
6089 il_set_flags_for_band(il, channel->band, il->vif);
6091 spin_unlock_irq(&il->lock);
6095 * at this point, staging_rxon has the
6096 * configuration for channel switch
6098 set_bit(S_CHANNEL_SWITCH_PENDING, &il->status);
6099 il->switch_channel = cpu_to_le16(ch);
6100 if (il->ops->set_channel_switch(il, ch_switch)) {
6101 clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status);
6102 il->switch_channel = 0;
6103 ieee80211_chswitch_done(il->vif, false);
6107 mutex_unlock(&il->mutex);
6108 D_MAC80211("leave\n");
6112 il4965_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
6113 unsigned int *total_flags, u64 multicast)
6115 struct il_priv *il = hw->priv;
6116 __le32 filter_or = 0, filter_nand = 0;
6118 #define CHK(test, flag) do { \
6119 if (*total_flags & (test)) \
6120 filter_or |= (flag); \
6122 filter_nand |= (flag); \
6125 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
6128 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
6129 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
6130 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
6131 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
6135 mutex_lock(&il->mutex);
6137 il->staging.filter_flags &= ~filter_nand;
6138 il->staging.filter_flags |= filter_or;
6141 * Not committing directly because hardware can perform a scan,
6142 * but we'll eventually commit the filter flags change anyway.
6145 mutex_unlock(&il->mutex);
6148 * Receiving all multicast frames is always enabled by the
6149 * default flags setup in il_connection_init_rx_config()
6150 * since we currently do not support programming multicast
6151 * filters into the device.
6154 FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6155 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6158 /*****************************************************************************
6160 * driver setup and teardown
6162 *****************************************************************************/
6165 il4965_bg_txpower_work(struct work_struct *work)
6167 struct il_priv *il = container_of(work, struct il_priv,
6170 mutex_lock(&il->mutex);
6172 /* If a scan happened to start before we got here
6173 * then just return; the stats notification will
6174 * kick off another scheduled work to compensate for
6175 * any temperature delta we missed here. */
6176 if (test_bit(S_EXIT_PENDING, &il->status) ||
6177 test_bit(S_SCANNING, &il->status))
6180 /* Regardless of if we are associated, we must reconfigure the
6181 * TX power since frames can be sent on non-radar channels while
6183 il->ops->send_tx_power(il);
6185 /* Update last_temperature to keep is_calib_needed from running
6186 * when it isn't needed... */
6187 il->last_temperature = il->temperature;
6189 mutex_unlock(&il->mutex);
6193 il4965_setup_deferred_work(struct il_priv *il)
6195 il->workqueue = create_singlethread_workqueue(DRV_NAME);
6197 init_waitqueue_head(&il->wait_command_queue);
6199 INIT_WORK(&il->restart, il4965_bg_restart);
6200 INIT_WORK(&il->rx_replenish, il4965_bg_rx_replenish);
6201 INIT_WORK(&il->run_time_calib_work, il4965_bg_run_time_calib_work);
6202 INIT_DELAYED_WORK(&il->init_alive_start, il4965_bg_init_alive_start);
6203 INIT_DELAYED_WORK(&il->alive_start, il4965_bg_alive_start);
6205 il_setup_scan_deferred_work(il);
6207 INIT_WORK(&il->txpower_work, il4965_bg_txpower_work);
6209 init_timer(&il->stats_periodic);
6210 il->stats_periodic.data = (unsigned long)il;
6211 il->stats_periodic.function = il4965_bg_stats_periodic;
6213 init_timer(&il->watchdog);
6214 il->watchdog.data = (unsigned long)il;
6215 il->watchdog.function = il_bg_watchdog;
6217 tasklet_init(&il->irq_tasklet,
6218 (void (*)(unsigned long))il4965_irq_tasklet,
6223 il4965_cancel_deferred_work(struct il_priv *il)
6225 cancel_work_sync(&il->txpower_work);
6226 cancel_delayed_work_sync(&il->init_alive_start);
6227 cancel_delayed_work(&il->alive_start);
6228 cancel_work_sync(&il->run_time_calib_work);
6230 il_cancel_scan_deferred_work(il);
6232 del_timer_sync(&il->stats_periodic);
6236 il4965_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
6240 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
6241 rates[i].bitrate = il_rates[i].ieee * 5;
6242 rates[i].hw_value = i; /* Rate scaling will work on idxes */
6243 rates[i].hw_value_short = i;
6245 if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) {
6247 * If CCK != 1M then set short preamble rate flag.
6250 (il_rates[i].plcp ==
6251 RATE_1M_PLCP) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
6257 * Acquire il->lock before calling this function !
6260 il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx)
6262 il_wr(il, HBUS_TARG_WRPTR, (idx & 0xff) | (txq_id << 8));
6263 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx);
6267 il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq,
6268 int tx_fifo_id, int scd_retry)
6270 int txq_id = txq->q.id;
6272 /* Find out whether to activate Tx queue */
6273 int active = test_bit(txq_id, &il->txq_ctx_active_msk) ? 1 : 0;
6275 /* Set up and activate */
6276 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
6277 (active << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
6278 (tx_fifo_id << IL49_SCD_QUEUE_STTS_REG_POS_TXF) |
6279 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_WSL) |
6280 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
6281 IL49_SCD_QUEUE_STTS_REG_MSK);
6283 txq->sched_retry = scd_retry;
6285 D_INFO("%s %s Queue %d on AC %d\n", active ? "Activate" : "Deactivate",
6286 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
6289 const struct ieee80211_ops il4965_mac_ops = {
6290 .tx = il4965_mac_tx,
6291 .start = il4965_mac_start,
6292 .stop = il4965_mac_stop,
6293 .add_interface = il_mac_add_interface,
6294 .remove_interface = il_mac_remove_interface,
6295 .change_interface = il_mac_change_interface,
6296 .config = il_mac_config,
6297 .configure_filter = il4965_configure_filter,
6298 .set_key = il4965_mac_set_key,
6299 .update_tkip_key = il4965_mac_update_tkip_key,
6300 .conf_tx = il_mac_conf_tx,
6301 .reset_tsf = il_mac_reset_tsf,
6302 .bss_info_changed = il_mac_bss_info_changed,
6303 .ampdu_action = il4965_mac_ampdu_action,
6304 .hw_scan = il_mac_hw_scan,
6305 .sta_add = il4965_mac_sta_add,
6306 .sta_remove = il_mac_sta_remove,
6307 .channel_switch = il4965_mac_channel_switch,
6308 .tx_last_beacon = il_mac_tx_last_beacon,
6312 il4965_init_drv(struct il_priv *il)
6316 spin_lock_init(&il->sta_lock);
6317 spin_lock_init(&il->hcmd_lock);
6319 INIT_LIST_HEAD(&il->free_frames);
6321 mutex_init(&il->mutex);
6323 il->ieee_channels = NULL;
6324 il->ieee_rates = NULL;
6325 il->band = IEEE80211_BAND_2GHZ;
6327 il->iw_mode = NL80211_IFTYPE_STATION;
6328 il->current_ht_config.smps = IEEE80211_SMPS_STATIC;
6329 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
6331 /* initialize force reset */
6332 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
6334 /* Choose which receivers/antennas to use */
6335 if (il->ops->set_rxon_chain)
6336 il->ops->set_rxon_chain(il);
6338 il_init_scan_params(il);
6340 ret = il_init_channel_map(il);
6342 IL_ERR("initializing regulatory failed: %d\n", ret);
6346 ret = il_init_geos(il);
6348 IL_ERR("initializing geos failed: %d\n", ret);
6349 goto err_free_channel_map;
6351 il4965_init_hw_rates(il, il->ieee_rates);
6355 err_free_channel_map:
6356 il_free_channel_map(il);
6362 il4965_uninit_drv(struct il_priv *il)
6365 il_free_channel_map(il);
6366 kfree(il->scan_cmd);
6370 il4965_hw_detect(struct il_priv *il)
6372 il->hw_rev = _il_rd(il, CSR_HW_REV);
6373 il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG);
6374 il->rev_id = il->pci_dev->revision;
6375 D_INFO("HW Revision ID = 0x%X\n", il->rev_id);
6378 static struct il_sensitivity_ranges il4965_sensitivity = {
6380 .max_nrg_cck = 0, /* not used, set to 0 */
6382 .auto_corr_min_ofdm = 85,
6383 .auto_corr_min_ofdm_mrc = 170,
6384 .auto_corr_min_ofdm_x1 = 105,
6385 .auto_corr_min_ofdm_mrc_x1 = 220,
6387 .auto_corr_max_ofdm = 120,
6388 .auto_corr_max_ofdm_mrc = 210,
6389 .auto_corr_max_ofdm_x1 = 140,
6390 .auto_corr_max_ofdm_mrc_x1 = 270,
6392 .auto_corr_min_cck = 125,
6393 .auto_corr_max_cck = 200,
6394 .auto_corr_min_cck_mrc = 200,
6395 .auto_corr_max_cck_mrc = 400,
6400 .barker_corr_th_min = 190,
6401 .barker_corr_th_min_mrc = 390,
6406 il4965_set_hw_params(struct il_priv *il)
6408 il->hw_params.bcast_id = IL4965_BROADCAST_ID;
6409 il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
6410 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
6411 if (il->cfg->mod_params->amsdu_size_8K)
6412 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_8K);
6414 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_4K);
6416 il->hw_params.max_beacon_itrvl = IL_MAX_UCODE_BEACON_INTERVAL;
6418 if (il->cfg->mod_params->disable_11n)
6419 il->cfg->sku &= ~IL_SKU_N;
6421 if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
6422 il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
6423 il->cfg->num_of_queues =
6424 il->cfg->mod_params->num_of_queues;
6426 il->hw_params.max_txq_num = il->cfg->num_of_queues;
6427 il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
6428 il->hw_params.scd_bc_tbls_size =
6429 il->cfg->num_of_queues *
6430 sizeof(struct il4965_scd_bc_tbl);
6432 il->hw_params.tfd_size = sizeof(struct il_tfd);
6433 il->hw_params.max_stations = IL4965_STATION_COUNT;
6434 il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
6435 il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
6436 il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
6437 il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
6439 il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR;
6441 il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
6442 il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
6443 il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
6444 il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
6446 il->hw_params.ct_kill_threshold =
6447 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
6449 il->hw_params.sens = &il4965_sensitivity;
6450 il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
6454 il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6458 struct ieee80211_hw *hw;
6459 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
6460 unsigned long flags;
6463 /************************
6464 * 1. Allocating HW data
6465 ************************/
6467 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il4965_mac_ops);
6474 SET_IEEE80211_DEV(hw, &pdev->dev);
6476 D_INFO("*** LOAD DRIVER ***\n");
6478 il->ops = &il4965_ops;
6479 #ifdef CONFIG_IWLEGACY_DEBUGFS
6480 il->debugfs_ops = &il4965_debugfs_ops;
6483 il->inta_mask = CSR_INI_SET_MASK;
6485 /**************************
6486 * 2. Initializing PCI bus
6487 **************************/
6488 pci_disable_link_state(pdev,
6489 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
6490 PCIE_LINK_STATE_CLKPM);
6492 if (pci_enable_device(pdev)) {
6494 goto out_ieee80211_free_hw;
6497 pci_set_master(pdev);
6499 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
6501 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
6503 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6506 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6507 /* both attempts failed: */
6509 IL_WARN("No suitable DMA available.\n");
6510 goto out_pci_disable_device;
6514 err = pci_request_regions(pdev, DRV_NAME);
6516 goto out_pci_disable_device;
6518 pci_set_drvdata(pdev, il);
6520 /***********************
6521 * 3. Read REV register
6522 ***********************/
6523 il->hw_base = pci_ioremap_bar(pdev, 0);
6526 goto out_pci_release_regions;
6529 D_INFO("pci_resource_len = 0x%08llx\n",
6530 (unsigned long long)pci_resource_len(pdev, 0));
6531 D_INFO("pci_resource_base = %p\n", il->hw_base);
6533 /* these spin locks will be used in apm_ops.init and EEPROM access
6534 * we should init now
6536 spin_lock_init(&il->reg_lock);
6537 spin_lock_init(&il->lock);
6540 * stop and reset the on-board processor just in case it is in a
6541 * strange state ... like being left stranded by a primary kernel
6542 * and this is now the kdump kernel trying to start up
6544 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6546 il4965_hw_detect(il);
6547 IL_INFO("Detected %s, REV=0x%X\n", il->cfg->name, il->hw_rev);
6549 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6550 * PCI Tx retries from interfering with C3 CPU state */
6551 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
6553 il4965_prepare_card_hw(il);
6554 if (!il->hw_ready) {
6555 IL_WARN("Failed, HW not ready\n");
6562 /* Read the EEPROM */
6563 err = il_eeprom_init(il);
6565 IL_ERR("Unable to init EEPROM\n");
6568 err = il4965_eeprom_check_version(il);
6570 goto out_free_eeprom;
6573 goto out_free_eeprom;
6575 /* extract MAC Address */
6576 il4965_eeprom_get_mac(il, il->addresses[0].addr);
6577 D_INFO("MAC address: %pM\n", il->addresses[0].addr);
6578 il->hw->wiphy->addresses = il->addresses;
6579 il->hw->wiphy->n_addresses = 1;
6581 /************************
6582 * 5. Setup HW constants
6583 ************************/
6584 il4965_set_hw_params(il);
6586 /*******************
6588 *******************/
6590 err = il4965_init_drv(il);
6592 goto out_free_eeprom;
6593 /* At this point both hw and il are initialized. */
6595 /********************
6597 ********************/
6598 spin_lock_irqsave(&il->lock, flags);
6599 il_disable_interrupts(il);
6600 spin_unlock_irqrestore(&il->lock, flags);
6602 pci_enable_msi(il->pci_dev);
6604 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
6606 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
6607 goto out_disable_msi;
6610 il4965_setup_deferred_work(il);
6611 il4965_setup_handlers(il);
6613 /*********************************************
6614 * 8. Enable interrupts and read RFKILL state
6615 *********************************************/
6617 /* enable rfkill interrupt: hw bug w/a */
6618 pci_read_config_word(il->pci_dev, PCI_COMMAND, &pci_cmd);
6619 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
6620 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
6621 pci_write_config_word(il->pci_dev, PCI_COMMAND, pci_cmd);
6624 il_enable_rfkill_int(il);
6626 /* If platform's RF_KILL switch is NOT set to KILL */
6627 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6628 clear_bit(S_RFKILL, &il->status);
6630 set_bit(S_RFKILL, &il->status);
6632 wiphy_rfkill_set_hw_state(il->hw->wiphy,
6633 test_bit(S_RFKILL, &il->status));
6635 il_power_initialize(il);
6637 init_completion(&il->_4965.firmware_loading_complete);
6639 err = il4965_request_firmware(il, true);
6641 goto out_destroy_workqueue;
6645 out_destroy_workqueue:
6646 destroy_workqueue(il->workqueue);
6647 il->workqueue = NULL;
6648 free_irq(il->pci_dev->irq, il);
6650 pci_disable_msi(il->pci_dev);
6651 il4965_uninit_drv(il);
6655 iounmap(il->hw_base);
6656 out_pci_release_regions:
6657 pci_set_drvdata(pdev, NULL);
6658 pci_release_regions(pdev);
6659 out_pci_disable_device:
6660 pci_disable_device(pdev);
6661 out_ieee80211_free_hw:
6662 ieee80211_free_hw(il->hw);
6667 static void __devexit
6668 il4965_pci_remove(struct pci_dev *pdev)
6670 struct il_priv *il = pci_get_drvdata(pdev);
6671 unsigned long flags;
6676 wait_for_completion(&il->_4965.firmware_loading_complete);
6678 D_INFO("*** UNLOAD DRIVER ***\n");
6680 il_dbgfs_unregister(il);
6681 sysfs_remove_group(&pdev->dev.kobj, &il_attribute_group);
6683 /* ieee80211_unregister_hw call wil cause il_mac_stop to
6684 * to be called and il4965_down since we are removing the device
6685 * we need to set S_EXIT_PENDING bit.
6687 set_bit(S_EXIT_PENDING, &il->status);
6691 if (il->mac80211_registered) {
6692 ieee80211_unregister_hw(il->hw);
6693 il->mac80211_registered = 0;
6699 * Make sure device is reset to low power before unloading driver.
6700 * This may be redundant with il4965_down(), but there are paths to
6701 * run il4965_down() without calling apm_ops.stop(), and there are
6702 * paths to avoid running il4965_down() at all before leaving driver.
6703 * This (inexpensive) call *makes sure* device is reset.
6707 /* make sure we flush any pending irq or
6708 * tasklet for the driver
6710 spin_lock_irqsave(&il->lock, flags);
6711 il_disable_interrupts(il);
6712 spin_unlock_irqrestore(&il->lock, flags);
6714 il4965_synchronize_irq(il);
6716 il4965_dealloc_ucode_pci(il);
6719 il4965_rx_queue_free(il, &il->rxq);
6720 il4965_hw_txq_ctx_free(il);
6724 /*netif_stop_queue(dev); */
6725 flush_workqueue(il->workqueue);
6727 /* ieee80211_unregister_hw calls il_mac_stop, which flushes
6728 * il->workqueue... so we can't take down the workqueue
6730 destroy_workqueue(il->workqueue);
6731 il->workqueue = NULL;
6733 free_irq(il->pci_dev->irq, il);
6734 pci_disable_msi(il->pci_dev);
6735 iounmap(il->hw_base);
6736 pci_release_regions(pdev);
6737 pci_disable_device(pdev);
6738 pci_set_drvdata(pdev, NULL);
6740 il4965_uninit_drv(il);
6742 dev_kfree_skb(il->beacon_skb);
6744 ieee80211_free_hw(il->hw);
6748 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
6749 * must be called under il->lock and mac access
6752 il4965_txq_set_sched(struct il_priv *il, u32 mask)
6754 il_wr_prph(il, IL49_SCD_TXFACT, mask);
6757 /*****************************************************************************
6759 * driver and module entry point
6761 *****************************************************************************/
6763 /* Hardware specific file defines the PCI IDs table for that hardware module */
6764 static DEFINE_PCI_DEVICE_TABLE(il4965_hw_card_ids) = {
6765 {IL_PCI_DEVICE(0x4229, PCI_ANY_ID, il4965_cfg)},
6766 {IL_PCI_DEVICE(0x4230, PCI_ANY_ID, il4965_cfg)},
6769 MODULE_DEVICE_TABLE(pci, il4965_hw_card_ids);
6771 static struct pci_driver il4965_driver = {
6773 .id_table = il4965_hw_card_ids,
6774 .probe = il4965_pci_probe,
6775 .remove = __devexit_p(il4965_pci_remove),
6776 .driver.pm = IL_LEGACY_PM_OPS,
6784 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
6785 pr_info(DRV_COPYRIGHT "\n");
6787 ret = il4965_rate_control_register();
6789 pr_err("Unable to register rate control algorithm: %d\n", ret);
6793 ret = pci_register_driver(&il4965_driver);
6795 pr_err("Unable to initialize PCI module\n");
6796 goto error_register;
6802 il4965_rate_control_unregister();
6809 pci_unregister_driver(&il4965_driver);
6810 il4965_rate_control_unregister();
6813 module_exit(il4965_exit);
6814 module_init(il4965_init);
6816 #ifdef CONFIG_IWLEGACY_DEBUG
6817 module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
6818 MODULE_PARM_DESC(debug, "debug output mask");
6821 module_param_named(swcrypto, il4965_mod_params.sw_crypto, int, S_IRUGO);
6822 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
6823 module_param_named(queues_num, il4965_mod_params.num_of_queues, int, S_IRUGO);
6824 MODULE_PARM_DESC(queues_num, "number of hw queues.");
6825 module_param_named(11n_disable, il4965_mod_params.disable_11n, int, S_IRUGO);
6826 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
6827 module_param_named(amsdu_size_8K, il4965_mod_params.amsdu_size_8K, int,
6829 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
6830 module_param_named(fw_restart, il4965_mod_params.restart_fw, int, S_IRUGO);
6831 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");