2 * OMAP2xxx APLL clock control functions
4 * Copyright (C) 2005-2008 Texas Instruments, Inc.
5 * Copyright (C) 2004-2010 Nokia Corporation
8 * Richard Woodruff <r-woodruff2@ti.com>
11 * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
12 * Gordon McNutt and RidgeRun, Inc.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
20 #include <linux/kernel.h>
21 #include <linux/clk.h>
26 #include "clock2xxx.h"
28 #include "cm-regbits-24xx.h"
30 /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
31 #define EN_APLL_STOPPED 0
32 #define EN_APLL_LOCKED 3
34 /* CM_CLKSEL1_PLL.APLLS_CLKIN options (24XX) */
35 #define APLLS_CLKIN_19_2MHZ 0
36 #define APLLS_CLKIN_13MHZ 2
37 #define APLLS_CLKIN_12MHZ 3
39 /* Private functions */
41 static int _apll96_enable(struct clk *clk)
43 return omap2xxx_cm_apll96_enable();
46 static int _apll54_enable(struct clk *clk)
48 return omap2xxx_cm_apll54_enable();
51 static void _apll96_allow_idle(struct clk *clk)
53 omap2xxx_cm_set_apll96_auto_low_power_stop();
56 static void _apll96_deny_idle(struct clk *clk)
58 omap2xxx_cm_set_apll96_disable_autoidle();
61 static void _apll54_allow_idle(struct clk *clk)
63 omap2xxx_cm_set_apll54_auto_low_power_stop();
66 static void _apll54_deny_idle(struct clk *clk)
68 omap2xxx_cm_set_apll54_disable_autoidle();
71 static void _apll96_disable(struct clk *clk)
73 omap2xxx_cm_apll96_disable();
76 static void _apll54_disable(struct clk *clk)
78 omap2xxx_cm_apll54_disable();
83 const struct clkops clkops_apll96 = {
84 .enable = _apll96_enable,
85 .disable = _apll96_disable,
86 .allow_idle = _apll96_allow_idle,
87 .deny_idle = _apll96_deny_idle,
90 const struct clkops clkops_apll54 = {
91 .enable = _apll54_enable,
92 .disable = _apll54_disable,
93 .allow_idle = _apll54_allow_idle,
94 .deny_idle = _apll54_deny_idle,
97 /* Public functions */
99 u32 omap2xxx_get_apll_clkin(void)
101 u32 aplls, srate = 0;
103 aplls = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
104 aplls &= OMAP24XX_APLLS_CLKIN_MASK;
105 aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;
107 if (aplls == APLLS_CLKIN_19_2MHZ)
109 else if (aplls == APLLS_CLKIN_13MHZ)
111 else if (aplls == APLLS_CLKIN_12MHZ)