drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2012 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/interrupt.h>
  31 #include <linux/types.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/highmem.h>
  39 #include <linux/uaccess.h>
  40
  41 #include "ixgbe.h"
  42
  43
  44 #define IXGBE_ALL_RAR_ENTRIES 16
  45
  46 enum {NETDEV_STATS, IXGBE_STATS};
  47
  48 struct ixgbe_stats {
  49         char stat_string[ETH_GSTRING_LEN];
  50         int type;
  51         int sizeof_stat;
  52         int stat_offset;
  53 };
  54
  55 #define IXGBE_STAT(m)           IXGBE_STATS, \
  56                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  57                                 offsetof(struct ixgbe_adapter, m)
  58 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  59                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  60                                 offsetof(struct rtnl_link_stats64, m)
  61
  62 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
  63         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  64         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  65         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  66         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  67         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  68         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  69         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  70         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  71         {"lsc_int", IXGBE_STAT(lsc_int)},
  72         {"tx_busy", IXGBE_STAT(tx_busy)},
  73         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  74         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  75         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  76         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  77         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  78         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  79         {"broadcast", IXGBE_STAT(stats.bprc)},
  80         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  81         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  82         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  83         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  84         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  85         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  86         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  87         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  88         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  89         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  90         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  91         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  92         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  93         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  94         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  95         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  96         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  97         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  98         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  99         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
 100         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 101         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 102         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 103         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 104         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 105         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 106         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 107         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 108         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 109         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 110         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 111         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 112 #ifdef IXGBE_FCOE
 113         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 114         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 115         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 116         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 117         {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
 118         {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
 119         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 120         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 121 #endif /* IXGBE_FCOE */
 122 };
 123
 124 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
 125  * we set the num_rx_queues to evaluate to num_tx_queues. This is
 126  * used because we do not have a good way to get the max number of
 127  * rx queues with CONFIG_RPS disabled.
 128  */
 129 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
 130
 131 #define IXGBE_QUEUE_STATS_LEN ( \
 132         (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
 133         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 134 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 135 #define IXGBE_PB_STATS_LEN ( \
 136                         (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 137                          sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 138                          sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 139                          sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 140                         / sizeof(u64))
 141 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 142                          IXGBE_PB_STATS_LEN + \
 143                          IXGBE_QUEUE_STATS_LEN)
 144
 145 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 146         "Register test  (offline)", "Eeprom test    (offline)",
 147         "Interrupt test (offline)", "Loopback test  (offline)",
 148         "Link test   (on/offline)"
 149 };
 150 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 151
 152 static int ixgbe_get_settings(struct net_device *netdev,
 153                               struct ethtool_cmd *ecmd)
 154 {
 155         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 156         struct ixgbe_hw *hw = &adapter->hw;
 157         ixgbe_link_speed supported_link;
 158         u32 link_speed = 0;
 159         bool autoneg;
 160         bool link_up;
 161
 162         hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
 163
 164         /* set the supported link speeds */
 165         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 166                 ecmd->supported |= SUPPORTED_10000baseT_Full;
 167         if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 168                 ecmd->supported |= SUPPORTED_1000baseT_Full;
 169         if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 170                 ecmd->supported |= SUPPORTED_100baseT_Full;
 171
 172         /* set the advertised speeds */
 173         if (hw->phy.autoneg_advertised) {
 174                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
 175                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 176                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 177                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 178                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 179                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 180         } else {
 181                 /* default modes in case phy.autoneg_advertised isn't set */
 182                 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 183                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 184                 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 185                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 186                 if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 187                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 188         }
 189
 190         if (autoneg) {
 191                 ecmd->supported |= SUPPORTED_Autoneg;
 192                 ecmd->advertising |= ADVERTISED_Autoneg;
 193                 ecmd->autoneg = AUTONEG_ENABLE;
 194         } else
 195                 ecmd->autoneg = AUTONEG_DISABLE;
 196
 197         ecmd->transceiver = XCVR_EXTERNAL;
 198
 199         /* Determine the remaining settings based on the PHY type. */
 200         switch (adapter->hw.phy.type) {
 201         case ixgbe_phy_tn:
 202         case ixgbe_phy_aq:
 203         case ixgbe_phy_cu_unknown:
 204                 ecmd->supported |= SUPPORTED_TP;
 205                 ecmd->advertising |= ADVERTISED_TP;
 206                 ecmd->port = PORT_TP;
 207                 break;
 208         case ixgbe_phy_qt:
 209                 ecmd->supported |= SUPPORTED_FIBRE;
 210                 ecmd->advertising |= ADVERTISED_FIBRE;
 211                 ecmd->port = PORT_FIBRE;
 212                 break;
 213         case ixgbe_phy_nl:
 214         case ixgbe_phy_sfp_passive_tyco:
 215         case ixgbe_phy_sfp_passive_unknown:
 216         case ixgbe_phy_sfp_ftl:
 217         case ixgbe_phy_sfp_avago:
 218         case ixgbe_phy_sfp_intel:
 219         case ixgbe_phy_sfp_unknown:
 220                 /* SFP+ devices, further checking needed */
 221                 switch (adapter->hw.phy.sfp_type) {
 222                 case ixgbe_sfp_type_da_cu:
 223                 case ixgbe_sfp_type_da_cu_core0:
 224                 case ixgbe_sfp_type_da_cu_core1:
 225                         ecmd->supported |= SUPPORTED_FIBRE;
 226                         ecmd->advertising |= ADVERTISED_FIBRE;
 227                         ecmd->port = PORT_DA;
 228                         break;
 229                 case ixgbe_sfp_type_sr:
 230                 case ixgbe_sfp_type_lr:
 231                 case ixgbe_sfp_type_srlr_core0:
 232                 case ixgbe_sfp_type_srlr_core1:
 233                         ecmd->supported |= SUPPORTED_FIBRE;
 234                         ecmd->advertising |= ADVERTISED_FIBRE;
 235                         ecmd->port = PORT_FIBRE;
 236                         break;
 237                 case ixgbe_sfp_type_not_present:
 238                         ecmd->supported |= SUPPORTED_FIBRE;
 239                         ecmd->advertising |= ADVERTISED_FIBRE;
 240                         ecmd->port = PORT_NONE;
 241                         break;
 242                 case ixgbe_sfp_type_1g_cu_core0:
 243                 case ixgbe_sfp_type_1g_cu_core1:
 244                         ecmd->supported |= SUPPORTED_TP;
 245                         ecmd->advertising |= ADVERTISED_TP;
 246                         ecmd->port = PORT_TP;
 247                         break;
 248                 case ixgbe_sfp_type_1g_sx_core0:
 249                 case ixgbe_sfp_type_1g_sx_core1:
 250                         ecmd->supported |= SUPPORTED_FIBRE;
 251                         ecmd->advertising |= ADVERTISED_FIBRE;
 252                         ecmd->port = PORT_FIBRE;
 253                         break;
 254                 case ixgbe_sfp_type_unknown:
 255                 default:
 256                         ecmd->supported |= SUPPORTED_FIBRE;
 257                         ecmd->advertising |= ADVERTISED_FIBRE;
 258                         ecmd->port = PORT_OTHER;
 259                         break;
 260                 }
 261                 break;
 262         case ixgbe_phy_xaui:
 263                 ecmd->supported |= SUPPORTED_FIBRE;
 264                 ecmd->advertising |= ADVERTISED_FIBRE;
 265                 ecmd->port = PORT_NONE;
 266                 break;
 267         case ixgbe_phy_unknown:
 268         case ixgbe_phy_generic:
 269         case ixgbe_phy_sfp_unsupported:
 270         default:
 271                 ecmd->supported |= SUPPORTED_FIBRE;
 272                 ecmd->advertising |= ADVERTISED_FIBRE;
 273                 ecmd->port = PORT_OTHER;
 274                 break;
 275         }
 276
 277         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 278         if (link_up) {
 279                 switch (link_speed) {
 280                 case IXGBE_LINK_SPEED_10GB_FULL:
 281                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 282                         break;
 283                 case IXGBE_LINK_SPEED_1GB_FULL:
 284                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 285                         break;
 286                 case IXGBE_LINK_SPEED_100_FULL:
 287                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 288                         break;
 289                 default:
 290                         break;
 291                 }
 292                 ecmd->duplex = DUPLEX_FULL;
 293         } else {
 294                 ethtool_cmd_speed_set(ecmd, -1);
 295                 ecmd->duplex = -1;
 296         }
 297
 298         return 0;
 299 }
 300
 301 static int ixgbe_set_settings(struct net_device *netdev,
 302                               struct ethtool_cmd *ecmd)
 303 {
 304         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 305         struct ixgbe_hw *hw = &adapter->hw;
 306         u32 advertised, old;
 307         s32 err = 0;
 308
 309         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 310             (hw->phy.multispeed_fiber)) {
 311                 /*
 312                  * this function does not support duplex forcing, but can
 313                  * limit the advertising of the adapter to the specified speed
 314                  */
 315                 if (ecmd->autoneg == AUTONEG_DISABLE)
 316                         return -EINVAL;
 317
 318                 if (ecmd->advertising & ~ecmd->supported)
 319                         return -EINVAL;
 320
 321                 old = hw->phy.autoneg_advertised;
 322                 advertised = 0;
 323                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 324                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 325
 326                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 327                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 328
 329                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 330                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 331
 332                 if (old == advertised)
 333                         return err;
 334                 /* this sets the link speed and restarts auto-neg */
 335                 hw->mac.autotry_restart = true;
 336                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 337                 if (err) {
 338                         e_info(probe, "setup link failed with code %d\n", err);
 339                         hw->mac.ops.setup_link(hw, old, true, true);
 340                 }
 341         } else {
 342                 /* in this case we currently only support 10Gb/FULL */
 343                 u32 speed = ethtool_cmd_speed(ecmd);
 344                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 345                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 346                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 347                         return -EINVAL;
 348         }
 349
 350         return err;
 351 }
 352
 353 static void ixgbe_get_pauseparam(struct net_device *netdev,
 354                                  struct ethtool_pauseparam *pause)
 355 {
 356         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 357         struct ixgbe_hw *hw = &adapter->hw;
 358
 359         if (hw->fc.disable_fc_autoneg)
 360                 pause->autoneg = 0;
 361         else
 362                 pause->autoneg = 1;
 363
 364         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 365                 pause->rx_pause = 1;
 366         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 367                 pause->tx_pause = 1;
 368         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 369                 pause->rx_pause = 1;
 370                 pause->tx_pause = 1;
 371         }
 372 }
 373
 374 static int ixgbe_set_pauseparam(struct net_device *netdev,
 375                                 struct ethtool_pauseparam *pause)
 376 {
 377         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 378         struct ixgbe_hw *hw = &adapter->hw;
 379         struct ixgbe_fc_info fc = hw->fc;
 380
 381         /* 82598 does no support link flow control with DCB enabled */
 382         if ((hw->mac.type == ixgbe_mac_82598EB) &&
 383             (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
 384                 return -EINVAL;
 385
 386         /* some devices do not support autoneg of link flow control */
 387         if ((pause->autoneg == AUTONEG_ENABLE) &&
 388             (ixgbe_device_supports_autoneg_fc(hw) != 0))
 389                 return -EINVAL;
 390
 391         fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
 392
 393         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 394                 fc.requested_mode = ixgbe_fc_full;
 395         else if (pause->rx_pause && !pause->tx_pause)
 396                 fc.requested_mode = ixgbe_fc_rx_pause;
 397         else if (!pause->rx_pause && pause->tx_pause)
 398                 fc.requested_mode = ixgbe_fc_tx_pause;
 399         else
 400                 fc.requested_mode = ixgbe_fc_none;
 401
 402         /* if the thing changed then we'll update and use new autoneg */
 403         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 404                 hw->fc = fc;
 405                 if (netif_running(netdev))
 406                         ixgbe_reinit_locked(adapter);
 407                 else
 408                         ixgbe_reset(adapter);
 409         }
 410
 411         return 0;
 412 }
 413
 414 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 415 {
 416         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 417         return adapter->msg_enable;
 418 }
 419
 420 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 421 {
 422         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 423         adapter->msg_enable = data;
 424 }
 425
 426 static int ixgbe_get_regs_len(struct net_device *netdev)
 427 {
 428 #define IXGBE_REGS_LEN  1129
 429         return IXGBE_REGS_LEN * sizeof(u32);
 430 }
 431
 432 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 433
 434 static void ixgbe_get_regs(struct net_device *netdev,
 435                            struct ethtool_regs *regs, void *p)
 436 {
 437         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 438         struct ixgbe_hw *hw = &adapter->hw;
 439         u32 *regs_buff = p;
 440         u8 i;
 441
 442         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 443
 444         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 445
 446         /* General Registers */
 447         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 448         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 449         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 450         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 451         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 452         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 453         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 454         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 455
 456         /* NVM Register */
 457         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 458         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 459         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 460         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 461         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 462         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 463         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 464         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 465         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 466         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 467
 468         /* Interrupt */
 469         /* don't read EICR because it can clear interrupt causes, instead
 470          * read EICS which is a shadow but doesn't clear EICR */
 471         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 472         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 473         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 474         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 475         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 476         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 477         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 478         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 479         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 480         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 481         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 482         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 483
 484         /* Flow Control */
 485         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 486         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 487         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 488         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 489         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 490         for (i = 0; i < 8; i++) {
 491                 switch (hw->mac.type) {
 492                 case ixgbe_mac_82598EB:
 493                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 494                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 495                         break;
 496                 case ixgbe_mac_82599EB:
 497                 case ixgbe_mac_X540:
 498                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 499                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 500                         break;
 501                 default:
 502                         break;
 503                 }
 504         }
 505         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 506         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 507
 508         /* Receive DMA */
 509         for (i = 0; i < 64; i++)
 510                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 511         for (i = 0; i < 64; i++)
 512                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 513         for (i = 0; i < 64; i++)
 514                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 515         for (i = 0; i < 64; i++)
 516                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 517         for (i = 0; i < 64; i++)
 518                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 519         for (i = 0; i < 64; i++)
 520                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 521         for (i = 0; i < 16; i++)
 522                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 523         for (i = 0; i < 16; i++)
 524                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 525         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 526         for (i = 0; i < 8; i++)
 527                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 528         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 529         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 530
 531         /* Receive */
 532         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 533         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 534         for (i = 0; i < 16; i++)
 535                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 536         for (i = 0; i < 16; i++)
 537                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 538         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 539         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 540         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 541         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 542         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 543         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 544         for (i = 0; i < 8; i++)
 545                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 546         for (i = 0; i < 8; i++)
 547                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 548         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 549
 550         /* Transmit */
 551         for (i = 0; i < 32; i++)
 552                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 553         for (i = 0; i < 32; i++)
 554                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 555         for (i = 0; i < 32; i++)
 556                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 557         for (i = 0; i < 32; i++)
 558                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 559         for (i = 0; i < 32; i++)
 560                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 561         for (i = 0; i < 32; i++)
 562                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 563         for (i = 0; i < 32; i++)
 564                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 565         for (i = 0; i < 32; i++)
 566                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 567         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 568         for (i = 0; i < 16; i++)
 569                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 570         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 571         for (i = 0; i < 8; i++)
 572                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 573         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 574
 575         /* Wake Up */
 576         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 577         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 578         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 579         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 580         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 581         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 582         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 583         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 584         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 585
 586         /* DCB */
 587         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 588         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 589         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 590         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 591         for (i = 0; i < 8; i++)
 592                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 593         for (i = 0; i < 8; i++)
 594                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 595         for (i = 0; i < 8; i++)
 596                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 597         for (i = 0; i < 8; i++)
 598                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 599         for (i = 0; i < 8; i++)
 600                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 601         for (i = 0; i < 8; i++)
 602                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 603
 604         /* Statistics */
 605         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 606         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 607         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 608         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 609         for (i = 0; i < 8; i++)
 610                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 611         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 612         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 613         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 614         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 615         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 616         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 617         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 618         for (i = 0; i < 8; i++)
 619                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 620         for (i = 0; i < 8; i++)
 621                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 622         for (i = 0; i < 8; i++)
 623                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 624         for (i = 0; i < 8; i++)
 625                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 626         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 627         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 628         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 629         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 630         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 631         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 632         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 633         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 634         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 635         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 636         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 637         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 638         for (i = 0; i < 8; i++)
 639                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 640         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 641         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 642         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 643         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 644         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 645         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 646         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 647         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 648         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 649         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 650         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 651         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 652         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 653         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 654         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 655         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 656         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 657         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 658         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 659         for (i = 0; i < 16; i++)
 660                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 661         for (i = 0; i < 16; i++)
 662                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 663         for (i = 0; i < 16; i++)
 664                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 665         for (i = 0; i < 16; i++)
 666                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 667
 668         /* MAC */
 669         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 670         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 671         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 672         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 673         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 674         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 675         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 676         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 677         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 678         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 679         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 680         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 681         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 682         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 683         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 684         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 685         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 686         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 687         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 688         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 689         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 690         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 691         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 692         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 693         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 694         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 695         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 696         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 697         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 698         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 699         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 700         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 701         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 702
 703         /* Diagnostic */
 704         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 705         for (i = 0; i < 8; i++)
 706                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 707         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 708         for (i = 0; i < 4; i++)
 709                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 710         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 711         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 712         for (i = 0; i < 8; i++)
 713                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 714         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 715         for (i = 0; i < 4; i++)
 716                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 717         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 718         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 719         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 720         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 721         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 722         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 723         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 724         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 725         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 726         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 727         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 728         for (i = 0; i < 8; i++)
 729                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 730         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 731         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 732         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 733         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 734         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 735         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 736         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 737         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 738         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 739
 740         /* 82599 X540 specific registers  */
 741         regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
 742 }
 743
 744 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 745 {
 746         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 747         return adapter->hw.eeprom.word_size * 2;
 748 }
 749
 750 static int ixgbe_get_eeprom(struct net_device *netdev,
 751                             struct ethtool_eeprom *eeprom, u8 *bytes)
 752 {
 753         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 754         struct ixgbe_hw *hw = &adapter->hw;
 755         u16 *eeprom_buff;
 756         int first_word, last_word, eeprom_len;
 757         int ret_val = 0;
 758         u16 i;
 759
 760         if (eeprom->len == 0)
 761                 return -EINVAL;
 762
 763         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 764
 765         first_word = eeprom->offset >> 1;
 766         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 767         eeprom_len = last_word - first_word + 1;
 768
 769         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 770         if (!eeprom_buff)
 771                 return -ENOMEM;
 772
 773         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 774                                              eeprom_buff);
 775
 776         /* Device's eeprom is always little-endian, word addressable */
 777         for (i = 0; i < eeprom_len; i++)
 778                 le16_to_cpus(&eeprom_buff[i]);
 779
 780         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 781         kfree(eeprom_buff);
 782
 783         return ret_val;
 784 }
 785
 786 static int ixgbe_set_eeprom(struct net_device *netdev,
 787                             struct ethtool_eeprom *eeprom, u8 *bytes)
 788 {
 789         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 790         struct ixgbe_hw *hw = &adapter->hw;
 791         u16 *eeprom_buff;
 792         void *ptr;
 793         int max_len, first_word, last_word, ret_val = 0;
 794         u16 i;
 795
 796         if (eeprom->len == 0)
 797                 return -EINVAL;
 798
 799         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 800                 return -EINVAL;
 801
 802         max_len = hw->eeprom.word_size * 2;
 803
 804         first_word = eeprom->offset >> 1;
 805         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 806         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 807         if (!eeprom_buff)
 808                 return -ENOMEM;
 809
 810         ptr = eeprom_buff;
 811
 812         if (eeprom->offset & 1) {
 813                 /*
 814                  * need read/modify/write of first changed EEPROM word
 815                  * only the second byte of the word is being modified
 816                  */
 817                 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
 818                 if (ret_val)
 819                         goto err;
 820
 821                 ptr++;
 822         }
 823         if ((eeprom->offset + eeprom->len) & 1) {
 824                 /*
 825                  * need read/modify/write of last changed EEPROM word
 826                  * only the first byte of the word is being modified
 827                  */
 828                 ret_val = hw->eeprom.ops.read(hw, last_word,
 829                                           &eeprom_buff[last_word - first_word]);
 830                 if (ret_val)
 831                         goto err;
 832         }
 833
 834         /* Device's eeprom is always little-endian, word addressable */
 835         for (i = 0; i < last_word - first_word + 1; i++)
 836                 le16_to_cpus(&eeprom_buff[i]);
 837
 838         memcpy(ptr, bytes, eeprom->len);
 839
 840         for (i = 0; i < last_word - first_word + 1; i++)
 841                 cpu_to_le16s(&eeprom_buff[i]);
 842
 843         ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
 844                                               last_word - first_word + 1,
 845                                               eeprom_buff);
 846
 847         /* Update the checksum */
 848         if (ret_val == 0)
 849                 hw->eeprom.ops.update_checksum(hw);
 850
 851 err:
 852         kfree(eeprom_buff);
 853         return ret_val;
 854 }
 855
 856 static void ixgbe_get_drvinfo(struct net_device *netdev,
 857                               struct ethtool_drvinfo *drvinfo)
 858 {
 859         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 860         u32 nvm_track_id;
 861
 862         strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 863         strlcpy(drvinfo->version, ixgbe_driver_version,
 864                 sizeof(drvinfo->version));
 865
 866         nvm_track_id = (adapter->eeprom_verh << 16) |
 867                         adapter->eeprom_verl;
 868         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "0x%08x",
 869                  nvm_track_id);
 870
 871         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 872                 sizeof(drvinfo->bus_info));
 873         drvinfo->n_stats = IXGBE_STATS_LEN;
 874         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 875         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 876 }
 877
 878 static void ixgbe_get_ringparam(struct net_device *netdev,
 879                                 struct ethtool_ringparam *ring)
 880 {
 881         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 882         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 883         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 884
 885         ring->rx_max_pending = IXGBE_MAX_RXD;
 886         ring->tx_max_pending = IXGBE_MAX_TXD;
 887         ring->rx_pending = rx_ring->count;
 888         ring->tx_pending = tx_ring->count;
 889 }
 890
 891 static int ixgbe_set_ringparam(struct net_device *netdev,
 892                                struct ethtool_ringparam *ring)
 893 {
 894         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 895         struct ixgbe_ring *temp_ring;
 896         int i, err = 0;
 897         u32 new_rx_count, new_tx_count;
 898
 899         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 900                 return -EINVAL;
 901
 902         new_tx_count = clamp_t(u32, ring->tx_pending,
 903                                IXGBE_MIN_TXD, IXGBE_MAX_TXD);
 904         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 905
 906         new_rx_count = clamp_t(u32, ring->rx_pending,
 907                                IXGBE_MIN_RXD, IXGBE_MAX_RXD);
 908         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 909
 910         if ((new_tx_count == adapter->tx_ring_count) &&
 911             (new_rx_count == adapter->rx_ring_count)) {
 912                 /* nothing to do */
 913                 return 0;
 914         }
 915
 916         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 917                 usleep_range(1000, 2000);
 918
 919         if (!netif_running(adapter->netdev)) {
 920                 for (i = 0; i < adapter->num_tx_queues; i++)
 921                         adapter->tx_ring[i]->count = new_tx_count;
 922                 for (i = 0; i < adapter->num_rx_queues; i++)
 923                         adapter->rx_ring[i]->count = new_rx_count;
 924                 adapter->tx_ring_count = new_tx_count;
 925                 adapter->rx_ring_count = new_rx_count;
 926                 goto clear_reset;
 927         }
 928
 929         /* allocate temporary buffer to store rings in */
 930         i = max_t(int, adapter->num_tx_queues, adapter->num_rx_queues);
 931         temp_ring = vmalloc(i * sizeof(struct ixgbe_ring));
 932
 933         if (!temp_ring) {
 934                 err = -ENOMEM;
 935                 goto clear_reset;
 936         }
 937
 938         ixgbe_down(adapter);
 939
 940         /*
 941          * Setup new Tx resources and free the old Tx resources in that order.
 942          * We can then assign the new resources to the rings via a memcpy.
 943          * The advantage to this approach is that we are guaranteed to still
 944          * have resources even in the case of an allocation failure.
 945          */
 946         if (new_tx_count != adapter->tx_ring_count) {
 947                 for (i = 0; i < adapter->num_tx_queues; i++) {
 948                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 949                                sizeof(struct ixgbe_ring));
 950
 951                         temp_ring[i].count = new_tx_count;
 952                         err = ixgbe_setup_tx_resources(&temp_ring[i]);
 953                         if (err) {
 954                                 while (i) {
 955                                         i--;
 956                                         ixgbe_free_tx_resources(&temp_ring[i]);
 957                                 }
 958                                 goto err_setup;
 959                         }
 960                 }
 961
 962                 for (i = 0; i < adapter->num_tx_queues; i++) {
 963                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
 964
 965                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 966                                sizeof(struct ixgbe_ring));
 967                 }
 968
 969                 adapter->tx_ring_count = new_tx_count;
 970         }
 971
 972         /* Repeat the process for the Rx rings if needed */
 973         if (new_rx_count != adapter->rx_ring_count) {
 974                 for (i = 0; i < adapter->num_rx_queues; i++) {
 975                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 976                                sizeof(struct ixgbe_ring));
 977
 978                         temp_ring[i].count = new_rx_count;
 979                         err = ixgbe_setup_rx_resources(&temp_ring[i]);
 980                         if (err) {
 981                                 while (i) {
 982                                         i--;
 983                                         ixgbe_free_rx_resources(&temp_ring[i]);
 984                                 }
 985                                 goto err_setup;
 986                         }
 987
 988                 }
 989
 990                 for (i = 0; i < adapter->num_rx_queues; i++) {
 991                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
 992
 993                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 994                                sizeof(struct ixgbe_ring));
 995                 }
 996
 997                 adapter->rx_ring_count = new_rx_count;
 998         }
 999
1000 err_setup:
1001         ixgbe_up(adapter);
1002         vfree(temp_ring);
1003 clear_reset:
1004         clear_bit(__IXGBE_RESETTING, &adapter->state);
1005         return err;
1006 }
1007
1008 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1009 {
1010         switch (sset) {
1011         case ETH_SS_TEST:
1012                 return IXGBE_TEST_LEN;
1013         case ETH_SS_STATS:
1014                 return IXGBE_STATS_LEN;
1015         default:
1016                 return -EOPNOTSUPP;
1017         }
1018 }
1019
1020 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1021                                     struct ethtool_stats *stats, u64 *data)
1022 {
1023         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1024         struct rtnl_link_stats64 temp;
1025         const struct rtnl_link_stats64 *net_stats;
1026         unsigned int start;
1027         struct ixgbe_ring *ring;
1028         int i, j;
1029         char *p = NULL;
1030
1031         ixgbe_update_stats(adapter);
1032         net_stats = dev_get_stats(netdev, &temp);
1033         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1034                 switch (ixgbe_gstrings_stats[i].type) {
1035                 case NETDEV_STATS:
1036                         p = (char *) net_stats +
1037                                         ixgbe_gstrings_stats[i].stat_offset;
1038                         break;
1039                 case IXGBE_STATS:
1040                         p = (char *) adapter +
1041                                         ixgbe_gstrings_stats[i].stat_offset;
1042                         break;
1043                 }
1044
1045                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1046                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1047         }
1048         for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1049                 ring = adapter->tx_ring[j];
1050                 if (!ring) {
1051                         data[i] = 0;
1052                         data[i+1] = 0;
1053                         i += 2;
1054                         continue;
1055                 }
1056
1057                 do {
1058                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1059                         data[i]   = ring->stats.packets;
1060                         data[i+1] = ring->stats.bytes;
1061                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1062                 i += 2;
1063         }
1064         for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1065                 ring = adapter->rx_ring[j];
1066                 if (!ring) {
1067                         data[i] = 0;
1068                         data[i+1] = 0;
1069                         i += 2;
1070                         continue;
1071                 }
1072
1073                 do {
1074                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1075                         data[i]   = ring->stats.packets;
1076                         data[i+1] = ring->stats.bytes;
1077                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1078                 i += 2;
1079         }
1080
1081         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1082                 data[i++] = adapter->stats.pxontxc[j];
1083                 data[i++] = adapter->stats.pxofftxc[j];
1084         }
1085         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1086                 data[i++] = adapter->stats.pxonrxc[j];
1087                 data[i++] = adapter->stats.pxoffrxc[j];
1088         }
1089 }
1090
1091 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1092                               u8 *data)
1093 {
1094         char *p = (char *)data;
1095         int i;
1096
1097         switch (stringset) {
1098         case ETH_SS_TEST:
1099                 memcpy(data, *ixgbe_gstrings_test,
1100                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1101                 break;
1102         case ETH_SS_STATS:
1103                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1104                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1105                                ETH_GSTRING_LEN);
1106                         p += ETH_GSTRING_LEN;
1107                 }
1108                 for (i = 0; i < netdev->num_tx_queues; i++) {
1109                         sprintf(p, "tx_queue_%u_packets", i);
1110                         p += ETH_GSTRING_LEN;
1111                         sprintf(p, "tx_queue_%u_bytes", i);
1112                         p += ETH_GSTRING_LEN;
1113                 }
1114                 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1115                         sprintf(p, "rx_queue_%u_packets", i);
1116                         p += ETH_GSTRING_LEN;
1117                         sprintf(p, "rx_queue_%u_bytes", i);
1118                         p += ETH_GSTRING_LEN;
1119                 }
1120                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1121                         sprintf(p, "tx_pb_%u_pxon", i);
1122                         p += ETH_GSTRING_LEN;
1123                         sprintf(p, "tx_pb_%u_pxoff", i);
1124                         p += ETH_GSTRING_LEN;
1125                 }
1126                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1127                         sprintf(p, "rx_pb_%u_pxon", i);
1128                         p += ETH_GSTRING_LEN;
1129                         sprintf(p, "rx_pb_%u_pxoff", i);
1130                         p += ETH_GSTRING_LEN;
1131                 }
1132                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1133                 break;
1134         }
1135 }
1136
1137 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1138 {
1139         struct ixgbe_hw *hw = &adapter->hw;
1140         bool link_up;
1141         u32 link_speed = 0;
1142         *data = 0;
1143
1144         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1145         if (link_up)
1146                 return *data;
1147         else
1148                 *data = 1;
1149         return *data;
1150 }
1151
1152 /* ethtool register test data */
1153 struct ixgbe_reg_test {
1154         u16 reg;
1155         u8  array_len;
1156         u8  test_type;
1157         u32 mask;
1158         u32 write;
1159 };
1160
1161 /* In the hardware, registers are laid out either singly, in arrays
1162  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1163  * most tests take place on arrays or single registers (handled
1164  * as a single-element array) and special-case the tables.
1165  * Table tests are always pattern tests.
1166  *
1167  * We also make provision for some required setup steps by specifying
1168  * registers to be written without any read-back testing.
1169  */
1170
1171 #define PATTERN_TEST    1
1172 #define SET_READ_TEST   2
1173 #define WRITE_NO_TEST   3
1174 #define TABLE32_TEST    4
1175 #define TABLE64_TEST_LO 5
1176 #define TABLE64_TEST_HI 6
1177
1178 /* default 82599 register test */
1179 static const struct ixgbe_reg_test reg_test_82599[] = {
1180         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1181         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1182         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1183         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1184         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1185         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1186         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1187         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1188         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1189         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1190         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1191         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1192         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1193         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1194         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1195         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1196         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1197         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1198         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1199         { 0, 0, 0, 0 }
1200 };
1201
1202 /* default 82598 register test */
1203 static const struct ixgbe_reg_test reg_test_82598[] = {
1204         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1205         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1206         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1207         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1208         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1209         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1210         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1211         /* Enable all four RX queues before testing. */
1212         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1213         /* RDH is read-only for 82598, only test RDT. */
1214         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1215         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1216         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1217         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1218         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1219         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1220         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1221         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1222         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1223         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1224         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1225         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1226         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1227         { 0, 0, 0, 0 }
1228 };
1229
1230 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1231                              u32 mask, u32 write)
1232 {
1233         u32 pat, val, before;
1234         static const u32 test_pattern[] = {
1235                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1236
1237         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1238                 before = readl(adapter->hw.hw_addr + reg);
1239                 writel((test_pattern[pat] & write),
1240                        (adapter->hw.hw_addr + reg));
1241                 val = readl(adapter->hw.hw_addr + reg);
1242                 if (val != (test_pattern[pat] & write & mask)) {
1243                         e_err(drv, "pattern test reg %04X failed: got "
1244                               "0x%08X expected 0x%08X\n",
1245                               reg, val, (test_pattern[pat] & write & mask));
1246                         *data = reg;
1247                         writel(before, adapter->hw.hw_addr + reg);
1248                         return 1;
1249                 }
1250                 writel(before, adapter->hw.hw_addr + reg);
1251         }
1252         return 0;
1253 }
1254
1255 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1256                               u32 mask, u32 write)
1257 {
1258         u32 val, before;
1259         before = readl(adapter->hw.hw_addr + reg);
1260         writel((write & mask), (adapter->hw.hw_addr + reg));
1261         val = readl(adapter->hw.hw_addr + reg);
1262         if ((write & mask) != (val & mask)) {
1263                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "
1264                       "expected 0x%08X\n", reg, (val & mask), (write & mask));
1265                 *data = reg;
1266                 writel(before, (adapter->hw.hw_addr + reg));
1267                 return 1;
1268         }
1269         writel(before, (adapter->hw.hw_addr + reg));
1270         return 0;
1271 }
1272
1273 #define REG_PATTERN_TEST(reg, mask, write)                                    \
1274         do {                                                                  \
1275                 if (reg_pattern_test(adapter, data, reg, mask, write))        \
1276                         return 1;                                             \
1277         } while (0)                                                           \
1278
1279
1280 #define REG_SET_AND_CHECK(reg, mask, write)                                   \
1281         do {                                                                  \
1282                 if (reg_set_and_check(adapter, data, reg, mask, write))       \
1283                         return 1;                                             \
1284         } while (0)                                                           \
1285
1286 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1287 {
1288         const struct ixgbe_reg_test *test;
1289         u32 value, before, after;
1290         u32 i, toggle;
1291
1292         switch (adapter->hw.mac.type) {
1293         case ixgbe_mac_82598EB:
1294                 toggle = 0x7FFFF3FF;
1295                 test = reg_test_82598;
1296                 break;
1297         case ixgbe_mac_82599EB:
1298         case ixgbe_mac_X540:
1299                 toggle = 0x7FFFF30F;
1300                 test = reg_test_82599;
1301                 break;
1302         default:
1303                 *data = 1;
1304                 return 1;
1305                 break;
1306         }
1307
1308         /*
1309          * Because the status register is such a special case,
1310          * we handle it separately from the rest of the register
1311          * tests.  Some bits are read-only, some toggle, and some
1312          * are writeable on newer MACs.
1313          */
1314         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1315         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1316         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1317         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1318         if (value != after) {
1319                 e_err(drv, "failed STATUS register test got: 0x%08X "
1320                       "expected: 0x%08X\n", after, value);
1321                 *data = 1;
1322                 return 1;
1323         }
1324         /* restore previous status */
1325         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1326
1327         /*
1328          * Perform the remainder of the register test, looping through
1329          * the test table until we either fail or reach the null entry.
1330          */
1331         while (test->reg) {
1332                 for (i = 0; i < test->array_len; i++) {
1333                         switch (test->test_type) {
1334                         case PATTERN_TEST:
1335                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1336                                                  test->mask,
1337                                                  test->write);
1338                                 break;
1339                         case SET_READ_TEST:
1340                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1341                                                   test->mask,
1342                                                   test->write);
1343                                 break;
1344                         case WRITE_NO_TEST:
1345                                 writel(test->write,
1346                                        (adapter->hw.hw_addr + test->reg)
1347                                        + (i * 0x40));
1348                                 break;
1349                         case TABLE32_TEST:
1350                                 REG_PATTERN_TEST(test->reg + (i * 4),
1351                                                  test->mask,
1352                                                  test->write);
1353                                 break;
1354                         case TABLE64_TEST_LO:
1355                                 REG_PATTERN_TEST(test->reg + (i * 8),
1356                                                  test->mask,
1357                                                  test->write);
1358                                 break;
1359                         case TABLE64_TEST_HI:
1360                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1361                                                  test->mask,
1362                                                  test->write);
1363                                 break;
1364                         }
1365                 }
1366                 test++;
1367         }
1368
1369         *data = 0;
1370         return 0;
1371 }
1372
1373 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1374 {
1375         struct ixgbe_hw *hw = &adapter->hw;
1376         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1377                 *data = 1;
1378         else
1379                 *data = 0;
1380         return *data;
1381 }
1382
1383 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1384 {
1385         struct net_device *netdev = (struct net_device *) data;
1386         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1387
1388         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1389
1390         return IRQ_HANDLED;
1391 }
1392
1393 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1394 {
1395         struct net_device *netdev = adapter->netdev;
1396         u32 mask, i = 0, shared_int = true;
1397         u32 irq = adapter->pdev->irq;
1398
1399         *data = 0;
1400
1401         /* Hook up test interrupt handler just for this test */
1402         if (adapter->msix_entries) {
1403                 /* NOTE: we don't test MSI-X interrupts here, yet */
1404                 return 0;
1405         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1406                 shared_int = false;
1407                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1408                                 netdev)) {
1409                         *data = 1;
1410                         return -1;
1411                 }
1412         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1413                                 netdev->name, netdev)) {
1414                 shared_int = false;
1415         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1416                                netdev->name, netdev)) {
1417                 *data = 1;
1418                 return -1;
1419         }
1420         e_info(hw, "testing %s interrupt\n", shared_int ?
1421                "shared" : "unshared");
1422
1423         /* Disable all the interrupts */
1424         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1425         IXGBE_WRITE_FLUSH(&adapter->hw);
1426         usleep_range(10000, 20000);
1427
1428         /* Test each interrupt */
1429         for (; i < 10; i++) {
1430                 /* Interrupt to test */
1431                 mask = 1 << i;
1432
1433                 if (!shared_int) {
1434                         /*
1435                          * Disable the interrupts to be reported in
1436                          * the cause register and then force the same
1437                          * interrupt and see if one gets posted.  If
1438                          * an interrupt was posted to the bus, the
1439                          * test failed.
1440                          */
1441                         adapter->test_icr = 0;
1442                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1443                                         ~mask & 0x00007FFF);
1444                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1445                                         ~mask & 0x00007FFF);
1446                         IXGBE_WRITE_FLUSH(&adapter->hw);
1447                         usleep_range(10000, 20000);
1448
1449                         if (adapter->test_icr & mask) {
1450                                 *data = 3;
1451                                 break;
1452                         }
1453                 }
1454
1455                 /*
1456                  * Enable the interrupt to be reported in the cause
1457                  * register and then force the same interrupt and see
1458                  * if one gets posted.  If an interrupt was not posted
1459                  * to the bus, the test failed.
1460                  */
1461                 adapter->test_icr = 0;
1462                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1463                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1464                 IXGBE_WRITE_FLUSH(&adapter->hw);
1465                 usleep_range(10000, 20000);
1466
1467                 if (!(adapter->test_icr &mask)) {
1468                         *data = 4;
1469                         break;
1470                 }
1471
1472                 if (!shared_int) {
1473                         /*
1474                          * Disable the other interrupts to be reported in
1475                          * the cause register and then force the other
1476                          * interrupts and see if any get posted.  If
1477                          * an interrupt was posted to the bus, the
1478                          * test failed.
1479                          */
1480                         adapter->test_icr = 0;
1481                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1482                                         ~mask & 0x00007FFF);
1483                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1484                                         ~mask & 0x00007FFF);
1485                         IXGBE_WRITE_FLUSH(&adapter->hw);
1486                         usleep_range(10000, 20000);
1487
1488                         if (adapter->test_icr) {
1489                                 *data = 5;
1490                                 break;
1491                         }
1492                 }
1493         }
1494
1495         /* Disable all the interrupts */
1496         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1497         IXGBE_WRITE_FLUSH(&adapter->hw);
1498         usleep_range(10000, 20000);
1499
1500         /* Unhook test interrupt handler */
1501         free_irq(irq, netdev);
1502
1503         return *data;
1504 }
1505
1506 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1507 {
1508         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1509         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1510         struct ixgbe_hw *hw = &adapter->hw;
1511         u32 reg_ctl;
1512
1513         /* shut down the DMA engines now so they can be reinitialized later */
1514
1515         /* first Rx */
1516         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1517         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1518         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1519         ixgbe_disable_rx_queue(adapter, rx_ring);
1520
1521         /* now Tx */
1522         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1523         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1524         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1525
1526         switch (hw->mac.type) {
1527         case ixgbe_mac_82599EB:
1528         case ixgbe_mac_X540:
1529                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1530                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1531                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1532                 break;
1533         default:
1534                 break;
1535         }
1536
1537         ixgbe_reset(adapter);
1538
1539         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1540         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1541 }
1542
1543 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1544 {
1545         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1546         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1547         u32 rctl, reg_data;
1548         int ret_val;
1549         int err;
1550
1551         /* Setup Tx descriptor ring and Tx buffers */
1552         tx_ring->count = IXGBE_DEFAULT_TXD;
1553         tx_ring->queue_index = 0;
1554         tx_ring->dev = &adapter->pdev->dev;
1555         tx_ring->netdev = adapter->netdev;
1556         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1557
1558         err = ixgbe_setup_tx_resources(tx_ring);
1559         if (err)
1560                 return 1;
1561
1562         switch (adapter->hw.mac.type) {
1563         case ixgbe_mac_82599EB:
1564         case ixgbe_mac_X540:
1565                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1566                 reg_data |= IXGBE_DMATXCTL_TE;
1567                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1568                 break;
1569         default:
1570                 break;
1571         }
1572
1573         ixgbe_configure_tx_ring(adapter, tx_ring);
1574
1575         /* Setup Rx Descriptor ring and Rx buffers */
1576         rx_ring->count = IXGBE_DEFAULT_RXD;
1577         rx_ring->queue_index = 0;
1578         rx_ring->dev = &adapter->pdev->dev;
1579         rx_ring->netdev = adapter->netdev;
1580         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1581
1582         err = ixgbe_setup_rx_resources(rx_ring);
1583         if (err) {
1584                 ret_val = 4;
1585                 goto err_nomem;
1586         }
1587
1588         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1589         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1590
1591         ixgbe_configure_rx_ring(adapter, rx_ring);
1592
1593         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1594         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1595
1596         return 0;
1597
1598 err_nomem:
1599         ixgbe_free_desc_rings(adapter);
1600         return ret_val;
1601 }
1602
1603 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1604 {
1605         struct ixgbe_hw *hw = &adapter->hw;
1606         u32 reg_data;
1607
1608         /* X540 needs to set the MACC.FLU bit to force link up */
1609         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1610                 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1611                 reg_data |= IXGBE_MACC_FLU;
1612                 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1613         }
1614
1615         /* right now we only support MAC loopback in the driver */
1616         reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1617         /* Setup MAC loopback */
1618         reg_data |= IXGBE_HLREG0_LPBK;
1619         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1620
1621         reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1622         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1623         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1624
1625         reg_data = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1626         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1627         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1628         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1629         IXGBE_WRITE_FLUSH(hw);
1630         usleep_range(10000, 20000);
1631
1632         /* Disable Atlas Tx lanes; re-enabled in reset path */
1633         if (hw->mac.type == ixgbe_mac_82598EB) {
1634                 u8 atlas;
1635
1636                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1637                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1638                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1639
1640                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1641                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1642                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1643
1644                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1645                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1646                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1647
1648                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1649                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1650                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1651         }
1652
1653         return 0;
1654 }
1655
1656 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1657 {
1658         u32 reg_data;
1659
1660         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1661         reg_data &= ~IXGBE_HLREG0_LPBK;
1662         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1663 }
1664
1665 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1666                                       unsigned int frame_size)
1667 {
1668         memset(skb->data, 0xFF, frame_size);
1669         frame_size >>= 1;
1670         memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
1671         memset(&skb->data[frame_size + 10], 0xBE, 1);
1672         memset(&skb->data[frame_size + 12], 0xAF, 1);
1673 }
1674
1675 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
1676                                      unsigned int frame_size)
1677 {
1678         unsigned char *data;
1679         bool match = true;
1680
1681         frame_size >>= 1;
1682
1683         data = kmap(rx_buffer->page) + rx_buffer->page_offset;
1684
1685         if (data[3] != 0xFF ||
1686             data[frame_size + 10] != 0xBE ||
1687             data[frame_size + 12] != 0xAF)
1688                 match = false;
1689
1690         kunmap(rx_buffer->page);
1691
1692         return match;
1693 }
1694
1695 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1696                                   struct ixgbe_ring *tx_ring,
1697                                   unsigned int size)
1698 {
1699         union ixgbe_adv_rx_desc *rx_desc;
1700         struct ixgbe_rx_buffer *rx_buffer;
1701         struct ixgbe_tx_buffer *tx_buffer;
1702         u16 rx_ntc, tx_ntc, count = 0;
1703
1704         /* initialize next to clean and descriptor values */
1705         rx_ntc = rx_ring->next_to_clean;
1706         tx_ntc = tx_ring->next_to_clean;
1707         rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1708
1709         while (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD)) {
1710                 /* check Rx buffer */
1711                 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
1712
1713                 /* sync Rx buffer for CPU read */
1714                 dma_sync_single_for_cpu(rx_ring->dev,
1715                                         rx_buffer->dma,
1716                                         ixgbe_rx_bufsz(rx_ring),
1717                                         DMA_FROM_DEVICE);
1718
1719                 /* verify contents of skb */
1720                 if (ixgbe_check_lbtest_frame(rx_buffer, size))
1721                         count++;
1722
1723                 /* sync Rx buffer for device write */
1724                 dma_sync_single_for_device(rx_ring->dev,
1725                                            rx_buffer->dma,
1726                                            ixgbe_rx_bufsz(rx_ring),
1727                                            DMA_FROM_DEVICE);
1728
1729                 /* unmap buffer on Tx side */
1730                 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
1731                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1732
1733                 /* increment Rx/Tx next to clean counters */
1734                 rx_ntc++;
1735                 if (rx_ntc == rx_ring->count)
1736                         rx_ntc = 0;
1737                 tx_ntc++;
1738                 if (tx_ntc == tx_ring->count)
1739                         tx_ntc = 0;
1740
1741                 /* fetch next descriptor */
1742                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1743         }
1744
1745         netdev_tx_reset_queue(txring_txq(tx_ring));
1746
1747         /* re-map buffers to ring, store next to clean values */
1748         ixgbe_alloc_rx_buffers(rx_ring, count);
1749         rx_ring->next_to_clean = rx_ntc;
1750         tx_ring->next_to_clean = tx_ntc;
1751
1752         return count;
1753 }
1754
1755 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1756 {
1757         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1758         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1759         int i, j, lc, good_cnt, ret_val = 0;
1760         unsigned int size = 1024;
1761         netdev_tx_t tx_ret_val;
1762         struct sk_buff *skb;
1763
1764         /* allocate test skb */
1765         skb = alloc_skb(size, GFP_KERNEL);
1766         if (!skb)
1767                 return 11;
1768
1769         /* place data into test skb */
1770         ixgbe_create_lbtest_frame(skb, size);
1771         skb_put(skb, size);
1772
1773         /*
1774          * Calculate the loop count based on the largest descriptor ring
1775          * The idea is to wrap the largest ring a number of times using 64
1776          * send/receive pairs during each loop
1777          */
1778
1779         if (rx_ring->count <= tx_ring->count)
1780                 lc = ((tx_ring->count / 64) * 2) + 1;
1781         else
1782                 lc = ((rx_ring->count / 64) * 2) + 1;
1783
1784         for (j = 0; j <= lc; j++) {
1785                 /* reset count of good packets */
1786                 good_cnt = 0;
1787
1788                 /* place 64 packets on the transmit queue*/
1789                 for (i = 0; i < 64; i++) {
1790                         skb_get(skb);
1791                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1792                                                            adapter,
1793                                                            tx_ring);
1794                         if (tx_ret_val == NETDEV_TX_OK)
1795                                 good_cnt++;
1796                 }
1797
1798                 if (good_cnt != 64) {
1799                         ret_val = 12;
1800                         break;
1801                 }
1802
1803                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1804                 msleep(200);
1805
1806                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1807                 if (good_cnt != 64) {
1808                         ret_val = 13;
1809                         break;
1810                 }
1811         }
1812
1813         /* free the original skb */
1814         kfree_skb(skb);
1815
1816         return ret_val;
1817 }
1818
1819 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1820 {
1821         *data = ixgbe_setup_desc_rings(adapter);
1822         if (*data)
1823                 goto out;
1824         *data = ixgbe_setup_loopback_test(adapter);
1825         if (*data)
1826                 goto err_loopback;
1827         *data = ixgbe_run_loopback_test(adapter);
1828         ixgbe_loopback_cleanup(adapter);
1829
1830 err_loopback:
1831         ixgbe_free_desc_rings(adapter);
1832 out:
1833         return *data;
1834 }
1835
1836 static void ixgbe_diag_test(struct net_device *netdev,
1837                             struct ethtool_test *eth_test, u64 *data)
1838 {
1839         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1840         bool if_running = netif_running(netdev);
1841
1842         set_bit(__IXGBE_TESTING, &adapter->state);
1843         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1844                 /* Offline tests */
1845
1846                 e_info(hw, "offline testing starting\n");
1847
1848                 /* Link test performed before hardware reset so autoneg doesn't
1849                  * interfere with test result */
1850                 if (ixgbe_link_test(adapter, &data[4]))
1851                         eth_test->flags |= ETH_TEST_FL_FAILED;
1852
1853                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1854                         int i;
1855                         for (i = 0; i < adapter->num_vfs; i++) {
1856                                 if (adapter->vfinfo[i].clear_to_send) {
1857                                         netdev_warn(netdev, "%s",
1858                                                     "offline diagnostic is not "
1859                                                     "supported when VFs are "
1860                                                     "present\n");
1861                                         data[0] = 1;
1862                                         data[1] = 1;
1863                                         data[2] = 1;
1864                                         data[3] = 1;
1865                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1866                                         clear_bit(__IXGBE_TESTING,
1867                                                   &adapter->state);
1868                                         goto skip_ol_tests;
1869                                 }
1870                         }
1871                 }
1872
1873                 if (if_running)
1874                         /* indicate we're in test mode */
1875                         dev_close(netdev);
1876                 else
1877                         ixgbe_reset(adapter);
1878
1879                 e_info(hw, "register testing starting\n");
1880                 if (ixgbe_reg_test(adapter, &data[0]))
1881                         eth_test->flags |= ETH_TEST_FL_FAILED;
1882
1883                 ixgbe_reset(adapter);
1884                 e_info(hw, "eeprom testing starting\n");
1885                 if (ixgbe_eeprom_test(adapter, &data[1]))
1886                         eth_test->flags |= ETH_TEST_FL_FAILED;
1887
1888                 ixgbe_reset(adapter);
1889                 e_info(hw, "interrupt testing starting\n");
1890                 if (ixgbe_intr_test(adapter, &data[2]))
1891                         eth_test->flags |= ETH_TEST_FL_FAILED;
1892
1893                 /* If SRIOV or VMDq is enabled then skip MAC
1894                  * loopback diagnostic. */
1895                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1896                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1897                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1898                                "mode\n");
1899                         data[3] = 0;
1900                         goto skip_loopback;
1901                 }
1902
1903                 ixgbe_reset(adapter);
1904                 e_info(hw, "loopback testing starting\n");
1905                 if (ixgbe_loopback_test(adapter, &data[3]))
1906                         eth_test->flags |= ETH_TEST_FL_FAILED;
1907
1908 skip_loopback:
1909                 ixgbe_reset(adapter);
1910
1911                 clear_bit(__IXGBE_TESTING, &adapter->state);
1912                 if (if_running)
1913                         dev_open(netdev);
1914         } else {
1915                 e_info(hw, "online testing starting\n");
1916                 /* Online tests */
1917                 if (ixgbe_link_test(adapter, &data[4]))
1918                         eth_test->flags |= ETH_TEST_FL_FAILED;
1919
1920                 /* Online tests aren't run; pass by default */
1921                 data[0] = 0;
1922                 data[1] = 0;
1923                 data[2] = 0;
1924                 data[3] = 0;
1925
1926                 clear_bit(__IXGBE_TESTING, &adapter->state);
1927         }
1928 skip_ol_tests:
1929         msleep_interruptible(4 * 1000);
1930 }
1931
1932 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1933                                struct ethtool_wolinfo *wol)
1934 {
1935         struct ixgbe_hw *hw = &adapter->hw;
1936         int retval = 0;
1937
1938         /* WOL not supported for all devices */
1939         if (!ixgbe_wol_supported(adapter, hw->device_id,
1940                                  hw->subsystem_device_id)) {
1941                 retval = 1;
1942                 wol->supported = 0;
1943         }
1944
1945         return retval;
1946 }
1947
1948 static void ixgbe_get_wol(struct net_device *netdev,
1949                           struct ethtool_wolinfo *wol)
1950 {
1951         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1952
1953         wol->supported = WAKE_UCAST | WAKE_MCAST |
1954                          WAKE_BCAST | WAKE_MAGIC;
1955         wol->wolopts = 0;
1956
1957         if (ixgbe_wol_exclusion(adapter, wol) ||
1958             !device_can_wakeup(&adapter->pdev->dev))
1959                 return;
1960
1961         if (adapter->wol & IXGBE_WUFC_EX)
1962                 wol->wolopts |= WAKE_UCAST;
1963         if (adapter->wol & IXGBE_WUFC_MC)
1964                 wol->wolopts |= WAKE_MCAST;
1965         if (adapter->wol & IXGBE_WUFC_BC)
1966                 wol->wolopts |= WAKE_BCAST;
1967         if (adapter->wol & IXGBE_WUFC_MAG)
1968                 wol->wolopts |= WAKE_MAGIC;
1969 }
1970
1971 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1972 {
1973         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1974
1975         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1976                 return -EOPNOTSUPP;
1977
1978         if (ixgbe_wol_exclusion(adapter, wol))
1979                 return wol->wolopts ? -EOPNOTSUPP : 0;
1980
1981         adapter->wol = 0;
1982
1983         if (wol->wolopts & WAKE_UCAST)
1984                 adapter->wol |= IXGBE_WUFC_EX;
1985         if (wol->wolopts & WAKE_MCAST)
1986                 adapter->wol |= IXGBE_WUFC_MC;
1987         if (wol->wolopts & WAKE_BCAST)
1988                 adapter->wol |= IXGBE_WUFC_BC;
1989         if (wol->wolopts & WAKE_MAGIC)
1990                 adapter->wol |= IXGBE_WUFC_MAG;
1991
1992         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1993
1994         return 0;
1995 }
1996
1997 static int ixgbe_nway_reset(struct net_device *netdev)
1998 {
1999         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2000
2001         if (netif_running(netdev))
2002                 ixgbe_reinit_locked(adapter);
2003
2004         return 0;
2005 }
2006
2007 static int ixgbe_set_phys_id(struct net_device *netdev,
2008                              enum ethtool_phys_id_state state)
2009 {
2010         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2011         struct ixgbe_hw *hw = &adapter->hw;
2012
2013         switch (state) {
2014         case ETHTOOL_ID_ACTIVE:
2015                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2016                 return 2;
2017
2018         case ETHTOOL_ID_ON:
2019                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2020                 break;
2021
2022         case ETHTOOL_ID_OFF:
2023                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2024                 break;
2025
2026         case ETHTOOL_ID_INACTIVE:
2027                 /* Restore LED settings */
2028                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2029                 break;
2030         }
2031
2032         return 0;
2033 }
2034
2035 static int ixgbe_get_coalesce(struct net_device *netdev,
2036                               struct ethtool_coalesce *ec)
2037 {
2038         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2039
2040         /* only valid if in constant ITR mode */
2041         if (adapter->rx_itr_setting <= 1)
2042                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2043         else
2044                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2045
2046         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2047         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2048                 return 0;
2049
2050         /* only valid if in constant ITR mode */
2051         if (adapter->tx_itr_setting <= 1)
2052                 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2053         else
2054                 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2055
2056         return 0;
2057 }
2058
2059 /*
2060  * this function must be called before setting the new value of
2061  * rx_itr_setting
2062  */
2063 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2064 {
2065         struct net_device *netdev = adapter->netdev;
2066
2067         /* nothing to do if LRO or RSC are not enabled */
2068         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2069             !(netdev->features & NETIF_F_LRO))
2070                 return false;
2071
2072         /* check the feature flag value and enable RSC if necessary */
2073         if (adapter->rx_itr_setting == 1 ||
2074             adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2075                 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2076                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2077                         e_info(probe, "rx-usecs value high enough "
2078                                       "to re-enable RSC\n");
2079                         return true;
2080                 }
2081         /* if interrupt rate is too high then disable RSC */
2082         } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2083                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2084                 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2085                 return true;
2086         }
2087         return false;
2088 }
2089
2090 static int ixgbe_set_coalesce(struct net_device *netdev,
2091                               struct ethtool_coalesce *ec)
2092 {
2093         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2094         struct ixgbe_q_vector *q_vector;
2095         int i;
2096         u16 tx_itr_param, rx_itr_param;
2097         bool need_reset = false;
2098
2099         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2100         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2101             && ec->tx_coalesce_usecs)
2102                 return -EINVAL;
2103
2104         if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2105             (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2106                 return -EINVAL;
2107
2108         if (ec->rx_coalesce_usecs > 1)
2109                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2110         else
2111                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2112
2113         if (adapter->rx_itr_setting == 1)
2114                 rx_itr_param = IXGBE_20K_ITR;
2115         else
2116                 rx_itr_param = adapter->rx_itr_setting;
2117
2118         if (ec->tx_coalesce_usecs > 1)
2119                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2120         else
2121                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2122
2123         if (adapter->tx_itr_setting == 1)
2124                 tx_itr_param = IXGBE_10K_ITR;
2125         else
2126                 tx_itr_param = adapter->tx_itr_setting;
2127
2128         /* check the old value and enable RSC if necessary */
2129         need_reset = ixgbe_update_rsc(adapter);
2130
2131         for (i = 0; i < adapter->num_q_vectors; i++) {
2132                 q_vector = adapter->q_vector[i];
2133                 if (q_vector->tx.count && !q_vector->rx.count)
2134                         /* tx only */
2135                         q_vector->itr = tx_itr_param;
2136                 else
2137                         /* rx only or mixed */
2138                         q_vector->itr = rx_itr_param;
2139                 ixgbe_write_eitr(q_vector);
2140         }
2141
2142         /*
2143          * do reset here at the end to make sure EITR==0 case is handled
2144          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2145          * also locks in RSC enable/disable which requires reset
2146          */
2147         if (need_reset)
2148                 ixgbe_do_reset(netdev);
2149
2150         return 0;
2151 }
2152
2153 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2154                                         struct ethtool_rxnfc *cmd)
2155 {
2156         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2157         struct ethtool_rx_flow_spec *fsp =
2158                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2159         struct hlist_node *node, *node2;
2160         struct ixgbe_fdir_filter *rule = NULL;
2161
2162         /* report total rule count */
2163         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2164
2165         hlist_for_each_entry_safe(rule, node, node2,
2166                                   &adapter->fdir_filter_list, fdir_node) {
2167                 if (fsp->location <= rule->sw_idx)
2168                         break;
2169         }
2170
2171         if (!rule || fsp->location != rule->sw_idx)
2172                 return -EINVAL;
2173
2174         /* fill out the flow spec entry */
2175
2176         /* set flow type field */
2177         switch (rule->filter.formatted.flow_type) {
2178         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2179                 fsp->flow_type = TCP_V4_FLOW;
2180                 break;
2181         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2182                 fsp->flow_type = UDP_V4_FLOW;
2183                 break;
2184         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2185                 fsp->flow_type = SCTP_V4_FLOW;
2186                 break;
2187         case IXGBE_ATR_FLOW_TYPE_IPV4:
2188                 fsp->flow_type = IP_USER_FLOW;
2189                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2190                 fsp->h_u.usr_ip4_spec.proto = 0;
2191                 fsp->m_u.usr_ip4_spec.proto = 0;
2192                 break;
2193         default:
2194                 return -EINVAL;
2195         }
2196
2197         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2198         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2199         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2200         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2201         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2202         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2203         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2204         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2205         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2206         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2207         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2208         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2209         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2210         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2211         fsp->flow_type |= FLOW_EXT;
2212
2213         /* record action */
2214         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2215                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2216         else
2217                 fsp->ring_cookie = rule->action;
2218
2219         return 0;
2220 }
2221
2222 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2223                                       struct ethtool_rxnfc *cmd,
2224                                       u32 *rule_locs)
2225 {
2226         struct hlist_node *node, *node2;
2227         struct ixgbe_fdir_filter *rule;
2228         int cnt = 0;
2229
2230         /* report total rule count */
2231         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2232
2233         hlist_for_each_entry_safe(rule, node, node2,
2234                                   &adapter->fdir_filter_list, fdir_node) {
2235                 if (cnt == cmd->rule_cnt)
2236                         return -EMSGSIZE;
2237                 rule_locs[cnt] = rule->sw_idx;
2238                 cnt++;
2239         }
2240
2241         cmd->rule_cnt = cnt;
2242
2243         return 0;
2244 }
2245
2246 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2247                                    struct ethtool_rxnfc *cmd)
2248 {
2249         cmd->data = 0;
2250
2251         /* Report default options for RSS on ixgbe */
2252         switch (cmd->flow_type) {
2253         case TCP_V4_FLOW:
2254                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2255         case UDP_V4_FLOW:
2256                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2257                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2258         case SCTP_V4_FLOW:
2259         case AH_ESP_V4_FLOW:
2260         case AH_V4_FLOW:
2261         case ESP_V4_FLOW:
2262         case IPV4_FLOW:
2263                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2264                 break;
2265         case TCP_V6_FLOW:
2266                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2267         case UDP_V6_FLOW:
2268                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2269                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2270         case SCTP_V6_FLOW:
2271         case AH_ESP_V6_FLOW:
2272         case AH_V6_FLOW:
2273         case ESP_V6_FLOW:
2274         case IPV6_FLOW:
2275                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2276                 break;
2277         default:
2278                 return -EINVAL;
2279         }
2280
2281         return 0;
2282 }
2283
2284 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2285                            u32 *rule_locs)
2286 {
2287         struct ixgbe_adapter *adapter = netdev_priv(dev);
2288         int ret = -EOPNOTSUPP;
2289
2290         switch (cmd->cmd) {
2291         case ETHTOOL_GRXRINGS:
2292                 cmd->data = adapter->num_rx_queues;
2293                 ret = 0;
2294                 break;
2295         case ETHTOOL_GRXCLSRLCNT:
2296                 cmd->rule_cnt = adapter->fdir_filter_count;
2297                 ret = 0;
2298                 break;
2299         case ETHTOOL_GRXCLSRULE:
2300                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2301                 break;
2302         case ETHTOOL_GRXCLSRLALL:
2303                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2304                 break;
2305         case ETHTOOL_GRXFH:
2306                 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2307                 break;
2308         default:
2309                 break;
2310         }
2311
2312         return ret;
2313 }
2314
2315 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2316                                            struct ixgbe_fdir_filter *input,
2317                                            u16 sw_idx)
2318 {
2319         struct ixgbe_hw *hw = &adapter->hw;
2320         struct hlist_node *node, *node2, *parent;
2321         struct ixgbe_fdir_filter *rule;
2322         int err = -EINVAL;
2323
2324         parent = NULL;
2325         rule = NULL;
2326
2327         hlist_for_each_entry_safe(rule, node, node2,
2328                                   &adapter->fdir_filter_list, fdir_node) {
2329                 /* hash found, or no matching entry */
2330                 if (rule->sw_idx >= sw_idx)
2331                         break;
2332                 parent = node;
2333         }
2334
2335         /* if there is an old rule occupying our place remove it */
2336         if (rule && (rule->sw_idx == sw_idx)) {
2337                 if (!input || (rule->filter.formatted.bkt_hash !=
2338                                input->filter.formatted.bkt_hash)) {
2339                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2340                                                                 &rule->filter,
2341                                                                 sw_idx);
2342                 }
2343
2344                 hlist_del(&rule->fdir_node);
2345                 kfree(rule);
2346                 adapter->fdir_filter_count--;
2347         }
2348
2349         /*
2350          * If no input this was a delete, err should be 0 if a rule was
2351          * successfully found and removed from the list else -EINVAL
2352          */
2353         if (!input)
2354                 return err;
2355
2356         /* initialize node and set software index */
2357         INIT_HLIST_NODE(&input->fdir_node);
2358
2359         /* add filter to the list */
2360         if (parent)
2361                 hlist_add_after(parent, &input->fdir_node);
2362         else
2363                 hlist_add_head(&input->fdir_node,
2364                                &adapter->fdir_filter_list);
2365
2366         /* update counts */
2367         adapter->fdir_filter_count++;
2368
2369         return 0;
2370 }
2371
2372 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2373                                        u8 *flow_type)
2374 {
2375         switch (fsp->flow_type & ~FLOW_EXT) {
2376         case TCP_V4_FLOW:
2377                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2378                 break;
2379         case UDP_V4_FLOW:
2380                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2381                 break;
2382         case SCTP_V4_FLOW:
2383                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2384                 break;
2385         case IP_USER_FLOW:
2386                 switch (fsp->h_u.usr_ip4_spec.proto) {
2387                 case IPPROTO_TCP:
2388                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2389                         break;
2390                 case IPPROTO_UDP:
2391                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2392                         break;
2393                 case IPPROTO_SCTP:
2394                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2395                         break;
2396                 case 0:
2397                         if (!fsp->m_u.usr_ip4_spec.proto) {
2398                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2399                                 break;
2400                         }
2401                 default:
2402                         return 0;
2403                 }
2404                 break;
2405         default:
2406                 return 0;
2407         }
2408
2409         return 1;
2410 }
2411
2412 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2413                                         struct ethtool_rxnfc *cmd)
2414 {
2415         struct ethtool_rx_flow_spec *fsp =
2416                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2417         struct ixgbe_hw *hw = &adapter->hw;
2418         struct ixgbe_fdir_filter *input;
2419         union ixgbe_atr_input mask;
2420         int err;
2421
2422         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2423                 return -EOPNOTSUPP;
2424
2425         /*
2426          * Don't allow programming if the action is a queue greater than
2427          * the number of online Rx queues.
2428          */
2429         if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2430             (fsp->ring_cookie >= adapter->num_rx_queues))
2431                 return -EINVAL;
2432
2433         /* Don't allow indexes to exist outside of available space */
2434         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2435                 e_err(drv, "Location out of range\n");
2436                 return -EINVAL;
2437         }
2438
2439         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2440         if (!input)
2441                 return -ENOMEM;
2442
2443         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2444
2445         /* set SW index */
2446         input->sw_idx = fsp->location;
2447
2448         /* record flow type */
2449         if (!ixgbe_flowspec_to_flow_type(fsp,
2450                                          &input->filter.formatted.flow_type)) {
2451                 e_err(drv, "Unrecognized flow type\n");
2452                 goto err_out;
2453         }
2454
2455         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2456                                    IXGBE_ATR_L4TYPE_MASK;
2457
2458         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2459                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2460
2461         /* Copy input into formatted structures */
2462         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2463         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2464         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2465         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2466         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2467         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2468         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2469         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2470
2471         if (fsp->flow_type & FLOW_EXT) {
2472                 input->filter.formatted.vm_pool =
2473                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2474                 mask.formatted.vm_pool =
2475                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2476                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2477                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2478                 input->filter.formatted.flex_bytes =
2479                                                 fsp->h_ext.vlan_etype;
2480                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2481         }
2482
2483         /* determine if we need to drop or route the packet */
2484         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2485                 input->action = IXGBE_FDIR_DROP_QUEUE;
2486         else
2487                 input->action = fsp->ring_cookie;
2488
2489         spin_lock(&adapter->fdir_perfect_lock);
2490
2491         if (hlist_empty(&adapter->fdir_filter_list)) {
2492                 /* save mask and program input mask into HW */
2493                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2494                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2495                 if (err) {
2496                         e_err(drv, "Error writing mask\n");
2497                         goto err_out_w_lock;
2498                 }
2499         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2500                 e_err(drv, "Only one mask supported per port\n");
2501                 goto err_out_w_lock;
2502         }
2503
2504         /* apply mask and compute/store hash */
2505         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2506
2507         /* program filters to filter memory */
2508         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2509                                 &input->filter, input->sw_idx,
2510                                 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2511                                 IXGBE_FDIR_DROP_QUEUE :
2512                                 adapter->rx_ring[input->action]->reg_idx);
2513         if (err)
2514                 goto err_out_w_lock;
2515
2516         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2517
2518         spin_unlock(&adapter->fdir_perfect_lock);
2519
2520         return err;
2521 err_out_w_lock:
2522         spin_unlock(&adapter->fdir_perfect_lock);
2523 err_out:
2524         kfree(input);
2525         return -EINVAL;
2526 }
2527
2528 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2529                                         struct ethtool_rxnfc *cmd)
2530 {
2531         struct ethtool_rx_flow_spec *fsp =
2532                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2533         int err;
2534
2535         spin_lock(&adapter->fdir_perfect_lock);
2536         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2537         spin_unlock(&adapter->fdir_perfect_lock);
2538
2539         return err;
2540 }
2541
2542 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2543                        IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2544 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2545                                   struct ethtool_rxnfc *nfc)
2546 {
2547         u32 flags2 = adapter->flags2;
2548
2549         /*
2550          * RSS does not support anything other than hashing
2551          * to queues on src and dst IPs and ports
2552          */
2553         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2554                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2555                 return -EINVAL;
2556
2557         switch (nfc->flow_type) {
2558         case TCP_V4_FLOW:
2559         case TCP_V6_FLOW:
2560                 if (!(nfc->data & RXH_IP_SRC) ||
2561                     !(nfc->data & RXH_IP_DST) ||
2562                     !(nfc->data & RXH_L4_B_0_1) ||
2563                     !(nfc->data & RXH_L4_B_2_3))
2564                         return -EINVAL;
2565                 break;
2566         case UDP_V4_FLOW:
2567                 if (!(nfc->data & RXH_IP_SRC) ||
2568                     !(nfc->data & RXH_IP_DST))
2569                         return -EINVAL;
2570                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2571                 case 0:
2572                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2573                         break;
2574                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2575                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2576                         break;
2577                 default:
2578                         return -EINVAL;
2579                 }
2580                 break;
2581         case UDP_V6_FLOW:
2582                 if (!(nfc->data & RXH_IP_SRC) ||
2583                     !(nfc->data & RXH_IP_DST))
2584                         return -EINVAL;
2585                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2586                 case 0:
2587                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2588                         break;
2589                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2590                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2591                         break;
2592                 default:
2593                         return -EINVAL;
2594                 }
2595                 break;
2596         case AH_ESP_V4_FLOW:
2597         case AH_V4_FLOW:
2598         case ESP_V4_FLOW:
2599         case SCTP_V4_FLOW:
2600         case AH_ESP_V6_FLOW:
2601         case AH_V6_FLOW:
2602         case ESP_V6_FLOW:
2603         case SCTP_V6_FLOW:
2604                 if (!(nfc->data & RXH_IP_SRC) ||
2605                     !(nfc->data & RXH_IP_DST) ||
2606                     (nfc->data & RXH_L4_B_0_1) ||
2607                     (nfc->data & RXH_L4_B_2_3))
2608                         return -EINVAL;
2609                 break;
2610         default:
2611                 return -EINVAL;
2612         }
2613
2614         /* if we changed something we need to update flags */
2615         if (flags2 != adapter->flags2) {
2616                 struct ixgbe_hw *hw = &adapter->hw;
2617                 u32 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2618
2619                 if ((flags2 & UDP_RSS_FLAGS) &&
2620                     !(adapter->flags2 & UDP_RSS_FLAGS))
2621                         e_warn(drv, "enabling UDP RSS: fragmented packets"
2622                                " may arrive out of order to the stack above\n");
2623
2624                 adapter->flags2 = flags2;
2625
2626                 /* Perform hash on these packet types */
2627                 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2628                       | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2629                       | IXGBE_MRQC_RSS_FIELD_IPV6
2630                       | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2631
2632                 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2633                           IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2634
2635                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2636                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2637
2638                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2639                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2640
2641                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2642         }
2643
2644         return 0;
2645 }
2646
2647 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2648 {
2649         struct ixgbe_adapter *adapter = netdev_priv(dev);
2650         int ret = -EOPNOTSUPP;
2651
2652         switch (cmd->cmd) {
2653         case ETHTOOL_SRXCLSRLINS:
2654                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2655                 break;
2656         case ETHTOOL_SRXCLSRLDEL:
2657                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2658                 break;
2659         case ETHTOOL_SRXFH:
2660                 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2661                 break;
2662         default:
2663                 break;
2664         }
2665
2666         return ret;
2667 }
2668
2669 static int ixgbe_get_ts_info(struct net_device *dev,
2670                              struct ethtool_ts_info *info)
2671 {
2672         struct ixgbe_adapter *adapter = netdev_priv(dev);
2673
2674         switch (adapter->hw.mac.type) {
2675         case ixgbe_mac_X540:
2676         case ixgbe_mac_82599EB:
2677                 info->so_timestamping =
2678                         SOF_TIMESTAMPING_TX_SOFTWARE |
2679                         SOF_TIMESTAMPING_RX_SOFTWARE |
2680                         SOF_TIMESTAMPING_SOFTWARE |
2681                         SOF_TIMESTAMPING_TX_HARDWARE |
2682                         SOF_TIMESTAMPING_RX_HARDWARE |
2683                         SOF_TIMESTAMPING_RAW_HARDWARE;
2684
2685                 if (adapter->ptp_clock)
2686                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
2687                 else
2688                         info->phc_index = -1;
2689
2690                 info->tx_types =
2691                         (1 << HWTSTAMP_TX_OFF) |
2692                         (1 << HWTSTAMP_TX_ON);
2693
2694                 info->rx_filters =
2695                         (1 << HWTSTAMP_FILTER_NONE) |
2696                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2697                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2698                         (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2699                 break;
2700         default:
2701                 return ethtool_op_get_ts_info(dev, info);
2702                 break;
2703         }
2704         return 0;
2705 }
2706
2707 static const struct ethtool_ops ixgbe_ethtool_ops = {
2708         .get_settings           = ixgbe_get_settings,
2709         .set_settings           = ixgbe_set_settings,
2710         .get_drvinfo            = ixgbe_get_drvinfo,
2711         .get_regs_len           = ixgbe_get_regs_len,
2712         .get_regs               = ixgbe_get_regs,
2713         .get_wol                = ixgbe_get_wol,
2714         .set_wol                = ixgbe_set_wol,
2715         .nway_reset             = ixgbe_nway_reset,
2716         .get_link               = ethtool_op_get_link,
2717         .get_eeprom_len         = ixgbe_get_eeprom_len,
2718         .get_eeprom             = ixgbe_get_eeprom,
2719         .set_eeprom             = ixgbe_set_eeprom,
2720         .get_ringparam          = ixgbe_get_ringparam,
2721         .set_ringparam          = ixgbe_set_ringparam,
2722         .get_pauseparam         = ixgbe_get_pauseparam,
2723         .set_pauseparam         = ixgbe_set_pauseparam,
2724         .get_msglevel           = ixgbe_get_msglevel,
2725         .set_msglevel           = ixgbe_set_msglevel,
2726         .self_test              = ixgbe_diag_test,
2727         .get_strings            = ixgbe_get_strings,
2728         .set_phys_id            = ixgbe_set_phys_id,
2729         .get_sset_count         = ixgbe_get_sset_count,
2730         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2731         .get_coalesce           = ixgbe_get_coalesce,
2732         .set_coalesce           = ixgbe_set_coalesce,
2733         .get_rxnfc              = ixgbe_get_rxnfc,
2734         .set_rxnfc              = ixgbe_set_rxnfc,
2735         .get_ts_info            = ixgbe_get_ts_info,
2736 };
2737
2738 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2739 {
2740         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2741 }