2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
28 #include <asm/memory.h>
29 #include <asm/highmem.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <asm/sizes.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system_info.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!arch_is_coherent())
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
82 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
83 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
84 * @handle: DMA address of buffer
85 * @size: size of buffer (same as passed to dma_map_page)
86 * @dir: DMA transfer direction (same as passed to dma_map_page)
88 * Unmap a page streaming mode DMA translation. The handle and size
89 * must match what was provided in the previous dma_map_page() call.
90 * All other usages are undefined.
92 * After this call, reads by the CPU to the buffer are guaranteed to see
93 * whatever the device wrote there.
95 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
96 size_t size, enum dma_data_direction dir,
97 struct dma_attrs *attrs)
99 if (!arch_is_coherent())
100 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
101 handle & ~PAGE_MASK, size, dir);
104 static void arm_dma_sync_single_for_cpu(struct device *dev,
105 dma_addr_t handle, size_t size, enum dma_data_direction dir)
107 unsigned int offset = handle & (PAGE_SIZE - 1);
108 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
109 if (!arch_is_coherent())
110 __dma_page_dev_to_cpu(page, offset, size, dir);
113 static void arm_dma_sync_single_for_device(struct device *dev,
114 dma_addr_t handle, size_t size, enum dma_data_direction dir)
116 unsigned int offset = handle & (PAGE_SIZE - 1);
117 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
118 if (!arch_is_coherent())
119 __dma_page_cpu_to_dev(page, offset, size, dir);
122 static int arm_dma_set_mask(struct device *dev, u64 dma_mask);
124 struct dma_map_ops arm_dma_ops = {
125 .alloc = arm_dma_alloc,
126 .free = arm_dma_free,
127 .mmap = arm_dma_mmap,
128 .map_page = arm_dma_map_page,
129 .unmap_page = arm_dma_unmap_page,
130 .map_sg = arm_dma_map_sg,
131 .unmap_sg = arm_dma_unmap_sg,
132 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
133 .sync_single_for_device = arm_dma_sync_single_for_device,
134 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
135 .sync_sg_for_device = arm_dma_sync_sg_for_device,
136 .set_dma_mask = arm_dma_set_mask,
138 EXPORT_SYMBOL(arm_dma_ops);
140 static u64 get_coherent_dma_mask(struct device *dev)
142 u64 mask = (u64)arm_dma_limit;
145 mask = dev->coherent_dma_mask;
148 * Sanity check the DMA mask - it must be non-zero, and
149 * must be able to be satisfied by a DMA allocation.
152 dev_warn(dev, "coherent DMA mask is unset\n");
156 if ((~mask) & (u64)arm_dma_limit) {
157 dev_warn(dev, "coherent DMA mask %#llx is smaller "
158 "than system GFP_DMA mask %#llx\n",
159 mask, (u64)arm_dma_limit);
167 static void __dma_clear_buffer(struct page *page, size_t size)
171 * Ensure that the allocated pages are zeroed, and that any data
172 * lurking in the kernel direct-mapped region is invalidated.
174 ptr = page_address(page);
176 memset(ptr, 0, size);
177 dmac_flush_range(ptr, ptr + size);
178 outer_flush_range(__pa(ptr), __pa(ptr) + size);
183 * Allocate a DMA buffer for 'dev' of size 'size' using the
184 * specified gfp mask. Note that 'size' must be page aligned.
186 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
188 unsigned long order = get_order(size);
189 struct page *page, *p, *e;
191 page = alloc_pages(gfp, order);
196 * Now split the huge page and free the excess pages
198 split_page(page, order);
199 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
202 __dma_clear_buffer(page, size);
208 * Free a DMA buffer. 'size' must be page aligned.
210 static void __dma_free_buffer(struct page *page, size_t size)
212 struct page *e = page + (size >> PAGE_SHIFT);
221 #ifdef CONFIG_HUGETLB_PAGE
222 #error ARM Coherent DMA allocator does not (yet) support huge TLB
225 static void *__alloc_from_contiguous(struct device *dev, size_t size,
226 pgprot_t prot, struct page **ret_page);
228 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
229 pgprot_t prot, struct page **ret_page,
233 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
236 struct vm_struct *area;
240 * DMA allocation can be mapped to user space, so lets
241 * set VM_USERMAP flags too.
243 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
247 addr = (unsigned long)area->addr;
248 area->phys_addr = __pfn_to_phys(page_to_pfn(page));
250 if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
251 vunmap((void *)addr);
257 static void __dma_free_remap(void *cpu_addr, size_t size)
259 unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
260 struct vm_struct *area = find_vm_area(cpu_addr);
261 if (!area || (area->flags & flags) != flags) {
262 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
265 unmap_kernel_range((unsigned long)cpu_addr, size);
272 unsigned long *bitmap;
273 unsigned long nr_pages;
278 static struct dma_pool atomic_pool = {
282 static int __init early_coherent_pool(char *p)
284 atomic_pool.size = memparse(p, &p);
287 early_param("coherent_pool", early_coherent_pool);
290 * Initialise the coherent pool for atomic allocations.
292 static int __init atomic_pool_init(void)
294 struct dma_pool *pool = &atomic_pool;
295 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
296 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
297 unsigned long *bitmap;
300 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
302 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
306 if (IS_ENABLED(CONFIG_CMA))
307 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
309 ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
312 spin_lock_init(&pool->lock);
315 pool->bitmap = bitmap;
316 pool->nr_pages = nr_pages;
317 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
318 (unsigned)pool->size / 1024);
323 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
324 (unsigned)pool->size / 1024);
328 * CMA is activated by core_initcall, so we must be called after it.
330 postcore_initcall(atomic_pool_init);
332 struct dma_contig_early_reserve {
337 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
339 static int dma_mmu_remap_num __initdata;
341 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
343 dma_mmu_remap[dma_mmu_remap_num].base = base;
344 dma_mmu_remap[dma_mmu_remap_num].size = size;
348 void __init dma_contiguous_remap(void)
351 for (i = 0; i < dma_mmu_remap_num; i++) {
352 phys_addr_t start = dma_mmu_remap[i].base;
353 phys_addr_t end = start + dma_mmu_remap[i].size;
357 if (end > arm_lowmem_limit)
358 end = arm_lowmem_limit;
362 map.pfn = __phys_to_pfn(start);
363 map.virtual = __phys_to_virt(start);
364 map.length = end - start;
365 map.type = MT_MEMORY_DMA_READY;
368 * Clear previous low-memory mapping
370 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
372 pmd_clear(pmd_off_k(addr));
374 iotable_init(&map, 1);
378 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
381 struct page *page = virt_to_page(addr);
382 pgprot_t prot = *(pgprot_t *)data;
384 set_pte_ext(pte, mk_pte(page, prot), 0);
388 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
390 unsigned long start = (unsigned long) page_address(page);
391 unsigned end = start + size;
393 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
395 flush_tlb_kernel_range(start, end);
398 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
399 pgprot_t prot, struct page **ret_page,
404 page = __dma_alloc_buffer(dev, size, gfp);
408 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
410 __dma_free_buffer(page, size);
418 static void *__alloc_from_pool(size_t size, struct page **ret_page)
420 struct dma_pool *pool = &atomic_pool;
421 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
428 WARN(1, "coherent pool not initialised!\n");
433 * Align the region allocation - allocations from pool are rather
434 * small, so align them to their order in pages, minimum is a page
435 * size. This helps reduce fragmentation of the DMA space.
437 align = PAGE_SIZE << get_order(size);
439 spin_lock_irqsave(&pool->lock, flags);
440 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
441 0, count, (1 << align) - 1);
442 if (pageno < pool->nr_pages) {
443 bitmap_set(pool->bitmap, pageno, count);
444 ptr = pool->vaddr + PAGE_SIZE * pageno;
445 *ret_page = pool->page + pageno;
447 spin_unlock_irqrestore(&pool->lock, flags);
452 static int __free_from_pool(void *start, size_t size)
454 struct dma_pool *pool = &atomic_pool;
455 unsigned long pageno, count;
458 if (start < pool->vaddr || start > pool->vaddr + pool->size)
461 if (start + size > pool->vaddr + pool->size) {
462 WARN(1, "freeing wrong coherent size from pool\n");
466 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
467 count = size >> PAGE_SHIFT;
469 spin_lock_irqsave(&pool->lock, flags);
470 bitmap_clear(pool->bitmap, pageno, count);
471 spin_unlock_irqrestore(&pool->lock, flags);
476 static void *__alloc_from_contiguous(struct device *dev, size_t size,
477 pgprot_t prot, struct page **ret_page)
479 unsigned long order = get_order(size);
480 size_t count = size >> PAGE_SHIFT;
483 page = dma_alloc_from_contiguous(dev, count, order);
487 __dma_clear_buffer(page, size);
488 __dma_remap(page, size, prot);
491 return page_address(page);
494 static void __free_from_contiguous(struct device *dev, struct page *page,
497 __dma_remap(page, size, pgprot_kernel);
498 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
501 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
503 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
504 pgprot_writecombine(prot) :
505 pgprot_dmacoherent(prot);
511 #else /* !CONFIG_MMU */
515 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
516 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
517 #define __alloc_from_pool(size, ret_page) NULL
518 #define __alloc_from_contiguous(dev, size, prot, ret) NULL
519 #define __free_from_pool(cpu_addr, size) 0
520 #define __free_from_contiguous(dev, page, size) do { } while (0)
521 #define __dma_free_remap(cpu_addr, size) do { } while (0)
523 #endif /* CONFIG_MMU */
525 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
526 struct page **ret_page)
529 page = __dma_alloc_buffer(dev, size, gfp);
534 return page_address(page);
539 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
540 gfp_t gfp, pgprot_t prot, const void *caller)
542 u64 mask = get_coherent_dma_mask(dev);
546 #ifdef CONFIG_DMA_API_DEBUG
547 u64 limit = (mask + 1) & ~mask;
548 if (limit && size >= limit) {
549 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
558 if (mask < 0xffffffffULL)
562 * Following is a work-around (a.k.a. hack) to prevent pages
563 * with __GFP_COMP being passed to split_page() which cannot
564 * handle them. The real problem is that this flag probably
565 * should be 0 on ARM as it is not supported on this
566 * platform; see CONFIG_HUGETLBFS.
568 gfp &= ~(__GFP_COMP);
570 *handle = DMA_ERROR_CODE;
571 size = PAGE_ALIGN(size);
573 if (arch_is_coherent() || nommu())
574 addr = __alloc_simple_buffer(dev, size, gfp, &page);
575 else if (gfp & GFP_ATOMIC)
576 addr = __alloc_from_pool(size, &page);
577 else if (!IS_ENABLED(CONFIG_CMA))
578 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
580 addr = __alloc_from_contiguous(dev, size, prot, &page);
583 *handle = pfn_to_dma(dev, page_to_pfn(page));
589 * Allocate DMA-coherent memory space and return both the kernel remapped
590 * virtual and bus address for that space.
592 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
593 gfp_t gfp, struct dma_attrs *attrs)
595 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
598 if (dma_alloc_from_coherent(dev, size, handle, &memory))
601 return __dma_alloc(dev, size, handle, gfp, prot,
602 __builtin_return_address(0));
606 * Create userspace mapping for the DMA-coherent memory.
608 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
609 void *cpu_addr, dma_addr_t dma_addr, size_t size,
610 struct dma_attrs *attrs)
614 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
615 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
616 unsigned long pfn = dma_to_pfn(dev, dma_addr);
617 unsigned long off = vma->vm_pgoff;
619 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
621 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
624 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
625 ret = remap_pfn_range(vma, vma->vm_start,
627 vma->vm_end - vma->vm_start,
630 #endif /* CONFIG_MMU */
636 * Free a buffer as defined by the above mapping.
638 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
639 dma_addr_t handle, struct dma_attrs *attrs)
641 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
643 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
646 size = PAGE_ALIGN(size);
648 if (arch_is_coherent() || nommu()) {
649 __dma_free_buffer(page, size);
650 } else if (!IS_ENABLED(CONFIG_CMA)) {
651 __dma_free_remap(cpu_addr, size);
652 __dma_free_buffer(page, size);
654 if (__free_from_pool(cpu_addr, size))
657 * Non-atomic allocations cannot be freed with IRQs disabled
659 WARN_ON(irqs_disabled());
660 __free_from_contiguous(dev, page, size);
664 static void dma_cache_maint_page(struct page *page, unsigned long offset,
665 size_t size, enum dma_data_direction dir,
666 void (*op)(const void *, size_t, int))
669 * A single sg entry may refer to multiple physically contiguous
670 * pages. But we still need to process highmem pages individually.
671 * If highmem is not configured then the bulk of this loop gets
679 if (PageHighMem(page)) {
680 if (len + offset > PAGE_SIZE) {
681 if (offset >= PAGE_SIZE) {
682 page += offset / PAGE_SIZE;
685 len = PAGE_SIZE - offset;
687 vaddr = kmap_high_get(page);
692 } else if (cache_is_vipt()) {
693 /* unmapped pages might still be cached */
694 vaddr = kmap_atomic(page);
695 op(vaddr + offset, len, dir);
696 kunmap_atomic(vaddr);
699 vaddr = page_address(page) + offset;
709 * Make an area consistent for devices.
710 * Note: Drivers should NOT use this function directly, as it will break
711 * platforms with CONFIG_DMABOUNCE.
712 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
714 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
715 size_t size, enum dma_data_direction dir)
719 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
721 paddr = page_to_phys(page) + off;
722 if (dir == DMA_FROM_DEVICE) {
723 outer_inv_range(paddr, paddr + size);
725 outer_clean_range(paddr, paddr + size);
727 /* FIXME: non-speculating: flush on bidirectional mappings? */
730 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
731 size_t size, enum dma_data_direction dir)
733 unsigned long paddr = page_to_phys(page) + off;
735 /* FIXME: non-speculating: not required */
736 /* don't bother invalidating if DMA to device */
737 if (dir != DMA_TO_DEVICE)
738 outer_inv_range(paddr, paddr + size);
740 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
743 * Mark the D-cache clean for this page to avoid extra flushing.
745 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
746 set_bit(PG_dcache_clean, &page->flags);
750 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
751 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
752 * @sg: list of buffers
753 * @nents: number of buffers to map
754 * @dir: DMA transfer direction
756 * Map a set of buffers described by scatterlist in streaming mode for DMA.
757 * This is the scatter-gather version of the dma_map_single interface.
758 * Here the scatter gather list elements are each tagged with the
759 * appropriate dma address and length. They are obtained via
760 * sg_dma_{address,length}.
762 * Device ownership issues as mentioned for dma_map_single are the same
765 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
766 enum dma_data_direction dir, struct dma_attrs *attrs)
768 struct dma_map_ops *ops = get_dma_ops(dev);
769 struct scatterlist *s;
772 for_each_sg(sg, s, nents, i) {
773 #ifdef CONFIG_NEED_SG_DMA_LENGTH
774 s->dma_length = s->length;
776 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
777 s->length, dir, attrs);
778 if (dma_mapping_error(dev, s->dma_address))
784 for_each_sg(sg, s, i, j)
785 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
790 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
791 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
792 * @sg: list of buffers
793 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
794 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
796 * Unmap a set of streaming mode DMA translations. Again, CPU access
797 * rules concerning calls here are the same as for dma_unmap_single().
799 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
800 enum dma_data_direction dir, struct dma_attrs *attrs)
802 struct dma_map_ops *ops = get_dma_ops(dev);
803 struct scatterlist *s;
807 for_each_sg(sg, s, nents, i)
808 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
812 * arm_dma_sync_sg_for_cpu
813 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
814 * @sg: list of buffers
815 * @nents: number of buffers to map (returned from dma_map_sg)
816 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
818 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
819 int nents, enum dma_data_direction dir)
821 struct dma_map_ops *ops = get_dma_ops(dev);
822 struct scatterlist *s;
825 for_each_sg(sg, s, nents, i)
826 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
831 * arm_dma_sync_sg_for_device
832 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
833 * @sg: list of buffers
834 * @nents: number of buffers to map (returned from dma_map_sg)
835 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
837 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
838 int nents, enum dma_data_direction dir)
840 struct dma_map_ops *ops = get_dma_ops(dev);
841 struct scatterlist *s;
844 for_each_sg(sg, s, nents, i)
845 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
850 * Return whether the given device DMA address mask can be supported
851 * properly. For example, if your device can only drive the low 24-bits
852 * during bus mastering, then you would pass 0x00ffffff as the mask
855 int dma_supported(struct device *dev, u64 mask)
857 if (mask < (u64)arm_dma_limit)
861 EXPORT_SYMBOL(dma_supported);
863 static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
865 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
868 *dev->dma_mask = dma_mask;
873 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
875 static int __init dma_debug_do_init(void)
877 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
880 fs_initcall(dma_debug_do_init);
882 #ifdef CONFIG_ARM_DMA_USE_IOMMU
886 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
889 unsigned int order = get_order(size);
890 unsigned int align = 0;
891 unsigned int count, start;
894 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
895 (1 << mapping->order) - 1) >> mapping->order;
897 if (order > mapping->order)
898 align = (1 << (order - mapping->order)) - 1;
900 spin_lock_irqsave(&mapping->lock, flags);
901 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
903 if (start > mapping->bits) {
904 spin_unlock_irqrestore(&mapping->lock, flags);
905 return DMA_ERROR_CODE;
908 bitmap_set(mapping->bitmap, start, count);
909 spin_unlock_irqrestore(&mapping->lock, flags);
911 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
914 static inline void __free_iova(struct dma_iommu_mapping *mapping,
915 dma_addr_t addr, size_t size)
917 unsigned int start = (addr - mapping->base) >>
918 (mapping->order + PAGE_SHIFT);
919 unsigned int count = ((size >> PAGE_SHIFT) +
920 (1 << mapping->order) - 1) >> mapping->order;
923 spin_lock_irqsave(&mapping->lock, flags);
924 bitmap_clear(mapping->bitmap, start, count);
925 spin_unlock_irqrestore(&mapping->lock, flags);
928 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
931 int count = size >> PAGE_SHIFT;
932 int array_size = count * sizeof(struct page *);
935 if (array_size <= PAGE_SIZE)
936 pages = kzalloc(array_size, gfp);
938 pages = vzalloc(array_size);
943 int j, order = __fls(count);
945 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
946 while (!pages[i] && order)
947 pages[i] = alloc_pages(gfp | __GFP_NOWARN, --order);
952 split_page(pages[i], order);
955 pages[i + j] = pages[i] + j;
957 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
966 __free_pages(pages[i], 0);
967 if (array_size <= PAGE_SIZE)
974 static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)
976 int count = size >> PAGE_SHIFT;
977 int array_size = count * sizeof(struct page *);
979 for (i = 0; i < count; i++)
981 __free_pages(pages[i], 0);
982 if (array_size <= PAGE_SIZE)
990 * Create a CPU mapping for a specified pages
993 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
996 unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
997 struct vm_struct *area;
1000 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1005 area->pages = pages;
1006 area->nr_pages = nr_pages;
1007 p = (unsigned long)area->addr;
1009 for (i = 0; i < nr_pages; i++) {
1010 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1011 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1017 unmap_kernel_range((unsigned long)area->addr, size);
1023 * Create a mapping in device IO address space for specified pages
1026 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1028 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1029 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1030 dma_addr_t dma_addr, iova;
1031 int i, ret = DMA_ERROR_CODE;
1033 dma_addr = __alloc_iova(mapping, size);
1034 if (dma_addr == DMA_ERROR_CODE)
1038 for (i = 0; i < count; ) {
1039 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1040 phys_addr_t phys = page_to_phys(pages[i]);
1041 unsigned int len, j;
1043 for (j = i + 1; j < count; j++, next_pfn++)
1044 if (page_to_pfn(pages[j]) != next_pfn)
1047 len = (j - i) << PAGE_SHIFT;
1048 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1056 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1057 __free_iova(mapping, dma_addr, size);
1058 return DMA_ERROR_CODE;
1061 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1063 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1066 * add optional in-page offset from iova to size and align
1067 * result to page size
1069 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1072 iommu_unmap(mapping->domain, iova, size);
1073 __free_iova(mapping, iova, size);
1077 static struct page **__iommu_get_pages(void *cpu_addr)
1079 struct vm_struct *area;
1081 area = find_vm_area(cpu_addr);
1082 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1087 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1088 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1090 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1091 struct page **pages;
1094 *handle = DMA_ERROR_CODE;
1095 size = PAGE_ALIGN(size);
1097 pages = __iommu_alloc_buffer(dev, size, gfp);
1101 *handle = __iommu_create_mapping(dev, pages, size);
1102 if (*handle == DMA_ERROR_CODE)
1105 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1106 __builtin_return_address(0));
1113 __iommu_remove_mapping(dev, *handle, size);
1115 __iommu_free_buffer(dev, pages, size);
1119 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1120 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1121 struct dma_attrs *attrs)
1123 unsigned long uaddr = vma->vm_start;
1124 unsigned long usize = vma->vm_end - vma->vm_start;
1125 struct page **pages = __iommu_get_pages(cpu_addr);
1127 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1133 int ret = vm_insert_page(vma, uaddr, *pages++);
1135 pr_err("Remapping memory failed: %d\n", ret);
1140 } while (usize > 0);
1146 * free a page as defined by the above mapping.
1147 * Must not be called with IRQs disabled.
1149 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1150 dma_addr_t handle, struct dma_attrs *attrs)
1152 struct page **pages = __iommu_get_pages(cpu_addr);
1153 size = PAGE_ALIGN(size);
1156 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1160 unmap_kernel_range((unsigned long)cpu_addr, size);
1163 __iommu_remove_mapping(dev, handle, size);
1164 __iommu_free_buffer(dev, pages, size);
1168 * Map a part of the scatter-gather list into contiguous io address space
1170 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1171 size_t size, dma_addr_t *handle,
1172 enum dma_data_direction dir)
1174 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1175 dma_addr_t iova, iova_base;
1178 struct scatterlist *s;
1180 size = PAGE_ALIGN(size);
1181 *handle = DMA_ERROR_CODE;
1183 iova_base = iova = __alloc_iova(mapping, size);
1184 if (iova == DMA_ERROR_CODE)
1187 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1188 phys_addr_t phys = page_to_phys(sg_page(s));
1189 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1191 if (!arch_is_coherent())
1192 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1194 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1197 count += len >> PAGE_SHIFT;
1200 *handle = iova_base;
1204 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1205 __free_iova(mapping, iova_base, size);
1210 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1211 * @dev: valid struct device pointer
1212 * @sg: list of buffers
1213 * @nents: number of buffers to map
1214 * @dir: DMA transfer direction
1216 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1217 * The scatter gather list elements are merged together (if possible) and
1218 * tagged with the appropriate dma address and length. They are obtained via
1219 * sg_dma_{address,length}.
1221 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1222 enum dma_data_direction dir, struct dma_attrs *attrs)
1224 struct scatterlist *s = sg, *dma = sg, *start = sg;
1226 unsigned int offset = s->offset;
1227 unsigned int size = s->offset + s->length;
1228 unsigned int max = dma_get_max_seg_size(dev);
1230 for (i = 1; i < nents; i++) {
1233 s->dma_address = DMA_ERROR_CODE;
1236 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1237 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1241 dma->dma_address += offset;
1242 dma->dma_length = size - offset;
1244 size = offset = s->offset;
1251 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir) < 0)
1254 dma->dma_address += offset;
1255 dma->dma_length = size - offset;
1260 for_each_sg(sg, s, count, i)
1261 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1266 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1267 * @dev: valid struct device pointer
1268 * @sg: list of buffers
1269 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1270 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1272 * Unmap a set of streaming mode DMA translations. Again, CPU access
1273 * rules concerning calls here are the same as for dma_unmap_single().
1275 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1276 enum dma_data_direction dir, struct dma_attrs *attrs)
1278 struct scatterlist *s;
1281 for_each_sg(sg, s, nents, i) {
1283 __iommu_remove_mapping(dev, sg_dma_address(s),
1285 if (!arch_is_coherent())
1286 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1292 * arm_iommu_sync_sg_for_cpu
1293 * @dev: valid struct device pointer
1294 * @sg: list of buffers
1295 * @nents: number of buffers to map (returned from dma_map_sg)
1296 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1298 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1299 int nents, enum dma_data_direction dir)
1301 struct scatterlist *s;
1304 for_each_sg(sg, s, nents, i)
1305 if (!arch_is_coherent())
1306 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1311 * arm_iommu_sync_sg_for_device
1312 * @dev: valid struct device pointer
1313 * @sg: list of buffers
1314 * @nents: number of buffers to map (returned from dma_map_sg)
1315 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1317 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1318 int nents, enum dma_data_direction dir)
1320 struct scatterlist *s;
1323 for_each_sg(sg, s, nents, i)
1324 if (!arch_is_coherent())
1325 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1330 * arm_iommu_map_page
1331 * @dev: valid struct device pointer
1332 * @page: page that buffer resides in
1333 * @offset: offset into page for start of buffer
1334 * @size: size of buffer to map
1335 * @dir: DMA transfer direction
1337 * IOMMU aware version of arm_dma_map_page()
1339 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1340 unsigned long offset, size_t size, enum dma_data_direction dir,
1341 struct dma_attrs *attrs)
1343 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1344 dma_addr_t dma_addr;
1345 int ret, len = PAGE_ALIGN(size + offset);
1347 if (!arch_is_coherent())
1348 __dma_page_cpu_to_dev(page, offset, size, dir);
1350 dma_addr = __alloc_iova(mapping, len);
1351 if (dma_addr == DMA_ERROR_CODE)
1354 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1358 return dma_addr + offset;
1360 __free_iova(mapping, dma_addr, len);
1361 return DMA_ERROR_CODE;
1365 * arm_iommu_unmap_page
1366 * @dev: valid struct device pointer
1367 * @handle: DMA address of buffer
1368 * @size: size of buffer (same as passed to dma_map_page)
1369 * @dir: DMA transfer direction (same as passed to dma_map_page)
1371 * IOMMU aware version of arm_dma_unmap_page()
1373 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1374 size_t size, enum dma_data_direction dir,
1375 struct dma_attrs *attrs)
1377 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1378 dma_addr_t iova = handle & PAGE_MASK;
1379 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1380 int offset = handle & ~PAGE_MASK;
1381 int len = PAGE_ALIGN(size + offset);
1386 if (!arch_is_coherent())
1387 __dma_page_dev_to_cpu(page, offset, size, dir);
1389 iommu_unmap(mapping->domain, iova, len);
1390 __free_iova(mapping, iova, len);
1393 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1394 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1396 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1397 dma_addr_t iova = handle & PAGE_MASK;
1398 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1399 unsigned int offset = handle & ~PAGE_MASK;
1404 if (!arch_is_coherent())
1405 __dma_page_dev_to_cpu(page, offset, size, dir);
1408 static void arm_iommu_sync_single_for_device(struct device *dev,
1409 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1411 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1412 dma_addr_t iova = handle & PAGE_MASK;
1413 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1414 unsigned int offset = handle & ~PAGE_MASK;
1419 __dma_page_cpu_to_dev(page, offset, size, dir);
1422 struct dma_map_ops iommu_ops = {
1423 .alloc = arm_iommu_alloc_attrs,
1424 .free = arm_iommu_free_attrs,
1425 .mmap = arm_iommu_mmap_attrs,
1427 .map_page = arm_iommu_map_page,
1428 .unmap_page = arm_iommu_unmap_page,
1429 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1430 .sync_single_for_device = arm_iommu_sync_single_for_device,
1432 .map_sg = arm_iommu_map_sg,
1433 .unmap_sg = arm_iommu_unmap_sg,
1434 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1435 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1439 * arm_iommu_create_mapping
1440 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1441 * @base: start address of the valid IO address space
1442 * @size: size of the valid IO address space
1443 * @order: accuracy of the IO addresses allocations
1445 * Creates a mapping structure which holds information about used/unused
1446 * IO address ranges, which is required to perform memory allocation and
1447 * mapping with IOMMU aware functions.
1449 * The client device need to be attached to the mapping with
1450 * arm_iommu_attach_device function.
1452 struct dma_iommu_mapping *
1453 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1456 unsigned int count = size >> (PAGE_SHIFT + order);
1457 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1458 struct dma_iommu_mapping *mapping;
1462 return ERR_PTR(-EINVAL);
1464 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1468 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1469 if (!mapping->bitmap)
1472 mapping->base = base;
1473 mapping->bits = BITS_PER_BYTE * bitmap_size;
1474 mapping->order = order;
1475 spin_lock_init(&mapping->lock);
1477 mapping->domain = iommu_domain_alloc(bus);
1478 if (!mapping->domain)
1481 kref_init(&mapping->kref);
1484 kfree(mapping->bitmap);
1488 return ERR_PTR(err);
1491 static void release_iommu_mapping(struct kref *kref)
1493 struct dma_iommu_mapping *mapping =
1494 container_of(kref, struct dma_iommu_mapping, kref);
1496 iommu_domain_free(mapping->domain);
1497 kfree(mapping->bitmap);
1501 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1504 kref_put(&mapping->kref, release_iommu_mapping);
1508 * arm_iommu_attach_device
1509 * @dev: valid struct device pointer
1510 * @mapping: io address space mapping structure (returned from
1511 * arm_iommu_create_mapping)
1513 * Attaches specified io address space mapping to the provided device,
1514 * this replaces the dma operations (dma_map_ops pointer) with the
1515 * IOMMU aware version. More than one client might be attached to
1516 * the same io address space mapping.
1518 int arm_iommu_attach_device(struct device *dev,
1519 struct dma_iommu_mapping *mapping)
1523 err = iommu_attach_device(mapping->domain, dev);
1527 kref_get(&mapping->kref);
1528 dev->archdata.mapping = mapping;
1529 set_dma_ops(dev, &iommu_ops);
1531 pr_info("Attached IOMMU controller to %s device.\n", dev_name(dev));