--- /dev/null
+/* \r
+ * Copyright (C) ArcCore AB <contact@arccore.com>\r
+ *\r
+ * ST startup variables: \r
+ * _sidata - Start of .data in flash \r
+ * _sdata - start address of .data in RAM\r
+ * _edata - end address of .data in RAM\r
+ * _sbss - start address of .bss\r
+ * _ebss - end address of .bss\r
+ * _etext - ?\r
+ */\r
+\r
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm","elf32-littlearm")\r
+OUTPUT_ARCH(arm)\r
+ENTRY(Reset_Handler)\r
+\r
+MEMORY\r
+{\r
+ flash(R) : ORIGIN = 0x08008000, LENGTH = 256K-32K\r
+ ram(RW) : ORIGIN = 0x20000000, LENGTH = 64K\r
+}\r
+\r
+SECTIONS\r
+{\r
+\r
+ .isr_vector :\r
+ {\r
+ . = ALIGN(4);\r
+ KEEP(*(.isr_vector))\r
+ . = ALIGN(4);\r
+ } > flash\r
+\r
+ .text :\r
+ {\r
+ *(.text .text.* );\r
+ *(.glue_7) /* TODO */\r
+ *(.glue_7t) /* TODO */\r
+ \r
+ PROVIDE( btask_sup_matrix = .);\r
+ SORT(*)(.test_btask);\r
+ PROVIDE( etask_sup_matrix = .);\r
+ SORT(*)(.test_etask);\r
+ \r
+ /* ST/ARM special variable to initialize .data */\r
+ _etext = .;\r
+ } > flash\r
+\r
+ /* Relocatable Flash Driver */\r
+ .fls_rom : {\r
+ __FLS_ERASE_ROM__ = .;\r
+ *(.fls_erase);\r
+ __FLS_WRITE_ROM__ = .;\r
+ *(.fls_write);\r
+ __FLS_END_ROM__ = .;\r
+ } > flash\r
+\r
+ /* ARM exception section */\r
+ .ARM.exidx : { \r
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
+ } > flash\r
+ __exidx_start = .;\r
+\r
+ /* Read-only data section. */\r
+ .rodata : { \r
+ *(.rodata .rodata.* .gnu.linkonce.r.*)\r
+ _sidata = .;\r
+ } > flash\r
+\r
+ .data : AT(ALIGN(LOADADDR(.rodata)+SIZEOF(.rodata),4)) {\r
+ _sdata = .; \r
+ *(.data .data.* .gnu.linkonce.d.* .gnu.linkonce.r.* .eh_frame)\r
+ _edata = .; \r
+ } > ram\r
+\r
+ .t32_outport ALIGN(0x10): { *(.t32_outport); } > ram\r
+ .bss : {\r
+ _sbss = ., \r
+ *(.bss .bss.* COMMON .gnu.linkonce.b.*);\r
+ _ebss = .; \r
+ } > ram\r
+ \r
+ .init_stack ALIGN(16) (NOLOAD) : \r
+ { \r
+ . = . + 200; \r
+ _estack = .; \r
+ } > ram\r
+ \r
+ /* Fls RAM section */\r
+ .fls_ram ALIGN(16) (NOLOAD) : {\r
+ __FLS_ERASE_RAM__ = .;\r
+ . = . + SIZEOF(.fls_rom);\r
+ } > ram\r
+\r
+ .ctors :\r
+ {\r
+ KEEP (*(SORT(.ctors.*)))\r
+ }\r
+\r
+ .uninit ALIGN(0x10) (NOLOAD) : { *(.winidea_port .ramlog .dem_eventmemory_pri) ; } > ram\r
+\r
+ .boot_area 0x2000FE00 (NOLOAD):\r
+ {\r
+ _boot_area_start = .;\r
+ . = . + 256;\r
+ _boot_area_end = .;\r
+ } > ram\r
+ \r
+ PROVIDE (boot_area_start = _boot_area_start);\r
+ PROVIDE (boot_area_end = _boot_area_end);\r
+\r
+ __FLS_SIZE__ = SIZEOF(.fls_rom);\r
+ __FLS_WRITE_RAM__ = __FLS_ERASE_RAM__ + (__FLS_WRITE_ROM__ - __FLS_ERASE_ROM__);\r
+\r
+ /* Stabs debugging sections. */\r
+ .stab 0 : { *(.stab) }\r
+ .stabstr 0 : { *(.stabstr) }\r
+ .stab.excl 0 : { *(.stab.excl) }\r
+ .stab.exclstr 0 : { *(.stab.exclstr) }\r
+ .stab.index 0 : { *(.stab.index) }\r
+ .stab.indexstr 0 : { *(.stab.indexstr) }\r
+ .comment 0 : { *(.comment) }\r
+ /* DWARF debug sections.\r
+ Symbols in the DWARF debugging sections are relative to the beginning\r
+ of the section so we begin them at 0. */\r
+ /* DWARF 1 */\r
+ .debug 0 : { *(.debug) }\r
+ .line 0 : { *(.line) }\r
+ /* GNU DWARF 1 extensions */\r
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
+ .debug_sfnames 0 : { *(.debug_sfnames) }\r
+ /* DWARF 1.1 and DWARF 2 */\r
+ .debug_aranges 0 : { *(.debug_aranges) }\r
+ .debug_pubnames 0 : { *(.debug_pubnames) }\r
+ /* DWARF 2 */\r
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+ .debug_abbrev 0 : { *(.debug_abbrev) }\r
+ .debug_line 0 : { *(.debug_line) }\r
+ .debug_frame 0 : { *(.debug_frame) }\r
+ .debug_str 0 : { *(.debug_str) }\r
+ .debug_loc 0 : { *(.debug_loc) }\r
+ .debug_macinfo 0 : { *(.debug_macinfo) }\r
+ /* SGI/MIPS DWARF 2 extensions */\r
+ .debug_weaknames 0 : { *(.debug_weaknames) }\r
+ .debug_funcnames 0 : { *(.debug_funcnames) }\r
+ .debug_typenames 0 : { *(.debug_typenames) }\r
+ .debug_varnames 0 : { *(.debug_varnames) }\r
+}\r
+__EXCEPT_START__ = 0x0;\r
+__EXCEPT_END__ = 0x0;\r
+\r
+\r
+\r
+\r
+\r
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+\r