]> rtime.felk.cvut.cz Git - arc.git/commitdiff
ARM: Added peripherals clock setup to mcu
authorjonte <devnull@localhost>
Fri, 21 May 2010 06:42:21 +0000 (08:42 +0200)
committerjonte <devnull@localhost>
Fri, 21 May 2010 06:42:21 +0000 (08:42 +0200)
arch/arm/arm_cm3/drivers/Mcu.c
arch/arm/arm_cm3/drivers/Port.c
boards/stm32_mcbstm32/config/Mcu_Cfg.c
boards/stm32_mcbstm32/config/Mcu_Cfg.h

index 01ffa8fc704626fcc52b6c51136dc25fca982755..5735c42f2a51714cacbc6c330392db516bc6b81b 100644 (file)
@@ -278,6 +278,16 @@ static void SetClocks(Mcu_ClockSettingConfigType *clockSettingsPtr)
   }
 }
 
+/**
+  * Initialize Peripherals clocks
+  */
+static void InitPerClocks()
+{
+       RCC->AHBENR |= McuPerClockConfigData.AHBClocksEnable;
+       RCC->APB1ENR |= McuPerClockConfigData.APB1ClocksEnable;
+       RCC->APB2ENR |= McuPerClockConfigData.APB2ClocksEnable;
+}
+
 /**
   * Initialize Flash, PLL and clocks.
   */
@@ -371,6 +381,8 @@ Std_ReturnType Mcu_InitClock(const Mcu_ClockType ClockSetting)
   clockSettingsPtr = &Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting];\r
 
   InitMcuClocks(clockSettingsPtr);
+
+  InitPerClocks(clockSettingsPtr);
 \r
   return E_OK;\r
 }\r
index eff53189f6aa1cfe6b9df4dd46e00f3608611dd8..c2e794277af44359317199f66c5aca94b20803b4 100644 (file)
@@ -70,21 +70,6 @@ void Port_Init(const Port_ConfigType *configType)
 \r
        uint16_t portIndex,pinIndex;\r
 \r
-         RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);\r
-\r
-         /* Enable DMA1 clock */\r
-         RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);\r
-\r
-         /* Enable ADC1 and GPIOC clock */\r
-         RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 |\r
-                                RCC_APB2Periph_GPIOA |\r
-                                RCC_APB2Periph_GPIOB |\r
-                                RCC_APB2Periph_GPIOC,\r
-                                ENABLE);\r
-\r
-         /* PWM: TIM4 clock enable */\r
-         RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);\r
-\r
        // Set up all the ports\r
        for (portIndex = 0; portIndex < configType->portCount; portIndex++) {\r
                const Port_PortConfigType* portConfig = configType->ports[portIndex];\r
index 57a8f282c1fcce80f598ea13ee198ce9696e6a82..9d0946318733cc354667d421fc7c381850ebca9e 100644 (file)
@@ -31,8 +31,16 @@ Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {
   .McuRamSectionSize = 0xFF,\r
   }\r
 };\r
-\r
-Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+
+const Mcu_PerClockConfigType McuPerClockConfigData =
+{
+       .AHBClocksEnable = RCC_AHBPeriph_DMA1,
+       .APB1ClocksEnable = RCC_APB1Periph_TIM4,
+       .APB2ClocksEnable = (RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA |
+                                                RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC),
+};
+\r
+const Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
 {\r
   {\r
     .McuClockReferencePointFrequency = 8000000UL,\r
index 31444e67ede54c7e3ba07fe6f05ecafa7d24b77d..17c6022497501287be70608f90b108bf74298671 100644 (file)
 #define MCU_VERSION_INFO_API   STD_ON\r
 \r
 #include "Std_Types.h"\r
+
+#define RCC_AHBPeriph_DMA1               ((uint32_t)0x00000001)
+#define RCC_AHBPeriph_DMA2               ((uint32_t)0x00000002)
+#define RCC_AHBPeriph_SRAM               ((uint32_t)0x00000004)
+#define RCC_AHBPeriph_FLITF              ((uint32_t)0x00000010)
+#define RCC_AHBPeriph_CRC                ((uint32_t)0x00000040)
+
+#ifndef STM32F10X_CL
+ #define RCC_AHBPeriph_FSMC              ((uint32_t)0x00000100)
+ #define RCC_AHBPeriph_SDIO              ((uint32_t)0x00000400)
+#else
+ #define RCC_AHBPeriph_OTG_FS            ((uint32_t)0x00001000)
+ #define RCC_AHBPeriph_ETH_MAC           ((uint32_t)0x00004000)
+ #define RCC_AHBPeriph_ETH_MAC_Tx        ((uint32_t)0x00008000)
+ #define RCC_AHBPeriph_ETH_MAC_Rx        ((uint32_t)0x00010000)
+#endif
+
+#define RCC_APB1Periph_TIM2              ((uint32_t)0x00000001)
+#define RCC_APB1Periph_TIM3              ((uint32_t)0x00000002)
+#define RCC_APB1Periph_TIM4              ((uint32_t)0x00000004)
+#define RCC_APB1Periph_TIM5              ((uint32_t)0x00000008)
+#define RCC_APB1Periph_TIM6              ((uint32_t)0x00000010)
+#define RCC_APB1Periph_TIM7              ((uint32_t)0x00000020)
+#define RCC_APB1Periph_WWDG              ((uint32_t)0x00000800)
+#define RCC_APB1Periph_SPI2              ((uint32_t)0x00004000)
+#define RCC_APB1Periph_SPI3              ((uint32_t)0x00008000)
+#define RCC_APB1Periph_USART2            ((uint32_t)0x00020000)
+#define RCC_APB1Periph_USART3            ((uint32_t)0x00040000)
+#define RCC_APB1Periph_UART4             ((uint32_t)0x00080000)
+#define RCC_APB1Periph_UART5             ((uint32_t)0x00100000)
+#define RCC_APB1Periph_I2C1              ((uint32_t)0x00200000)
+#define RCC_APB1Periph_I2C2              ((uint32_t)0x00400000)
+#define RCC_APB1Periph_USB               ((uint32_t)0x00800000)
+#define RCC_APB1Periph_CAN1              ((uint32_t)0x02000000)
+#define RCC_APB1Periph_BKP               ((uint32_t)0x08000000)
+#define RCC_APB1Periph_PWR               ((uint32_t)0x10000000)
+#define RCC_APB1Periph_DAC               ((uint32_t)0x20000000)
+#define RCC_APB1Periph_CAN2              ((uint32_t)0x04000000)
+
+#define RCC_APB2Periph_AFIO              ((uint32_t)0x00000001)
+#define RCC_APB2Periph_GPIOA             ((uint32_t)0x00000004)
+#define RCC_APB2Periph_GPIOB             ((uint32_t)0x00000008)
+#define RCC_APB2Periph_GPIOC             ((uint32_t)0x00000010)
+#define RCC_APB2Periph_GPIOD             ((uint32_t)0x00000020)
+#define RCC_APB2Periph_GPIOE             ((uint32_t)0x00000040)
+#define RCC_APB2Periph_GPIOF             ((uint32_t)0x00000080)
+#define RCC_APB2Periph_GPIOG             ((uint32_t)0x00000100)
+#define RCC_APB2Periph_ADC1              ((uint32_t)0x00000200)
+#define RCC_APB2Periph_ADC2              ((uint32_t)0x00000400)
+#define RCC_APB2Periph_TIM1              ((uint32_t)0x00000800)
+#define RCC_APB2Periph_SPI1              ((uint32_t)0x00001000)
+#define RCC_APB2Periph_TIM8              ((uint32_t)0x00002000)
+#define RCC_APB2Periph_USART1            ((uint32_t)0x00004000)
+#define RCC_APB2Periph_ADC3              ((uint32_t)0x00008000)
+
+typedef struct {
+       uint32 AHBClocksEnable;
+       uint32 APB1ClocksEnable;
+       uint32 APB2ClocksEnable;
+} Mcu_PerClockConfigType;
+
+extern const Mcu_PerClockConfigType McuPerClockConfigData;
 \r
 typedef enum {\r
   MCU_CLOCKTYPE_EXT_REF_8MHZ = 0,\r