#define PORT_PTR (&DioPortConfigData)\r
#define CHANNEL_GRP_PTR (&DioConfigData)\r
\r
-#if ( DIO_VERSION_INFO_API == STD_ON )\r
-static Std_VersionInfoType _Dio_VersionInfo =\r
-{\r
- .vendorID = (uint16)1,\r
- .moduleID = (uint16)1,\r
- .instanceID = (uint8)1,\r
- .sw_major_version = (uint8)DIO_SW_MAJOR_VERSION,\r
- .sw_minor_version = (uint8)DIO_SW_MINOR_VERSION,\r
- .sw_patch_version = (uint8)DIO_SW_PATCH_VERSION,\r
- .ar_major_version = (uint8)DIO_AR_MAJOR_VERSION,\r
- .ar_minor_version = (uint8)DIO_AR_MINOR_VERSION,\r
- .ar_patch_version = (uint8)DIO_AR_PATCH_VERSION,\r
-};\r
-#endif\r
-\r
#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
static int Channel_Config_Contains(Dio_ChannelType channelId)\r
{\r
\r
level = GPIO_ReadInputData(GPIO_ports[portId]);\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
\r
GPIO_Write(GPIO_ports[portId], level);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
level = STD_LOW;\r
}\r
\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
\r
Dio_WritePort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId), portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
// Shift down\r
level = level >> channelGroupIdPtr->offset;\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
\r
Dio_WritePort(channelGroupIdPtr->port, portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
#include <string.h>\r
#include "Ramlog.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
{\r
return (((uint32_t)pll - 2) << 18);\r
}\r
+\r
+#ifdef STM32F10X_CL\r
static uint32_t GetPll2ValueFromMult(uint8_t pll)\r
{\r
return (((uint32_t)pll - 2) << 8);\r
}\r
+#endif\r
\r
/**\r
* Set bus clocks. SysClk,AHBClk,APB1Clk,APB2Clk\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#else\r
#define VALIDATE_PARAM_PIN(_api)\r
#endif\r
\r
+#if (PORT_VERSION_INFO_API == STD_ON)\r
static Std_VersionInfoType _Port_VersionInfo =\r
{ .vendorID = (uint16)1, .moduleID = (uint16) MODULE_ID_PORT,\r
.instanceID = (uint8)1,\r
.ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
.ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
.ar_patch_version = (uint8)PORT_AR_PATCH_VERSION, };\r
+#endif\r
\r
/** @req PORT140 */\r
/** @req PORT041 Comment: To reduce flash usage the configuration tool can disable configuration of some ports */\r
\r
_portState = PORT_INITIALIZED;\r
_configPtr = (Port_ConfigType *)configType;\r
- cleanup: return;\r
+ return;\r
}\r
\r
/** @req PORT141 */\r
*gpioAddr |= (GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF) << bit; // TODO shall this be added to conf?\r
}\r
\r
- cleanup:return;\r
+ return;\r
}\r
#endif\r
\r
VALIDATE_STATE_INIT(PORT_REFRESH_PORT_DIRECTION_ID);\r
\r
/* TODO Not implemented yet */\r
- cleanup: return;\r
+ return;\r
}\r
\r
/** req PORT143 */\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_MODE_ID, PORT_E_MODE_UNCHANGEABLE );\r
#endif\r
\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
#define DIO_GET_PORT_FROM_CHANNEL_ID(_channelId) (_channelId >> 8)\r
#define DIO_GET_BIT_FROM_CHANNEL_ID(_channelId) (1 << (_channelId & 0x1F))\r
\r
-#if ( DIO_VERSION_INFO_API == STD_ON )\r
-static Std_VersionInfoType _Dio_VersionInfo =\r
-{\r
- .vendorID = (uint16)1,\r
- .moduleID = (uint16)1,\r
- .instanceID = (uint8)1,\r
- .sw_major_version = (uint8)DIO_SW_MAJOR_VERSION,\r
- .sw_minor_version = (uint8)DIO_SW_MINOR_VERSION,\r
- .sw_patch_version = (uint8)DIO_SW_PATCH_VERSION,\r
- .ar_major_version = (uint8)DIO_AR_MAJOR_VERSION,\r
- .ar_minor_version = (uint8)DIO_AR_MINOR_VERSION,\r
- .ar_patch_version = (uint8)DIO_AR_PATCH_VERSION,\r
-};\r
-#endif\r
-\r
#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
static int Channel_Config_Contains(Dio_ChannelType channelId)\r
{\r
\r
level = (uint8)GPIO_ports[portId]->DIN;\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
\r
GPIO_ports[portId]->DOUT = (uint32)level;\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
level = STD_LOW;\r
}\r
\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
// Shift down\r
level = level >> channelGroupIdPtr->offset;\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
\r
Dio_WritePort(channelGroupIdPtr->port, portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
\r
#include "core_cr4.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_PARAM_PIN(_pin, _api)\\r
if(GET_PIN_PORT(_pin) >= PORT_NUMBER_OF_PORTS || Port_Base[GET_PIN_PORT(_pin)] == PORT_NOT_CONFIGURED || GET_PIN_PIN(_pin) > 7 ){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_PIN ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#else\r
}\r
\r
// Set pin direction\r
- if (conf & PORT_PIN_IN) {\r
- Port_Base[port]->DIR &= ~mask;\r
-\r
- } else {\r
+ if (conf & PORT_PIN_OUT) {\r
Port_Base[port]->DIR |= mask;\r
\r
// Set open drain\r
} else {\r
Port_Base[port]->PDR &= ~mask;\r
}\r
+\r
+ } else {\r
+ Port_Base[port]->DIR &= ~mask;\r
}\r
\r
// Set pull up or down or nothing.\r
\r
_portState = PORT_INITIALIZED;\r
\r
- cleanup:return;\r
+ return;\r
}\r
\r
#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
\r
}\r
\r
-cleanup:return;\r
+ return;\r
}\r
#endif\r
\r
Port_RefreshPin(i);\r
}\r
}\r
-cleanup:return;\r
+ return;\r
}\r
\r
\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
\r
Port_Base[port]->FUN &= ~mask;\r
Port_Base[port]->FUN |= ((Mode & 1) << pin);\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
#include <string.h>\r
#include "Ramlog.h"\r
\r
-#define USE_TRACE 1\r
#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#else\r
\r
_portState = PORT_INITIALIZED;\r
_configPtr = configType;\r
-#if (PORT_DEV_ERROR_DETECT == STD_ON)\r
- cleanup:\r
-#endif\r
+\r
return;\r
}\r
\r
Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_DIRECTION_ID, PORT_E_PARAM_PIN );\r
}\r
\r
- cleanup:return;\r
+ return;\r
}\r
#endif\r
\r
DDRT = curValue;\r
#endif\r
\r
-#if (PORT_DEV_ERROR_DETECT == STD_ON)\r
- cleanup:\r
-#endif\r
return;\r
}\r
\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_MODE_ID, PORT_E_MODE_UNCHANGEABLE );\r
#endif\r
\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
#include "irq.h"\r
+#include "arc.h"\r
#endif\r
\r
\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
#include "irq.h"\r
+#include "arc.h"\r
#endif\r
\r
\r
{\r
level = STD_LOW;\r
}\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
// Write level to SIU.\r
SIU.GPDO [channelId].R = level;\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
vuint16_t *ptr = (vuint16_t *)&SIU.PGPDI0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
#endif\r
level = ptr[portId]; // Read the bit pattern (16bits) to the port\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
vuint16_t *ptr = (vuint16_t *)&SIU.PGPDO0; // The GPDO 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
#endif\r
ptr[portId] = level; // Write the bit pattern (16bits) to the port\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_PortLevelType Dio_ReadChannelGroup(\r
\r
// Shift down\r
level<<=channelGroupIdPtr->offset;\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
// Build the 32 bits Mask_Valule, and write to masked output register\r
ptr[channelGroupIdPtr->port] = (channelGroupIdPtr->mask << 16)&((level\r
<<channelGroupIdPtr->offset)|0xFFFF);\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
#else\r
return;\r
#endif\r
}\r
}\r
\r
-struct tcd_t * Dma_GetTcd( Dma_ChannelType channel ) {\r
+volatile struct tcd_t * Dma_GetTcd( Dma_ChannelType channel ) {\r
return &EDMA.TCD[channel];\r
}\r
\r
void Dma_StartChannel (Dma_ChannelType channel);\r
void Dma_StopChannel (Dma_ChannelType channel);\r
Std_ReturnType Dma_ChannelDone (Dma_ChannelType channel);\r
-struct tcd_t * Dma_GetTcd( Dma_ChannelType channel );\r
+volatile struct tcd_t * Dma_GetTcd( Dma_ChannelType channel );\r
boolean Dma_CheckConfig( void );\r
\r
#endif /* DMA_H_ */\r
#include "Os.h"\r
#include "irq.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_PARAM_PIN(_pin, _api)\\r
if(_pin>sizeof(SIU.PCR)){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_PIN ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
#else\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api)\r
//memcpy((void *)inConfig, configType->inConfig, configType->inCnt);\r
_portState = PORT_INITIALIZED;\r
_configPtr = configType;\r
- cleanup: return;\r
+ return;\r
}\r
\r
#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
SIU.PCR[pin].B.OBE = 1;\r
_Irq_Disable_restore(state); // Restore interrupts\r
}\r
-cleanup:return;\r
+ return;\r
}\r
#endif\r
\r
padCfgPtr++;\r
}\r
\r
- cleanup:return;\r
+ return;\r
}\r
\r
#if PORT_VERSION_INFO_API == STD_ON\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
//characteristics of external pins. The PCRs can select the multiplexed function of a pin, selection of pullup\r
//or pulldown devices, the slew rate of I/O signals, open drain mode for output pins, and hysteresis.\r
SIU.PCR[Pin].R = Mode; // Put the selected mode to the PCR register\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
#include "Os.h"\r
#endif\r
#include "Mcu.h"\r
+#if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
+#include "irq.h"\r
+#include "arc.h"\r
+#endif\r
+\r
\r
#if PWM_DEV_EROR_DETECT==STD_ON\r
#define PWM_VALIDATE(_exp, _errid) \\r
#include "Det.h"\r
#include <stdlib.h>\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_HIGH\r
#define FLASH_END 0xFFFFF\r
\r
/* Define instances of modules */\r
-//#define PBRIDGE_A (*( struct PBRIDGE_A_tag *) 0xC3F00000)\r
-#define MPU (*( struct MPU_tag *) 0xFFF10000)\r
-#define SEMA4 (*( struct SEMA4_tag *) 0xFFF14000)\r
-\r
-#define MCM (*( struct MCM_tag *) 0xFFF40000)\r
-#define EDMA (*( struct EDMA_tag *) 0xFFF44000)\r
-#define INTC (*( struct INTC_tag *) 0xFFF48000)\r
-\r
-#define EQADC (*( struct EQADC_tag *) 0xFFF80000)\r
-\r
-#define I2C (*( struct I2C_tag *) 0xFFF88000)\r
-\r
-#define DSPI_A (*( struct DSPI_tag *) 0xFFF90000)\r
-#define DSPI_B (*( struct DSPI_tag *) 0xFFF94000)\r
-#define DSPI_C (*( struct DSPI_tag *) 0xFFF98000)\r
-#define DSPI_D (*( struct DSPI_tag *) 0xFFF9C000)\r
-\r
-#define ESCI_A (*( struct ESCI_tag *) 0xFFFA0000)\r
-#define ESCI_B (*( struct ESCI_tag *) 0xFFFA4000)\r
-#define ESCI_C (*( struct ESCI_tag *) 0xFFFA8000)\r
-#define ESCI_D (*( struct ESCI_tag *) 0xFFFAC000)\r
-#define ESCI_E (*( struct ESCI_tag *) 0xFFFB0000)\r
-#define ESCI_F (*( struct ESCI_tag *) 0xFFFB4000)\r
-#define ESCI_G (*( struct ESCI_tag *) 0xFFFB8000)\r
-#define ESCI_H (*( struct ESCI_tag *) 0xFFFBC000)\r
-\r
-#define CAN_A (*( struct FLEXCAN_tag *) 0xFFFC0000)\r
-#define CAN_B (*( struct FLEXCAN_tag *) 0xFFFC4000)\r
-#define CAN_C (*( struct FLEXCAN_tag *) 0xFFFC8000)\r
-#define CAN_D (*( struct FLEXCAN_tag *) 0xFFFCC000)\r
-#define CAN_E (*( struct FLEXCAN_tag *) 0xFFFD0000)\r
-#define CAN_F (*( struct FLEXCAN_tag *) 0xFFFD4000)\r
-#define FR (*( struct FR_tag *) 0xFFFD8000)\r
-#define DMAMUX (*( struct DMAMUX_tag *) 0xFFFDC000)\r
-#define PIT (*( struct PIT_tag *) 0xFFFE0000)\r
-#define EMIOS (*( struct EMIOS_tag *) 0xFFFE4000)\r
-#define SIU (*( struct SIU_tag *) 0xFFFE8000)\r
-#define CRP (*( struct CRP_tag *) 0xFFFEC000)\r
-#define FMPLL (*( struct FMPLL_tag *) 0xFFFF0000)\r
-#define EBI (*( struct EBI_tag *) 0xFFFF4000)\r
-#define FLASH (*( struct FLASH_tag *) 0xFFFF8000)\r
+//#define PBRIDGE_A (*( volatile struct PBRIDGE_A_tag *) 0xC3F00000)\r
+#define MPU (*( volatile struct MPU_tag *) 0xFFF10000)\r
+#define SEMA4 (*( volatile struct SEMA4_tag *) 0xFFF14000)\r
+\r
+#define MCM (*( volatile struct MCM_tag *) 0xFFF40000)\r
+#define EDMA (*( volatile struct EDMA_tag *) 0xFFF44000)\r
+#define INTC (*( volatile struct INTC_tag *) 0xFFF48000)\r
+\r
+#define EQADC (*( volatile struct EQADC_tag *) 0xFFF80000)\r
+\r
+#define I2C (*( volatile struct I2C_tag *) 0xFFF88000)\r
+\r
+#define DSPI_A (*( volatile struct DSPI_tag *) 0xFFF90000)\r
+#define DSPI_B (*( volatile struct DSPI_tag *) 0xFFF94000)\r
+#define DSPI_C (*( volatile struct DSPI_tag *) 0xFFF98000)\r
+#define DSPI_D (*( volatile struct DSPI_tag *) 0xFFF9C000)\r
+\r
+#define ESCI_A (*( volatile struct ESCI_tag *) 0xFFFA0000)\r
+#define ESCI_B (*( volatile struct ESCI_tag *) 0xFFFA4000)\r
+#define ESCI_C (*( volatile struct ESCI_tag *) 0xFFFA8000)\r
+#define ESCI_D (*( volatile struct ESCI_tag *) 0xFFFAC000)\r
+#define ESCI_E (*( volatile struct ESCI_tag *) 0xFFFB0000)\r
+#define ESCI_F (*( volatile struct ESCI_tag *) 0xFFFB4000)\r
+#define ESCI_G (*( volatile struct ESCI_tag *) 0xFFFB8000)\r
+#define ESCI_H (*( volatile struct ESCI_tag *) 0xFFFBC000)\r
+\r
+#define CAN_A (*( volatile struct FLEXCAN_tag *) 0xFFFC0000)\r
+#define CAN_B (*( volatile struct FLEXCAN_tag *) 0xFFFC4000)\r
+#define CAN_C (*( volatile struct FLEXCAN_tag *) 0xFFFC8000)\r
+#define CAN_D (*( volatile struct FLEXCAN_tag *) 0xFFFCC000)\r
+#define CAN_E (*( volatile struct FLEXCAN_tag *) 0xFFFD0000)\r
+#define CAN_F (*( volatile struct FLEXCAN_tag *) 0xFFFD4000)\r
+#define FR (*( volatile struct FR_tag *) 0xFFFD8000)\r
+#define DMAMUX (*( volatile struct DMAMUX_tag *) 0xFFFDC000)\r
+#define PIT (*( volatile struct PIT_tag *) 0xFFFE0000)\r
+#define EMIOS (*( volatile struct EMIOS_tag *) 0xFFFE4000)\r
+#define SIU (*( volatile struct SIU_tag *) 0xFFFE8000)\r
+#define CRP (*( volatile struct CRP_tag *) 0xFFFEC000)\r
+#define FMPLL (*( volatile struct FMPLL_tag *) 0xFFFF0000)\r
+#define EBI (*( volatile struct EBI_tag *) 0xFFFF4000)\r
+#define FLASH (*( volatile struct FLASH_tag *) 0xFFFF8000)\r
\r
#ifdef __MWERKS__\r
#pragma pop\r
\r
void Irq_EOI( void ) {\r
#if defined(CFG_MPC5516)\r
- struct INTC_tag *intc = &INTC;\r
+ volatile struct INTC_tag *intc = &INTC;\r
intc->EOIR_PRC0.R = 0;\r
#elif defined(CFG_MPC5554)||defined(CFG_MPC5567)\r
volatile struct INTC_tag *intc = &INTC;\r
else\r
{\r
#if defined(CFG_MPC5516)\r
- struct INTC_tag *intc = &INTC;\r
+ volatile struct INTC_tag *intc = &INTC;\r
vector = (intc->IACKR_PRC0.B.INTVEC_PRC0);\r
#elif defined(CFG_MPC5554)||defined(CFG_MPC5567)\r
volatile struct INTC_tag *intc = &INTC;\r
\r
void EcuM_AL_DriverInitZero(void)\r
{\r
- Det_Init();\r
- Det_Start();\r
+ Det_Init();/** @req EcuM2783 */\r
+ Det_Start();/** @req EcuM2634 */\r
}\r
\r
EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
EcuM_ConfigType EcuMConfig =\r
{\r
.EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
- .EcuMDefaultShutdownMode = 0, // Don't care\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
.EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
.EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,
.EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,
typedef struct\r
{\r
EcuM_StateType EcuMDefaultShutdownTarget;\r
- uint8 EcuMDefaultShutdownMode;\r
+ uint8 EcuMDefaultSleepMode;\r
AppModeType EcuMDefaultAppMode;\r
uint32 EcuMRunMinimumDuration;
uint32 EcuMNvramReadAllTimeout;
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
* Created on: 2009-okt-02\r
* Author: Fredrik\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef ADC_CFG_H_\r
#define ADC_CFG_H_\r
\r
#endif
\r
+#warning "This default file may only be used as an example!"
+
#ifndef CAN_CFG_H_\r
#define CAN_CFG_H_\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+\r
+\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef DIO_CFG_H_\r
#define DIO_CFG_H_\r
\r
DIO_PORT_F,\r
} Dio_Hw_PortType;\r
\r
-#define LED_CHANNEL1 (DIO_CHANNEL_B13)\r
-#define LED_CHANNEL2 (DIO_CHANNEL_B14)\r
+// Channels\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 (DIO_CHANNEL_B13)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 (DIO_CHANNEL_B14)\r
+\r
+// Channel group\r
+#define DIO_GROUP_NAME_LED_GROUP (&DioConfigData[0])\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (DIO_PORT_B)\r
\r
-#define LED_PORT (DIO_PORT_B)\r
\r
-#define LED_GROUP (&DioConfigData[0])\r
\r
+// Pointers for convenience.\r
// Channels\r
extern const Dio_ChannelType DioChannelConfigData[];\r
// Port\r
\r
const Dio_ChannelType DioChannelConfigData[] =\r
{\r
- LED_CHANNEL1,\r
- LED_CHANNEL2,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
DIO_END_OF_LIST,\r
};\r
\r
const Dio_PortType DioPortConfigData[] =\r
{\r
- LED_PORT,\r
+ DIO_PORT_NAME_LED_PORT,\r
DIO_END_OF_LIST\r
};\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef FLS_CFG_H_\r
#define FLS_CFG_H_\r
\r
* Definitions of configuration parameters for GPT Driver.\r
*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef GPT_CFG_H_\r
#define GPT_CFG_H_\r
#include "Std_Types.h"\r
RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO),
};
\r
-const Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
{\r
{\r
.McuClockReferencePointFrequency = 8000000UL,\r
};\r
\r
\r
- const Mcu_ConfigType McuConfigData[] = {\r
+const Mcu_ConfigType McuConfigData[] = {\r
{\r
// Enables/Disables clock failure notification. In case this feature is not supported\r
// by HW the setting should be disabled.\r
* -------------------------------- Arctic Core ------------------------------*/
+#warning "This default file may only be used as an example!"
+
#ifndef MCU_CFG_H_\r
#define MCU_CFG_H_\r
\r
* Definitions of configuration parameters for Port Driver.
*/
+#warning "This default file may only be used as an example!"
+
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
* Created on: 2009-okt-02\r
* Author: jonte\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef PWM_CFG_H_\r
#define PWM_CFG_H_\r
\r
* Created on: 2009-okt-02\r
* Author: Fredrik\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef ADC_CFG_H_\r
#define ADC_CFG_H_\r
\r
#endif
\r
+#warning "This default file may only be used as an example!"
+
#ifndef CAN_CFG_H_\r
#define CAN_CFG_H_\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef DIO_CFG_H_\r
#define DIO_CFG_H_\r
\r
DIO_PORT_F,\r
} Dio_Hw_PortType;\r
\r
-#define LED_CHANNEL1 (DIO_CHANNEL_D7)\r
-#define LED_CHANNEL2 (DIO_CHANNEL_D13)\r
-#define LED_CHANNEL3 (DIO_CHANNEL_D3)\r
-#define LED_CHANNEL4 (DIO_CHANNEL_D4)\r
+// Channels\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 (DIO_CHANNEL_D7)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 (DIO_CHANNEL_D13)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL3 (DIO_CHANNEL_D3)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL4 (DIO_CHANNEL_D4)\r
\r
-#define LED_PORT (DIO_PORT_D)\r
+// Channel group\r
+#define DIO_GROUP_NAME_LED_GROUP (&DioConfigData[0])\r
\r
-#define LED_GROUP (&DioConfigData[0])\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (DIO_PORT_D)\r
\r
// Channels\r
extern const Dio_ChannelType DioChannelConfigData[];\r
-#define CHANNEL_PTR (&DioChannelConfigData)\r
\r
+\r
+\r
+// Pointers for convenience.\r
// Port\r
extern const Dio_PortType DioPortConfigData[];\r
-#define PORT_PTR (&DioPortConfigData)\r
\r
// Channel group\r
extern const Dio_ChannelGroupType DioConfigData[];\r
-#define CHANNEL_GRP_PTR (&DioConfigData)\r
\r
#endif /* DIO_CFG_H_ */\r
\r
const Dio_ChannelType DioChannelConfigData[] =\r
{\r
- LED_CHANNEL1,\r
- LED_CHANNEL2,\r
- LED_CHANNEL3,\r
- LED_CHANNEL4,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL3,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL4,\r
DIO_END_OF_LIST,\r
};\r
\r
const Dio_PortType DioPortConfigData[] =\r
{\r
- LED_PORT,\r
+ DIO_PORT_NAME_LED_PORT,\r
DIO_END_OF_LIST\r
};\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef FLS_CFG_H_\r
#define FLS_CFG_H_\r
\r
* Definitions of configuration parameters for GPT Driver.\r
*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef GPT_CFG_H_\r
#define GPT_CFG_H_\r
#include "Std_Types.h"\r
* -------------------------------- Arctic Core ------------------------------*/
+#warning "This default file may only be used as an example!"
+
#ifndef MCU_CFG_H_\r
#define MCU_CFG_H_\r
\r
* Definitions of configuration parameters for Port Driver.
*/
+#warning "This default file may only be used as an example!"
+
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
* Created on: 2009-okt-02\r
* Author: jonte\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef PWM_CFG_H_\r
#define PWM_CFG_H_\r
\r
DspUdsWriteDataByIdentifier(msgData.pduRxData, msgData.pduTxData);\r
break;\r
\r
+ case SID_ROUTINE_CONTROL:\r
+ DspUdsRoutineControl(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
case SID_TESTER_PRESENT:\r
DspUdsTesterPresent(msgData.pduRxData, msgData.pduTxData);\r
break;\r
case SID_READ_DATA_BY_PERIODIC_IDENTIFIER:\r
case SID_DYNAMICALLY_DEFINE_DATA_IDENTIFIER:\r
case SID_INPUT_OUTPUT_CONTROL_BY_IDENTIFIER:\r
- case SID_ROUTINE_CONTROL:\r
default:\r
/* Non implemented service */\r
createAndSendNcr(DCM_E_SERVICENOTSUPPORTED);\r
}\r
\r
\r
+static boolean lookupRoutine(uint16 routineId, const Dcm_DspRoutineType **routinePtr)\r
+{\r
+ const Dcm_DspRoutineType *dspRoutine = DCM_Config.Dsp->DspRoutine;\r
+ boolean routineFound = FALSE;\r
+\r
+ while ((dspRoutine->DspRoutineIdentifier != routineId) && (!dspRoutine->Arc_EOL)) {\r
+ dspRoutine++;\r
+ }\r
+\r
+ if (!dspRoutine->Arc_EOL) {\r
+ routineFound = TRUE;\r
+ *routinePtr = dspRoutine;\r
+ }\r
+\r
+ return routineFound;\r
+}\r
+\r
+\r
+static Dcm_NegativeResponseCodeType startRoutine(const Dcm_DspRoutineType *routinePtr, const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Std_ReturnType routineResult;\r
+\r
+ // startRoutine\r
+ if ((routinePtr->DspStartRoutineFnc != NULL) && (routinePtr->DspRoutineInfoRef->DspStartRoutine != NULL)) {\r
+ if (((routinePtr->DspRoutineInfoRef->DspStartRoutine->DspStartRoutineCtrlOptRecSize + 4) == pduRxData->SduLength)\r
+ && ((routinePtr->DspRoutineInfoRef->DspStartRoutine->DspStartRoutineStsOptRecSize + 4) <= pduTxData->SduLength)) {\r
+ pduTxData->SduLength = routinePtr->DspRoutineInfoRef->DspStartRoutine->DspStartRoutineStsOptRecSize + 4;\r
+ routineResult = routinePtr->DspStartRoutineFnc(&pduRxData->SduDataPtr[4], &pduTxData->SduDataPtr[4], &responseCode); /** @req DCM400 */ /** @req DCM401 */\r
+ if (routineResult != E_OK) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+static Dcm_NegativeResponseCodeType stopRoutine(const Dcm_DspRoutineType *routinePtr, const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Std_ReturnType routineResult;\r
+\r
+ // stopRoutine\r
+ if ((routinePtr->DspStopRoutineFnc != NULL) && (routinePtr->DspRoutineInfoRef->DspRoutineStop != NULL)) {\r
+ if (((routinePtr->DspRoutineInfoRef->DspRoutineStop->DspStopRoutineCtrlOptRecSize + 4) == pduRxData->SduLength)\r
+ && ((routinePtr->DspRoutineInfoRef->DspRoutineStop->DspStopRoutineStsOptRecSize + 4) <= pduTxData->SduLength)) {\r
+ pduTxData->SduLength = routinePtr->DspRoutineInfoRef->DspRoutineStop->DspStopRoutineStsOptRecSize + 4;\r
+ routineResult = routinePtr->DspStopRoutineFnc(&pduRxData->SduDataPtr[4], &pduTxData->SduDataPtr[4], &responseCode); /** @req DCM402 */ /** @req DCM403 */\r
+ if (routineResult != E_OK) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+static Dcm_NegativeResponseCodeType requestRoutineResults(const Dcm_DspRoutineType *routinePtr, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Std_ReturnType routineResult;\r
+\r
+ // requestRoutineResults\r
+ if ((routinePtr->DspRequestResultRoutineFnc != NULL) && (routinePtr->DspRoutineInfoRef->DspRoutineRequestRes != NULL)) {\r
+ if ((routinePtr->DspRoutineInfoRef->DspRoutineRequestRes->DspReqResRtnCtrlOptRecSize + 4) <= pduTxData->SduLength) {\r
+ pduTxData->SduLength = routinePtr->DspRoutineInfoRef->DspRoutineRequestRes->DspReqResRtnCtrlOptRecSize + 4;\r
+ routineResult = routinePtr->DspRequestResultRoutineFnc(&pduTxData->SduDataPtr[4], &responseCode); /** @req DCM404 */ /** @req DCM405 */\r
+ if (routineResult != E_OK) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+void DspUdsRoutineControl(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ /** @req DCM257 */\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ uint8 subFunctionNumber = 0;\r
+ uint16 routineId = 0;\r
+ const Dcm_DspRoutineType *routinePtr = NULL;\r
+\r
+ if (pduRxData->SduLength >= 4) {\r
+ subFunctionNumber = pduRxData->SduDataPtr[1];\r
+ if ((subFunctionNumber > 0) && (subFunctionNumber < 4)) {\r
+ routineId = (uint16)((uint16)pduRxData->SduDataPtr[2] << 8) + pduRxData->SduDataPtr[3];\r
+ if (lookupRoutine(routineId, &routinePtr)) {\r
+ if (DspCheckSessionLevel(routinePtr->DspRoutineInfoRef->DspRoutineAuthorization.DspRoutineSessionRef)) {\r
+ if (DspCheckSecurityLevel(routinePtr->DspRoutineInfoRef->DspRoutineAuthorization.DspRoutineSecurityLevelRef)) {\r
+ switch (subFunctionNumber) {\r
+ case 0x01: // startRoutine\r
+ responseCode = startRoutine(routinePtr, pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x02: // stopRoutine\r
+ responseCode = stopRoutine(routinePtr, pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x03: // requestRoutineResults\r
+ responseCode = requestRoutineResults(routinePtr, pduTxData);\r
+ break;\r
+\r
+ default: // This shall never happen\r
+ responseCode = DCM_E_SUBFUNCTIONNOTSUPPORTED;\r
+ break;\r
+ }\r
+ }\r
+ else { // Not allowed in current security level\r
+ responseCode = DCM_E_SECUTITYACCESSDENIED;\r
+ }\r
+ }\r
+ else { // Not allowed in current session\r
+ responseCode = DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION;\r
+ }\r
+ }\r
+ else { // Unknown routine identifier\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+ }\r
+ else { // Sub function not supported\r
+ responseCode = DCM_E_SUBFUNCTIONNOTSUPPORTED;\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ // Add header to the positive response message\r
+ pduTxData->SduDataPtr[1] = subFunctionNumber;\r
+ pduTxData->SduDataPtr[2] = (routineId >> 8) & 0xFFu;\r
+ pduTxData->SduDataPtr[3] = routineId & 0xFFu;\r
+ }\r
+\r
+ DsdDspProcessingDone(responseCode);\r
+}\r
+\r
+\r
void DspUdsTesterPresent(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
/** @req DCM251 */\r
void DspUdsReadScalingDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
void DspUdsWriteDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
void DspUdsControlDtcSetting(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsRoutineControl(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
void DspDcmConfirmation(PduIdType confirmPduId);\r
\r
boolean DspCheckSessionLevel(Dcm_DspSessionRowType const* const* sessionLevelRefTable);\r
typedef Std_ReturnType (*Dcm_CallbackGgetDTRValueFncType)(uint16 *testval, uint16 *minlimit, uint16 *maxlimit, uint8 *status);\r
\r
// RoutineServices_<ROUTINENAME>\r
-typedef Std_ReturnType (*Dcm_CallbackStartFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
-typedef Std_ReturnType (*Dcm_CallbackStopFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
-typedef Std_ReturnType (*Dcm_CallbackRequestResultFncType)(uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
+typedef Std_ReturnType (*Dcm_CallbackStartRoutineFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
+typedef Std_ReturnType (*Dcm_CallbackStopRoutineFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
+typedef Std_ReturnType (*Dcm_CallbackRequestResultRoutineFncType)(uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
\r
// RequestControlServices_<TID>\r
typedef Std_ReturnType (*Dcm_CallbackRequestControlType)(uint8 *outBuffer, uint8 *inBuffer);\r
\r
// 10.2.37\r
typedef struct {\r
- const Dcm_DspSessionRowType *DspRoutineSessionRef; // (1..*) /** @req DCM649 */\r
- const Dcm_DspSecurityRowType *DspRoutineSecurityLevelRef; // (1..*) /** @req DCM648 */\r
+ const Dcm_DspSessionRowType **DspRoutineSessionRef; // (1..*) /** @req DCM649 */\r
+ const Dcm_DspSecurityRowType **DspRoutineSecurityLevelRef; // (1..*) /** @req DCM648 */\r
} Dcm_DspRoutineAuthorizationType; /** @req DCM644 */\r
\r
// 10.2.38\r
// 10.2.36\r
typedef struct {\r
// Containers\r
- const Dcm_DspRoutineAuthorizationType *DspRoutineAuthorization; // (1)\r
- const Dcm_DspRoutineRequestResType *DspRoutineRequestRes; // (0..1)\r
- const Dcm_DspRoutineStopType *DspRoutineStop; // (0..1)\r
+ const Dcm_DspRoutineAuthorizationType DspRoutineAuthorization; // (1)\r
const Dcm_DspStartRoutineType *DspStartRoutine; // (1)\r
+ const Dcm_DspRoutineStopType *DspRoutineStop; // (0..1)\r
+ const Dcm_DspRoutineRequestResType *DspRoutineRequestRes; // (0..1)\r
} Dcm_DspRoutineInfoType; /** @req DCM643 */\r
\r
// 10.2.35\r
typedef struct {\r
- boolean DspRoutineUsePort; // (1)\r
- uint16 DspRoutineIdentifier; // (1) /** @req DCM641 */\r
- const Dcm_DspRoutineInfoType *DspRoutineInfoRef; // (1) /** @req DCM642 */\r
- Dcm_CallbackStartFncType DspStartRoutineFnc; // (0..1) /** @req DCM664 */\r
- Dcm_CallbackStopFncType DspStopRoutineFnc; // (0..1) /** @req DCM665 */\r
- Dcm_CallbackRequestResultFncType DspRequestResultRoutineFnc; // (0..1) /** @req DCM665 */\r
+ boolean DspRoutineUsePort; // (1)\r
+ uint16 DspRoutineIdentifier; // (1) /** @req DCM641 */\r
+ const Dcm_DspRoutineInfoType *DspRoutineInfoRef; // (1) /** @req DCM642 */\r
+ Dcm_CallbackStartRoutineFncType DspStartRoutineFnc; // (0..1) /** @req DCM664 */\r
+ Dcm_CallbackStopRoutineFncType DspStopRoutineFnc; // (0..1) /** @req DCM665 */\r
+ Dcm_CallbackRequestResultRoutineFncType DspRequestResultRoutineFnc; // (0..1) /** @req DCM665 */\r
+ boolean Arc_EOL;\r
} Dcm_DspRoutineType; /** @req DCM640 */\r
\r
// 10.2.41\r
#ifndef DEM_TYPES_H_\r
#define DEM_TYPES_H_\r
#include "Std_Types.h" /** @req DEM176.Std */\r
-\r
+#include "Rte_Dem.h"\r
#define DEM_EVENT_DESTINATION_END_OF_LIST 0\r
\r
/*\r
#define DEM_SAEJ1939_73 0x02\r
#define DEM_ISO_11992_4 0x03\r
\r
-/*\r
- * Dem_EventIdType\r
- */\r
-typedef uint16 Dem_EventIdType;\r
-\r
/*\r
* Dem_DTCGroupType\r
*/\r
#define DEM_DTC_STATUS_MASK_ALL (uint8)0x00\r
\r
\r
-/*\r
- * DemDTCKindType\r
- */\r
-typedef uint8 Dem_DTCKindType;\r
-#define DEM_DTC_KIND_ALL_DTCS (Dem_DTCKindType)0x01\r
-#define DEM_DTC_KIND_EMISSION_REL_DTCS (Dem_DTCKindType)0x02\r
-\r
/*\r
* DemDTCOriginType\r
*/\r
#define DEM_DTC_ORIGIN_PERMANENT_MEMORY (Dem_DTCOriginType)0x03\r
#define DEM_DTC_ORIGIN_MIRROR_MEMORY (Dem_DTCOriginType)0x04\r
\r
-/*\r
- * DemEventStatusExtendedType\r
- */\r
-typedef uint8 Dem_EventStatusExtendedType;\r
-#define DEM_TEST_FAILED (Dem_EventStatusExtendedType)0x01\r
-#define DEM_TEST_FAILED_THIS_OPERATION_CYCLE (Dem_EventStatusExtendedType)0x02\r
-#define DEM_PENDING_DTC (Dem_EventStatusExtendedType)0x04\r
-#define DEM_CONFIRMED_DTC (Dem_EventStatusExtendedType)0x08\r
-#define DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR (Dem_EventStatusExtendedType)0x10\r
-#define DEM_TEST_FAILED_SINCE_LAST_CLEAR (Dem_EventStatusExtendedType)0x20\r
-#define DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE (Dem_EventStatusExtendedType)0x40\r
-#define DEM_WARNING_INDICATOR_REQUESTED (Dem_EventStatusExtendedType)0x80\r
-\r
-/*\r
- * DemOperationCycleType\r
- */\r
-typedef uint8 Dem_OperationCycleIdType; // TODO: Check type and values\r
-enum {\r
- DEM_ACTIVE, // Started by DEM on Dem_PreInit and stopped on Dem_Shutdown\r
-\r
- DEM_POWER, // Power ON/OFF Cycle\r
- DEM_IGNITION, // Ignition ON/OF Cycle\r
- DEM_WARMUP, // OBD Warm up Cycle\r
- DEM_OBD_DCY, // OBD Driving Cycle\r
-\r
- DEM_OPERATION_CYCLE_ID_ENDMARK\r
-}; /** @req DEM142 */\r
-\r
-/*\r
- * Dem_OperationCycleStateType\r
- */\r
-typedef uint8 Dem_OperationCycleStateType;\r
-#define DEM_CYCLE_STATE_START (Dem_OperationCycleStateType)1\r
-#define DEM_CYCLE_STATE_END (Dem_OperationCycleStateType)2\r
-\r
/*\r
* Dem_FreezeFrameKindType\r
*/\r
#define DEM_EVENT_STATUS_PREPASSED (Dem_EventStatusType)2\r
#define DEM_EVENT_STATUS_PREFAILED (Dem_EventStatusType)3\r
\r
-/*\r
- * Dem_DTCType\r
- */\r
-typedef uint32 Dem_DTCType;\r
-\r
-/*\r
- * Dem_InitMonitorKindType\r
- */\r
-typedef uint8 Dem_InitMonitorKindType;\r
-#define DEM_INIT_MONITOR_CLEAR (Dem_InitMonitorKindType)1\r
-#define DEM_INIT_MONITOR_RESTART (Dem_InitMonitorKindType)2\r
-\r
-/*\r
- * Dem_IndicatorStatusType\r
- */\r
-typedef uint8 Dem_IndicatorStatusType;\r
-#define DEM_INDICATOR_OFF (Dem_IndicatorStatusType)0\r
-#define DEM_INDICATOR_CONTINUOUS (Dem_IndicatorStatusType)1\r
-#define DEM_INDICATOR_BLINKING (Dem_IndicatorStatusType)2\r
-#define DEM_INDICATOR_BLINK_CONT (Dem_IndicatorStatusType)3\r
-\r
-/*\r
- * Dem_FaultDetectionCpunterType\r
- */\r
-typedef sint8 Dem_FaultDetectionCounterType;\r
-\r
/*\r
* Dem_PreDebounceNameType\r
*/\r
#define DEM_GET_SEVERITYOFDTC_NOSEVERITY (Dem_ReturnGetSeverityOfDTCType)0x03\r
\r
\r
+/*******************************************************\r
+ * Definitions where the type is declared in Rte_Dem.h *
+ *******************************************************/\r
+/*\r
+ * DemEventStatusExtendedType definitions\r
+ */\r
+#define DEM_TEST_FAILED (Dem_EventStatusExtendedType)0x01\r
+#define DEM_TEST_FAILED_THIS_OPERATION_CYCLE (Dem_EventStatusExtendedType)0x02\r
+#define DEM_PENDING_DTC (Dem_EventStatusExtendedType)0x04\r
+#define DEM_CONFIRMED_DTC (Dem_EventStatusExtendedType)0x08\r
+#define DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR (Dem_EventStatusExtendedType)0x10\r
+#define DEM_TEST_FAILED_SINCE_LAST_CLEAR (Dem_EventStatusExtendedType)0x20\r
+#define DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE (Dem_EventStatusExtendedType)0x40\r
+#define DEM_WARNING_INDICATOR_REQUESTED (Dem_EventStatusExtendedType)0x80\r
+\r
+/*\r
+ * DemDTCKindType definitions\r
+ */\r
+#define DEM_DTC_KIND_ALL_DTCS (Dem_DTCKindType)0x01\r
+#define DEM_DTC_KIND_EMISSION_REL_DTCS (Dem_DTCKindType)0x02\r
+\r
+/*\r
+ * Dem_InitMonitorKindType definitions\r
+ */\r
+#define DEM_INIT_MONITOR_CLEAR (Dem_InitMonitorKindType)1\r
+#define DEM_INIT_MONITOR_RESTART (Dem_InitMonitorKindType)2\r
+\r
+\r
+/*\r
+ * Dem_IndicatorStatusType definitions\r
+ */\r
+#define DEM_INDICATOR_OFF (Dem_IndicatorStatusType)0\r
+#define DEM_INDICATOR_CONTINUOUS (Dem_IndicatorStatusType)1\r
+#define DEM_INDICATOR_BLINKING (Dem_IndicatorStatusType)2\r
+#define DEM_INDICATOR_BLINK_CONT (Dem_IndicatorStatusType)3\r
+\r
+/*\r
+ * DemOperationCycleType definitions\r
+ */\r
+enum {\r
+ DEM_ACTIVE, // Started by DEM on Dem_PreInit and stopped on Dem_Shutdown\r
+\r
+ DEM_POWER, // Power ON/OFF Cycle\r
+ DEM_IGNITION, // Ignition ON/OF Cycle\r
+ DEM_WARMUP, // OBD Warm up Cycle\r
+ DEM_OBD_DCY, // OBD Driving Cycle\r
+\r
+ DEM_OPERATION_CYCLE_ID_ENDMARK\r
+}; /** @req DEM142 */\r
+\r
+/*\r
+ * Dem_OperationCycleStateType definitions\r
+ */\r
+#define DEM_CYCLE_STATE_START (Dem_OperationCycleStateType)1\r
+#define DEM_CYCLE_STATE_END (Dem_OperationCycleStateType)2\r
+\r
+\r
\r
#endif /*DEM_TYPES_H_*/\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef RTE_DEM_H_\r
+#define RTE_DEM_H_\r
+\r
+typedef uint8 Dem_DTCKindType;\r
+typedef uint32 Dem_DTCType;\r
+typedef uint16 Dem_EventIdType;\r
+typedef uint8 Dem_EventStatusExtendedType;\r
+typedef sint8 Dem_FaultDetectionCounterType;\r
+typedef uint8 Dem_IndicatorStatusType;\r
+typedef uint8 Dem_InitMonitorKindType;\r
+typedef uint8 Dem_OperationCycleIdType;\r
+typedef uint8 Dem_OperationCycleStateType;\r
+\r
+#endif /* RTE_DEM_H_ */\r
#include "Mcu.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#define USE_TRACE 1\r
-#include "debug.h"\r
-\r
-\r
-#if 0\r
-#ifdef USE_STARTUPHOOK\r
-#ifdef CFG_MPC55XX\r
-#if !defined(USE_SIMULATOR)\r
-// Quick fix\r
-//#include "kernel_offset.h"\r
\r
-extern uint8_t pcb_list[];\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
\r
-#endif\r
-#endif\r
-#endif\r
-#endif\r
\r
\r
\r
void StartupHook( void ) {\r
LDEBUG_PRINTF("## StartupHook\n");\r
\r
-// uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
}\r
// LDEBUG_PRINTF("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL\r
\r
#elif defined(CFG_BRD_STM32_STM3210C)\r
-#define LED_CHANNEL LED_CHANNEL3\r
+#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL4\r
\r
#elif defined(CFG_BRD_STM32_MCBSTM32)\r
-#define LED_CHANNEL LED_CHANNEL1\r
+#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL1\r
\r
#else\r
#warning "Unknown board or CFG_BRD_* undefined"\r
\r
#include "EcuM.h"\r
#include "blinker_main.h"\r
+\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
\r
<?xml version="1.0" encoding="UTF-8"?>\r
<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
<AR-PACKAGE>\r
- <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <SHORT-NAME>blinker_node_arm_stm32_f103</SHORT-NAME>\r
<ELEMENTS>\r
- <ECU-CONFIGURATION UUID="7cf102d9-f929-4b4a-97b6-4ef11256183a">\r
- <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <ECU-CONFIGURATION UUID="69a3e35e-1874-432a-94f0-b3c74c805be3">\r
+ <SHORT-NAME>blinker_node_arm_stm32_f103</SHORT-NAME>\r
<ADMIN-DATA>\r
<DOC-REVISIONS>\r
<DOC-REVISION/>\r
<SDGS>\r
<SDG GID="Arccore::EcuOptions">\r
<SD GID="MCU">STM32_F103</SD>\r
- <SD GID="GENDIR">/blinker/config/stm32_stm3210c</SD>\r
+ <SD GID="GENDIR"></SD>\r
</SDG>\r
</SDGS>\r
</ADMIN-DATA>\r
- <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_arm_cm3/SwComposition_blinker_node_arm_cm3</ECU-SW-COMPOSITION-REF>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_arm_stm32_f103/SwComposition_blinker_node_arm_stm32_f103</ECU-SW-COMPOSITION-REF>\r
<MODULE-REFS>\r
- <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/EcuM</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Dio</MODULE-REF>\r
</MODULE-REFS>\r
</ECU-CONFIGURATION>\r
- <ECU-SW-COMPOSITION UUID="bf0ee133-5ed1-418a-b260-47e171242afc">\r
- <SHORT-NAME>SwComposition_blinker_node_arm_cm3</SHORT-NAME>\r
+ <ECU-SW-COMPOSITION UUID="ed185637-4f36-4989-8584-9aade6ae3578">\r
+ <SHORT-NAME>SwComposition_blinker_node_arm_stm32_f103</SHORT-NAME>\r
</ECU-SW-COMPOSITION>\r
- <MODULE-CONFIGURATION UUID="4fe46a12-0672-428f-99e3-c4ca6570a776">\r
+ <MODULE-CONFIGURATION UUID="8f496cdc-208c-4918-a887-88c86b069602">\r
<SHORT-NAME>Os</SHORT-NAME>\r
<ADMIN-DATA>\r
<SDGS>\r
<SDG/>\r
<SDG GID="Arccore::ModuleOptions">\r
<SD GID="GENERATE_AND_VALIDATE">true</SD>\r
- <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.11</SD>\r
</SDG>\r
</SDGS>\r
</ADMIN-DATA>\r
<DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
<CONTAINERS>\r
- <CONTAINER UUID="80853be9-55dc-435f-95ed-9a1c90750299">\r
+ <CONTAINER UUID="b55a25dd-282a-4102-bbb9-eaefcd782dad">\r
<SHORT-NAME>OsOS</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</INTEGER-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
- <VALUE>true</VALUE>\r
+ <VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
- <VALUE>true</VALUE>\r
+ <VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
- <VALUE>true</VALUE>\r
+ <VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
- <VALUE>true</VALUE>\r
+ <VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
- <VALUE>true</VALUE>\r
+ <VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
- <VALUE>true</VALUE>\r
+ <VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
</PARAMETER-VALUES>\r
<SUB-CONTAINERS>\r
- <CONTAINER UUID="7f1dfe11-aeff-4131-89a9-2fbe9a87f01f">\r
+ <CONTAINER UUID="62701b7c-02ab-4bd2-b5df-cf959638d61b">\r
<SHORT-NAME>OsHooks</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</CONTAINER>\r
</SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="77224460-9071-4c32-9ba5-5ee19d0a5be2">\r
+ <CONTAINER UUID="b37874ef-0d10-4fdf-beee-b9470e0e7751">\r
<SHORT-NAME>alarm25</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
<REFERENCE-VALUES>\r
<REFERENCE-VALUE>\r
<DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/OsTick</VALUE-REF>\r
</REFERENCE-VALUE>\r
</REFERENCE-VALUES>\r
<SUB-CONTAINERS>\r
- <CONTAINER UUID="28398b0a-02ef-4aa0-9f06-90c0683ad934">\r
+ <CONTAINER UUID="7f57c907-292e-4b2b-8d2d-0eb706bea759">\r
<SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
<REFERENCE-VALUES>\r
<REFERENCE-VALUE>\r
<DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask25</VALUE-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/bTask25</VALUE-REF>\r
</REFERENCE-VALUE>\r
</REFERENCE-VALUES>\r
</CONTAINER>\r
</SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="b4e4c707-af7c-4d9f-a156-1507283b4ebe">\r
- <SHORT-NAME>OsTick</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
- <PARAMETER-VALUES>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
- <VALUE>65535</VALUE>\r
- </INTEGER-VALUE>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
- <VALUE>0</VALUE>\r
- </INTEGER-VALUE>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
- <VALUE>0</VALUE>\r
- </INTEGER-VALUE>\r
- <ENUMERATION-VALUE>\r
- <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
- <VALUE>OS_TICK</VALUE>\r
- </ENUMERATION-VALUE>\r
- </PARAMETER-VALUES>\r
+ <CONTAINER UUID="e84dd780-f9e1-4915-878c-6ea573729f55">\r
+ <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="40d56a04-b12e-4f25-ab64-97f7554de5b4">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/bTask10</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="44a8dc3f-2e97-4bb7-8139-57852146269a">\r
+ <CONTAINER UUID="b2cb6a6b-de7c-49d1-b7e6-b7f32b0bc17d">\r
+ <SHORT-NAME>alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="1cf5902c-ac5d-481d-8ccd-e478b17c3600">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bc300672-c9c6-4205-9a6b-75644c209d9f">\r
<SHORT-NAME>bTask25</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</ENUMERATION-VALUE>\r
</PARAMETER-VALUES>\r
</CONTAINER>\r
- <CONTAINER UUID="f9e78da1-ee81-40a0-940b-3e04d9e9034c">\r
+ <CONTAINER UUID="e3670d78-76a0-44ad-b866-5525102487b3">\r
<SHORT-NAME>bTask100</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</ENUMERATION-VALUE>\r
</PARAMETER-VALUES>\r
</CONTAINER>\r
- <CONTAINER UUID="157c6a3d-f8ad-4493-9d76-a8f9411066aa">\r
+ <CONTAINER UUID="66861439-4bab-4028-84f6-6aa0e0a14801">\r
<SHORT-NAME>bTask10</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</ENUMERATION-VALUE>\r
</PARAMETER-VALUES>\r
</CONTAINER>\r
- <CONTAINER UUID="ace8439e-ddb7-4bd7-b9e5-643a759f3e55">\r
+ <CONTAINER UUID="b2267099-a58d-4cf4-bbd2-8cecb183ffff">\r
<SHORT-NAME>Startup</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</ENUMERATION-VALUE>\r
</PARAMETER-VALUES>\r
<SUB-CONTAINERS>\r
- <CONTAINER UUID="40214336-c4be-4506-8ccc-75ff014f39fe">\r
+ <CONTAINER UUID="a99bc5f6-9f52-426f-9074-dac15640d987">\r
<SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
</CONTAINER>\r
</SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="08cf618f-ebe2-483c-8ba5-fde04f3c6160">\r
- <SHORT-NAME>alarm10</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
- <REFERENCE-VALUES>\r
- <REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
- </REFERENCE-VALUE>\r
- </REFERENCE-VALUES>\r
+ <CONTAINER UUID="1fc9bdf6-e4e3-409c-b2ee-e752afe3ae3c">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="c2206df0-859a-40cf-961b-cbf0bcb9afc4">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Mcu</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="9bbdadc7-5326-4e47-bbfa-1f719ea7dab3">\r
+ <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuGeneralConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7d908051-b111-4abe-b843-ad5d86729cc0">\r
+ <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuNumberOfMcuModes</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
<SUB-CONTAINERS>\r
- <CONTAINER UUID="8a235c19-4b95-4bf1-a309-f15916dd2d8d">\r
- <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <CONTAINER UUID="65b01764-a1c8-46bf-b49b-6e191f048f7b">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>DMA1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>TIM2</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>CAN1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>ADC1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOA</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOB</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>AFIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
<REFERENCE-VALUES>\r
<REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask10</VALUE-REF>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Mcu/McuModuleConfiguration/McuClockSettingConfig/EXT_REF_8MHZ</VALUE-REF>\r
</REFERENCE-VALUE>\r
</REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="592199d2-9908-4ab1-851e-adc0ac39ffff">\r
+ <SHORT-NAME>EXT_REF_8MHZ</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>8000000.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>9</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="be21cf3d-04ca-4ed7-b915-78c9283f76f6">\r
+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
</CONTAINER>\r
</SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="0f791241-110b-4cac-9e54-b41ad56c7f05">\r
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- <REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
- </REFERENCE-VALUE>\r
- </REFERENCE-VALUES>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="3ad3c9fc-393d-4e03-a72b-d1e495de9a03">\r
+ <SHORT-NAME>Det</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Det</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="68b36355-7a5c-46df-b90d-d90a9fa6736c">\r
+ <SHORT-NAME>DetGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Det/DetGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetEnableCallbacks</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetWrapRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseStdErr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetDeInitAPI</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetNumberOfCallbacks</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetRamlogSize</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="ad852475-2ec5-4387-81af-5e4359917e93">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="879e39e2-1aa6-46b4-ad3f-eecb914418ff">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="941d2f53-211b-4632-8330-ff852241d7b4">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="844e035f-1dfa-4d9f-8c62-acc0776e6404">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="80ead9b7-27be-44e2-bc05-934fb847390a">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
<SUB-CONTAINERS>\r
- <CONTAINER UUID="3eb17f20-d68e-4d62-87e3-6775933e93a2">\r
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- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask100</VALUE-REF>\r
- </REFERENCE-VALUE>\r
- </REFERENCE-VALUES>\r
+ <CONTAINER UUID="6d709b59-04d0-44df-a3e7-65da753b1974">\r
+ <SHORT-NAME>PortContainer_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="1233fe37-e919-4b9a-9c10-89bdbcaeca81">\r
+ <SHORT-NAME>B13</SHORT-NAME>\r
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+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
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+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>29</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
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+ </CONTAINER>\r
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+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>30</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
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+ <CONTAINER UUID="f25b824a-e61e-4f91-ac6a-9dc8379dc97e">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortGeneral/ArcGpioRemap</DEFINITION-REF>\r
+ <VALUE>Remap1_CAN1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortGeneral/ArcGpioRemap</DEFINITION-REF>\r
+ <VALUE>PartialRemap2_TIM2</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="98039516-0a14-4137-946a-1a1797bbc961">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="42abff38-b3e4-488c-a50d-c27e7710d8e0">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="2b6f247f-98ce-4501-b07f-f3b5374a003a">\r
+ <SHORT-NAME>LED_PORT</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>B</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9c7caeea-c077-409b-b7be-f18b3d949cd0">\r
+ <SHORT-NAME>LED_CHANNEL1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>29</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="469ceef0-ab55-4ec9-8884-bd9a6faf333d">\r
+ <SHORT-NAME>LED_CHANNEL2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>30</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
</CONTAINER>\r
</SUB-CONTAINERS>\r
</CONTAINER>\r
<SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
<ELEMENTS>\r
<ECU-CONFIGURATION UUID="7cf102d9-f929-4b4a-97b6-4ef11256183a">\r
- <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <SHORT-NAME>blinker_node_arm_cm3_107</SHORT-NAME>\r
<ADMIN-DATA>\r
<DOC-REVISIONS>\r
<DOC-REVISION/>\r
<ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_arm_cm3/SwComposition_blinker_node_arm_cm3</ECU-SW-COMPOSITION-REF>\r
<MODULE-REFS>\r
<MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Dio</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/EcuM</MODULE-REF>\r
</MODULE-REFS>\r
</ECU-CONFIGURATION>\r
<ECU-SW-COMPOSITION UUID="bf0ee133-5ed1-418a-b260-47e171242afc">\r
</CONTAINER>\r
</CONTAINERS>\r
</MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="41ed7b6e-ff53-4509-a2d1-943d8261e36d">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="5142b895-319c-4954-9e68-c65926b1bde9">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bcdf538c-c632-43f4-b5cd-044bae94bb81">\r
+ <SHORT-NAME>LED_PORT</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>D</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="749d0ffd-c994-41a1-b4c7-80400cde05ca">\r
+ <SHORT-NAME>LED_CHANNEL1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>55</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="44f582a3-7fd9-4d79-b41a-08ab68858e7e">\r
+ <SHORT-NAME>LED_CHANNEL2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>61</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="3e6df5d3-a0f1-4e27-8562-36d2c6d01795">\r
+ <SHORT-NAME>LED_CHANNEL3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>51</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7cbdc7b8-c938-4e5b-a84f-e4c4f1f2d705">\r
+ <SHORT-NAME>LED_CHANNEL4</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="c4495147-c1ed-4a19-b1e3-ab23d11e7bcf">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="2ba230a3-f785-4514-a224-7269f37bd048">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="2d1aee91-6d16-4a68-a045-4b35ad52966e">\r
+ <SHORT-NAME>PortContainer_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="be66b280-6ace-4b1f-b8a3-a923d64569b5">\r
+ <SHORT-NAME>D3_LED3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>51</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="eb64422e-85c5-4fec-964d-5916a807f1fe">\r
+ <SHORT-NAME>D4_LED4</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a99a1b7e-6ffa-474b-91d6-1324e60d8c7f">\r
+ <SHORT-NAME>D7_LED1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>55</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c430af31-68b9-4780-8dc2-d9f09edde143">\r
+ <SHORT-NAME>D13_LED2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>61</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0ffde529-3c0f-49eb-88af-da644cb60e3e">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortGeneral/ArcGpioRemap</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="e0b9bc68-bd05-4ae1-9ae1-7a46fc6a3f86">\r
+ <SHORT-NAME>Det</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Det</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="42d6bd8a-d355-4e0c-be5b-02cfb3a0e8e0">\r
+ <SHORT-NAME>DetGeneral</SHORT-NAME>\r
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+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetEnableCallbacks</DEFINITION-REF>\r
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+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetWrapRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseStdErr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetDeInitAPI</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetNumberOfCallbacks</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetRamlogSize</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
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+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="456a6a95-5836-473d-95e1-599a735500a0">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
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+ <CONTAINER UUID="b45ffd68-b2b9-4874-9de0-5f1faae58415">\r
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+ <BOOLEAN-VALUE>\r
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+ <VALUE>true</VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
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+ <VALUE>true</VALUE>\r
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+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
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+ <VALUE>0</VALUE>\r
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+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="5b150cab-d2e9-426f-b365-9ae189671851">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>DMA1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>ETH_MAC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>ETH_MAC_Tx</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>ETH_MAC_Rx</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>TIM2</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>CAN1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>ADC1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOA</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOB</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOD</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>AFIO</VALUE>\r
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+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Mcu/McuModuleConfiguration/McuClockSettingConfig/EXT_REF_25MHZ</VALUE-REF>\r
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+ <CONTAINER UUID="08023f7f-13d4-4ccf-902a-d0e86ccc4443">\r
+ <SHORT-NAME>EXT_REF_25MHZ</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>2.5E7</VALUE>\r
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+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>9</VALUE>\r
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+ <VALUE>8</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
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+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
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+ </MODULE-CONFIGURATION>\r
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+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
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+ <CONTAINERS>\r
+ <CONTAINER UUID="32e03636-768e-40a9-9de6-e94ef943afdc">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
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+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bf51604d-cca9-49b6-90da-535a5b1b5ff4">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
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+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
</ELEMENTS>\r
</AR-PACKAGE>\r
</TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>blinker_node_mpc5516</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="fafd2115-4e79-4839-9b0e-02ee81d3ce31">\r
+ <SHORT-NAME>blinker_node_mpc5516</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC551x</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_mpc5516/SwComposition_blinker_node_mpc5516</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Dio</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/EcuM</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="84813c46-449a-4458-b10e-ff0fd142f7e6">\r
+ <SHORT-NAME>SwComposition_blinker_node_mpc5516</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="20701c30-27ef-4b41-af75-c192b6351cce">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.11</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="7dd96d0a-3e66-4dce-b470-1be14ff71e57">\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
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+ <VALUE>true</VALUE>\r
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+ <VALUE>1000</VALUE>\r
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+ <VALUE>2048</VALUE>\r
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+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
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+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ <CONTAINER UUID="10d0dd34-3ee5-42b4-ac69-0a7fd2d57c8d">\r
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+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
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+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_DIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c3d466db-9737-425a-a299-a7c781b4b172">\r
+ <SHORT-NAME>PD[5]</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>53</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_DIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8d698577-d736-4761-a645-99c113994342">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="bae978ad-fefb-42c3-95aa-c63822629f46">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="ada3bc9a-8e9f-4ca9-96f7-885424b3b2e8">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7ac5acc6-3fab-41f5-93b1-0852b893b5c2">\r
+ <SHORT-NAME>LED_PORT</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>DIO_PORT_D</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="aa03e900-b874-439e-89fe-ec0acdc9fb77">\r
+ <SHORT-NAME>LEDS_LED4</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d31260a8-ad8e-4af9-82b4-225107392aca">\r
+ <SHORT-NAME>LEDS_LED5</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>53</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="198876eb-33cf-4cbf-a37c-06d8a9670fe9">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="576fbc52-a01f-44d3-9519-8e4116800610">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="fa5bd3d6-0951-43a5-8529-7140d9689037">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>blinker_node_mpc5567</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="f2333a5b-cda0-4ee4-8f4f-113e8e15a04c">\r
+ <SHORT-NAME>blinker_node_mpc5567</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC5567</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_mpc5567/SwComposition_blinker_node_mpc5567</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/EcuM</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Dio</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="2344f354-89d5-4ed5-bdc4-328cf0ee0c6b">\r
+ <SHORT-NAME>SwComposition_blinker_node_mpc5567</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="45cc3b0a-a0c2-4368-8950-4fd43999d34d">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="85776455-d0ad-42aa-943b-eaf5370c764a">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="3b9e5e09-7789-4dd0-80f9-8336f61037b2">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="299edb5c-e9bb-4cb7-99f2-96078c8ef889">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c5956a55-cb41-4643-ac03-c9bec22d3c18">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="dafa1a5c-d8c0-4eec-a2b5-9cd2712b0047">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
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+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="70ab573d-bc1a-419a-8c53-86d9da6d2405">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">false</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="0b40745e-f0ce-4aee-9499-b05e16e2241f">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="ba82bde5-69dc-4c1d-8fc0-2539f1e7e105">\r
+ <SHORT-NAME>DioPort_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>DIO_MPC5567_GENERIC_PORT</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="19f14a77-d8e8-40cb-99dd-6b6e751b916a">\r
+ <SHORT-NAME>LED_K2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>125</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ DIO_PORT_A = 0,\r
+ DIO_PORT_B = 1,\r
+ DIO_PORT_C = 2,\r
+ DIO_PORT_D = 3,\r
+ DIO_PORT_E = 4,\r
+ DIO_PORT_F = 5,\r
+ DIO_PORT_G = 6,\r
+ DIO_PORT_H = 7,\r
+ DIO_PORT_I = 8,\r
+ DIO_PORT_J = 9,\r
+ DIO_PORT_K = 10,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LEDS_LED4 52\r
+#define DIO_CHANNEL_NAME_LEDS_LED5 53\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (DIO_PORT_D)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LEDS_LED4,\r
+ DIO_CHANNEL_NAME_LEDS_LED5,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_LED_PORT, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += MCU PORT DIO \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 11:07:49 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 11:07:49 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_ON\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 11:07:49 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 8000000UL,\r
+ .Pll1 = 1,\r
+ .Pll2 = 104,\r
+ .Pll3 = 5,\r
+ },\r
+ {\r
+ .McuClockReferencePointFrequency = 16000000UL,\r
+ .Pll1 = 3,\r
+ .Pll2 = 83,\r
+ .Pll3 = 5,\r
+ },\r
+};\r
+\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 2,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_ON \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_80MHZ = 0,\r
+ MCU_CLOCKTYPE_EXT_REF_66MHZ = 1,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
/*\r
* Configuration of module Os (Os_Cfg.c)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Jan 17 11:27:21 CET 2011\r
+ * on Wed Jan 26 12:40:30 CET 2011\r
*/\r
\r
\r
/*\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Jan 17 11:27:21 CET 2011\r
+ * on Wed Jan 26 12:40:30 CET 2011\r
*/\r
\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+ \r
+// File generated on Wed Jan 26 12:40:30 CET 2011\r
+// File generated by com.arccore.bswbuilder.modules.port.mpc5516\r
+\r
+#include "Port.h"\r
+#include "Port_Cfg.h"\r
+#include <stdlib.h>\r
+\r
+const uint16_t PortPadConfigData[] = {\r
+ PORT_PCR_RESET, /* PCR 0 */\r
+ PORT_PCR_RESET, /* PCR 1 */\r
+ PORT_PCR_RESET, /* PCR 2 */\r
+ PORT_PCR_RESET, /* PCR 3 */\r
+ PORT_PCR_RESET, /* PCR 4 */\r
+ PORT_PCR_RESET, /* PCR 5 */\r
+ PORT_PCR_RESET, /* PCR 6 */\r
+ PORT_PCR_RESET, /* PCR 7 */\r
+ PORT_PCR_RESET, /* PCR 8 */\r
+ PORT_PCR_RESET, /* PCR 9 */\r
+ PORT_PCR_RESET, /* PCR 10 */\r
+ PORT_PCR_RESET, /* PCR 11 */\r
+ PORT_PCR_RESET, /* PCR 12 */\r
+ PORT_PCR_RESET, /* PCR 13 */\r
+ PORT_PCR_RESET, /* PCR 14 */\r
+ PORT_PCR_RESET, /* PCR 15 */\r
+ PORT_PCR_RESET, /* PCR 16 */\r
+ PORT_PCR_RESET, /* PCR 17 */\r
+ PORT_PCR_RESET, /* PCR 18 */\r
+ PORT_PCR_RESET, /* PCR 19 */\r
+ PORT_PCR_RESET, /* PCR 20 */\r
+ PORT_PCR_RESET, /* PCR 21 */\r
+ PORT_PCR_RESET, /* PCR 22 */\r
+ PORT_PCR_RESET, /* PCR 23 */\r
+ PORT_PCR_RESET, /* PCR 24 */\r
+ PORT_PCR_RESET, /* PCR 25 */\r
+ PORT_PCR_RESET, /* PCR 26 */\r
+ PORT_PCR_RESET, /* PCR 27 */\r
+ PORT_PCR_RESET, /* PCR 28 */\r
+ PORT_PCR_RESET, /* PCR 29 */\r
+ PORT_PCR_RESET, /* PCR 30 */\r
+ PORT_PCR_RESET, /* PCR 31 */\r
+ PORT_PCR_RESET, /* PCR 32 */\r
+ PORT_PCR_RESET, /* PCR 33 */\r
+ PORT_PCR_RESET, /* PCR 34 */\r
+ PORT_PCR_RESET, /* PCR 35 */\r
+ PORT_PCR_RESET, /* PCR 36 */\r
+ PORT_PCR_RESET, /* PCR 37 */\r
+ PORT_PCR_RESET, /* PCR 38 */\r
+ PORT_PCR_RESET, /* PCR 39 */\r
+ PORT_PCR_RESET, /* PCR 40 */\r
+ PORT_PCR_RESET, /* PCR 41 */\r
+ PORT_PCR_RESET, /* PCR 42 */\r
+ PORT_PCR_RESET, /* PCR 43 */\r
+ PORT_PCR_RESET, /* PCR 44 */\r
+ PORT_PCR_RESET, /* PCR 45 */\r
+ PORT_PCR_RESET, /* PCR 46 */\r
+ PORT_PCR_RESET, /* PCR 47 */\r
+ PORT_PCR_RESET, /* PCR 48 */\r
+ PORT_PCR_RESET, /* PCR 49 */\r
+ PORT_PCR_RESET, /* PCR 50 */\r
+ PORT_PCR_RESET, /* PCR 51 */\r
+ ( PORT_FUNC0 | PORT_OBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE ), /* PCR 52 : PORT_PIN_MODE_DIO */\r
+ ( PORT_FUNC0 | PORT_OBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE ), /* PCR 53 : PORT_PIN_MODE_DIO */\r
+ PORT_PCR_RESET, /* PCR 54 */\r
+ PORT_PCR_RESET, /* PCR 55 */\r
+ PORT_PCR_RESET, /* PCR 56 */\r
+ PORT_PCR_RESET, /* PCR 57 */\r
+ PORT_PCR_RESET, /* PCR 58 */\r
+ PORT_PCR_RESET, /* PCR 59 */\r
+ PORT_PCR_RESET, /* PCR 60 */\r
+ PORT_PCR_RESET, /* PCR 61 */\r
+ PORT_PCR_RESET, /* PCR 62 */\r
+ PORT_PCR_RESET, /* PCR 63 */\r
+ PORT_PCR_RESET, /* PCR 64 */\r
+ PORT_PCR_RESET, /* PCR 65 */\r
+ PORT_PCR_RESET, /* PCR 66 */\r
+ PORT_PCR_RESET, /* PCR 67 */\r
+ PORT_PCR_RESET, /* PCR 68 */\r
+ PORT_PCR_RESET, /* PCR 69 */\r
+ PORT_PCR_RESET, /* PCR 70 */\r
+ PORT_PCR_RESET, /* PCR 71 */\r
+ PORT_PCR_RESET, /* PCR 72 */\r
+ PORT_PCR_RESET, /* PCR 73 */\r
+ PORT_PCR_RESET, /* PCR 74 */\r
+ PORT_PCR_RESET, /* PCR 75 */\r
+ PORT_PCR_RESET, /* PCR 76 */\r
+ PORT_PCR_RESET, /* PCR 77 */\r
+ PORT_PCR_RESET, /* PCR 78 */\r
+ PORT_PCR_RESET, /* PCR 79 */\r
+ PORT_PCR_RESET, /* PCR 80 */\r
+ PORT_PCR_RESET, /* PCR 81 */\r
+ PORT_PCR_RESET, /* PCR 82 */\r
+ PORT_PCR_RESET, /* PCR 83 */\r
+ PORT_PCR_RESET, /* PCR 84 */\r
+ PORT_PCR_RESET, /* PCR 85 */\r
+ PORT_PCR_RESET, /* PCR 86 */\r
+ PORT_PCR_RESET, /* PCR 87 */\r
+ PORT_PCR_RESET, /* PCR 88 */\r
+ PORT_PCR_RESET, /* PCR 89 */\r
+ PORT_PCR_RESET, /* PCR 90 */\r
+ PORT_PCR_RESET, /* PCR 91 */\r
+ PORT_PCR_RESET, /* PCR 92 */\r
+ PORT_PCR_RESET, /* PCR 93 */\r
+ PORT_PCR_RESET, /* PCR 94 */\r
+ PORT_PCR_RESET, /* PCR 95 */\r
+ PORT_PCR_RESET, /* PCR 96 */\r
+ PORT_PCR_RESET, /* PCR 97 */\r
+ PORT_PCR_RESET, /* PCR 98 */\r
+ PORT_PCR_RESET, /* PCR 99 */\r
+ PORT_PCR_RESET, /* PCR 100 */\r
+ PORT_PCR_RESET, /* PCR 101 */\r
+ PORT_PCR_RESET, /* PCR 102 */\r
+ PORT_PCR_RESET, /* PCR 103 */\r
+ PORT_PCR_RESET, /* PCR 104 */\r
+ PORT_PCR_RESET, /* PCR 105 */\r
+ PORT_PCR_RESET, /* PCR 106 */\r
+ PORT_PCR_RESET, /* PCR 107 */\r
+ PORT_PCR_RESET, /* PCR 108 */\r
+ PORT_PCR_RESET, /* PCR 109 */\r
+ PORT_PCR_RESET, /* PCR 110 */\r
+ PORT_PCR_RESET, /* PCR 111 */\r
+ PORT_PCR_RESET, /* PCR 112 */\r
+ PORT_PCR_RESET, /* PCR 113 */\r
+ PORT_PCR_RESET, /* PCR 114 */\r
+ PORT_PCR_RESET, /* PCR 115 */\r
+ PORT_PCR_RESET, /* PCR 116 */\r
+ PORT_PCR_RESET, /* PCR 117 */\r
+ PORT_PCR_RESET, /* PCR 118 */\r
+ PORT_PCR_RESET, /* PCR 119 */\r
+ PORT_PCR_RESET, /* PCR 120 */\r
+ PORT_PCR_RESET, /* PCR 121 */\r
+ PORT_PCR_RESET, /* PCR 122 */\r
+ PORT_PCR_RESET, /* PCR 123 */\r
+ PORT_PCR_RESET, /* PCR 124 */\r
+ PORT_PCR_RESET, /* PCR 125 */\r
+ PORT_PCR_RESET, /* PCR 126 */\r
+ PORT_PCR_RESET, /* PCR 127 */\r
+ PORT_PCR_RESET, /* PCR 128 */\r
+ PORT_PCR_RESET, /* PCR 129 */\r
+ PORT_PCR_RESET, /* PCR 130 */\r
+ PORT_PCR_RESET, /* PCR 131 */\r
+ PORT_PCR_RESET, /* PCR 132 */\r
+ PORT_PCR_RESET, /* PCR 133 */\r
+ PORT_PCR_RESET, /* PCR 134 */\r
+ PORT_PCR_RESET, /* PCR 135 */\r
+ PORT_PCR_RESET, /* PCR 136 */\r
+ PORT_PCR_RESET, /* PCR 137 */\r
+ PORT_PCR_RESET, /* PCR 138 */\r
+ PORT_PCR_RESET, /* PCR 139 */\r
+ PORT_PCR_RESET, /* PCR 140 */\r
+ PORT_PCR_RESET, /* PCR 141 */\r
+ PORT_PCR_RESET, /* PCR 142 */\r
+ PORT_PCR_RESET, /* PCR 143 */\r
+ PORT_PCR_RESET, /* PCR 144 */\r
+};\r
+\r
+const uint8_t PortOutConfigData[] = {\r
+ PORT_GPDO_RESET, /* GPDO 0 */\r
+ PORT_GPDO_RESET, /* GPDO 1 */\r
+ PORT_GPDO_RESET, /* GPDO 2 */\r
+ PORT_GPDO_RESET, /* GPDO 3 */\r
+ PORT_GPDO_RESET, /* GPDO 4 */\r
+ PORT_GPDO_RESET, /* GPDO 5 */\r
+ PORT_GPDO_RESET, /* GPDO 6 */\r
+ PORT_GPDO_RESET, /* GPDO 7 */\r
+ PORT_GPDO_RESET, /* GPDO 8 */\r
+ PORT_GPDO_RESET, /* GPDO 9 */\r
+ PORT_GPDO_RESET, /* GPDO 10 */\r
+ PORT_GPDO_RESET, /* GPDO 11 */\r
+ PORT_GPDO_RESET, /* GPDO 12 */\r
+ PORT_GPDO_RESET, /* GPDO 13 */\r
+ PORT_GPDO_RESET, /* GPDO 14 */\r
+ PORT_GPDO_RESET, /* GPDO 15 */\r
+ PORT_GPDO_RESET, /* GPDO 16 */\r
+ PORT_GPDO_RESET, /* GPDO 17 */\r
+ PORT_GPDO_RESET, /* GPDO 18 */\r
+ PORT_GPDO_RESET, /* GPDO 19 */\r
+ PORT_GPDO_RESET, /* GPDO 20 */\r
+ PORT_GPDO_RESET, /* GPDO 21 */\r
+ PORT_GPDO_RESET, /* GPDO 22 */\r
+ PORT_GPDO_RESET, /* GPDO 23 */\r
+ PORT_GPDO_RESET, /* GPDO 24 */\r
+ PORT_GPDO_RESET, /* GPDO 25 */\r
+ PORT_GPDO_RESET, /* GPDO 26 */\r
+ PORT_GPDO_RESET, /* GPDO 27 */\r
+ PORT_GPDO_RESET, /* GPDO 28 */\r
+ PORT_GPDO_RESET, /* GPDO 29 */\r
+ PORT_GPDO_RESET, /* GPDO 30 */\r
+ PORT_GPDO_RESET, /* GPDO 31 */\r
+ PORT_GPDO_RESET, /* GPDO 32 */\r
+ PORT_GPDO_RESET, /* GPDO 33 */\r
+ PORT_GPDO_RESET, /* GPDO 34 */\r
+ PORT_GPDO_RESET, /* GPDO 35 */\r
+ PORT_GPDO_RESET, /* GPDO 36 */\r
+ PORT_GPDO_RESET, /* GPDO 37 */\r
+ PORT_GPDO_RESET, /* GPDO 38 */\r
+ PORT_GPDO_RESET, /* GPDO 39 */\r
+ PORT_GPDO_RESET, /* GPDO 40 */\r
+ PORT_GPDO_RESET, /* GPDO 41 */\r
+ PORT_GPDO_RESET, /* GPDO 42 */\r
+ PORT_GPDO_RESET, /* GPDO 43 */\r
+ PORT_GPDO_RESET, /* GPDO 44 */\r
+ PORT_GPDO_RESET, /* GPDO 45 */\r
+ PORT_GPDO_RESET, /* GPDO 46 */\r
+ PORT_GPDO_RESET, /* GPDO 47 */\r
+ PORT_GPDO_RESET, /* GPDO 48 */\r
+ PORT_GPDO_RESET, /* GPDO 49 */\r
+ PORT_GPDO_RESET, /* GPDO 50 */\r
+ PORT_GPDO_RESET, /* GPDO 51 */\r
+ PORT_GPDO_RESET, /* GPDO 52 */\r
+ PORT_GPDO_RESET, /* GPDO 53 */\r
+ PORT_GPDO_RESET, /* GPDO 54 */\r
+ PORT_GPDO_RESET, /* GPDO 55 */\r
+ PORT_GPDO_RESET, /* GPDO 56 */\r
+ PORT_GPDO_RESET, /* GPDO 57 */\r
+ PORT_GPDO_RESET, /* GPDO 58 */\r
+ PORT_GPDO_RESET, /* GPDO 59 */\r
+ PORT_GPDO_RESET, /* GPDO 60 */\r
+ PORT_GPDO_RESET, /* GPDO 61 */\r
+ PORT_GPDO_RESET, /* GPDO 62 */\r
+ PORT_GPDO_RESET, /* GPDO 63 */\r
+ PORT_GPDO_RESET, /* GPDO 64 */\r
+ PORT_GPDO_RESET, /* GPDO 65 */\r
+ PORT_GPDO_RESET, /* GPDO 66 */\r
+ PORT_GPDO_RESET, /* GPDO 67 */\r
+ PORT_GPDO_RESET, /* GPDO 68 */\r
+ PORT_GPDO_RESET, /* GPDO 69 */\r
+ PORT_GPDO_RESET, /* GPDO 70 */\r
+ PORT_GPDO_RESET, /* GPDO 71 */\r
+ PORT_GPDO_RESET, /* GPDO 72 */\r
+ PORT_GPDO_RESET, /* GPDO 73 */\r
+ PORT_GPDO_RESET, /* GPDO 74 */\r
+ PORT_GPDO_RESET, /* GPDO 75 */\r
+ PORT_GPDO_RESET, /* GPDO 76 */\r
+ PORT_GPDO_RESET, /* GPDO 77 */\r
+ PORT_GPDO_RESET, /* GPDO 78 */\r
+ PORT_GPDO_RESET, /* GPDO 79 */\r
+ PORT_GPDO_RESET, /* GPDO 80 */\r
+ PORT_GPDO_RESET, /* GPDO 81 */\r
+ PORT_GPDO_RESET, /* GPDO 82 */\r
+ PORT_GPDO_RESET, /* GPDO 83 */\r
+ PORT_GPDO_RESET, /* GPDO 84 */\r
+ PORT_GPDO_RESET, /* GPDO 85 */\r
+ PORT_GPDO_RESET, /* GPDO 86 */\r
+ PORT_GPDO_RESET, /* GPDO 87 */\r
+ PORT_GPDO_RESET, /* GPDO 88 */\r
+ PORT_GPDO_RESET, /* GPDO 89 */\r
+ PORT_GPDO_RESET, /* GPDO 90 */\r
+ PORT_GPDO_RESET, /* GPDO 91 */\r
+ PORT_GPDO_RESET, /* GPDO 92 */\r
+ PORT_GPDO_RESET, /* GPDO 93 */\r
+ PORT_GPDO_RESET, /* GPDO 94 */\r
+ PORT_GPDO_RESET, /* GPDO 95 */\r
+ PORT_GPDO_RESET, /* GPDO 96 */\r
+ PORT_GPDO_RESET, /* GPDO 97 */\r
+ PORT_GPDO_RESET, /* GPDO 98 */\r
+ PORT_GPDO_RESET, /* GPDO 99 */\r
+ PORT_GPDO_RESET, /* GPDO 100 */\r
+ PORT_GPDO_RESET, /* GPDO 101 */\r
+ PORT_GPDO_RESET, /* GPDO 102 */\r
+ PORT_GPDO_RESET, /* GPDO 103 */\r
+ PORT_GPDO_RESET, /* GPDO 104 */\r
+ PORT_GPDO_RESET, /* GPDO 105 */\r
+ PORT_GPDO_RESET, /* GPDO 106 */\r
+ PORT_GPDO_RESET, /* GPDO 107 */\r
+ PORT_GPDO_RESET, /* GPDO 108 */\r
+ PORT_GPDO_RESET, /* GPDO 109 */\r
+ PORT_GPDO_RESET, /* GPDO 110 */\r
+ PORT_GPDO_RESET, /* GPDO 111 */\r
+ PORT_GPDO_RESET, /* GPDO 112 */\r
+ PORT_GPDO_RESET, /* GPDO 113 */\r
+ PORT_GPDO_RESET, /* GPDO 114 */\r
+ PORT_GPDO_RESET, /* GPDO 115 */\r
+ PORT_GPDO_RESET, /* GPDO 116 */\r
+ PORT_GPDO_RESET, /* GPDO 117 */\r
+ PORT_GPDO_RESET, /* GPDO 118 */\r
+ PORT_GPDO_RESET, /* GPDO 119 */\r
+ PORT_GPDO_RESET, /* GPDO 120 */\r
+ PORT_GPDO_RESET, /* GPDO 121 */\r
+ PORT_GPDO_RESET, /* GPDO 122 */\r
+ PORT_GPDO_RESET, /* GPDO 123 */\r
+ PORT_GPDO_RESET, /* GPDO 124 */\r
+ PORT_GPDO_RESET, /* GPDO 125 */\r
+ PORT_GPDO_RESET, /* GPDO 126 */\r
+ PORT_GPDO_RESET, /* GPDO 127 */\r
+ PORT_GPDO_RESET, /* GPDO 128 */\r
+ PORT_GPDO_RESET, /* GPDO 129 */\r
+ PORT_GPDO_RESET, /* GPDO 130 */\r
+ PORT_GPDO_RESET, /* GPDO 131 */\r
+ PORT_GPDO_RESET, /* GPDO 132 */\r
+ PORT_GPDO_RESET, /* GPDO 133 */\r
+ PORT_GPDO_RESET, /* GPDO 134 */\r
+ PORT_GPDO_RESET, /* GPDO 135 */\r
+ PORT_GPDO_RESET, /* GPDO 136 */\r
+ PORT_GPDO_RESET, /* GPDO 137 */\r
+ PORT_GPDO_RESET, /* GPDO 138 */\r
+ PORT_GPDO_RESET, /* GPDO 139 */\r
+ PORT_GPDO_RESET, /* GPDO 140 */\r
+ PORT_GPDO_RESET, /* GPDO 141 */\r
+ PORT_GPDO_RESET, /* GPDO 142 */\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = sizeof(PortPadConfigData),\r
+ .padConfig = PortPadConfigData,\r
+ .outCnt = sizeof(PortOutConfigData),\r
+ .outConfig = PortOutConfigData,\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+\r
+#define PORT_BIT0 (1<<15)\r
+#define PORT_BIT1 (1<<14)\r
+#define PORT_BIT2 (1<<13)\r
+#define PORT_BIT3 (1<<12)\r
+#define PORT_BIT4 (1<<11)\r
+#define PORT_BIT5 (1<<10)\r
+#define PORT_BIT6 (1<<9)\r
+#define PORT_BIT7 (1<<8)\r
+#define PORT_BIT8 (1<<7)\r
+#define PORT_BIT9 (1<<6)\r
+#define PORT_BIT10 (1<<5)\r
+#define PORT_BIT11 (1<<4)\r
+#define PORT_BIT12 (1<<3)\r
+#define PORT_BIT13 (1<<2)\r
+#define PORT_BIT14 (1<<1)\r
+#define PORT_BIT15 (1<<0)\r
+\r
+#define PORT_WPE_BIT PORT_BIT14\r
+#define PORT_WPS_BIT PORT_BIT15\r
+#define PORT_SRC0 PORT_BIT12\r
+#define PORT_SRC1 PORT_BIT13\r
+\r
+#define PORT_PULL_UP (PORT_WPE_BIT|PORT_WPS_BIT)\r
+#define PORT_PULL_DOWN (PORT_WPE_BIT)\r
+#define PORT_PULL_NONE 0\r
+#define PORT_SLEW_RATE_MIN 0\r
+#define PORT_SLEW_RATE_MED PORT_BIT13\r
+#define PORT_SLEW_RATE_MAX (PORT_BIT12|PORT_BIT13)\r
+#define PORT_HYS_ENABLE PORT_BIT11\r
+#define PORT_ODE_ENABLE PORT_BIT10\r
+#define PORT_IBE_ENABLE PORT_BIT7\r
+#define PORT_OBE_ENABLE PORT_BIT6\r
+#define PORT_IO (0)\r
+#define PORT_FUNC0 (0)\r
+#define PORT_FUNC1 (PORT_BIT5)\r
+#define PORT_FUNC2 (PORT_BIT4)\r
+#define PORT_FUNC3 (PORT_BIT4|PORT_BIT5)\r
+#define PORT_FUNC4 (PORT_BIT3)\r
+\r
+#define PORT_PCR_RESET (0)\r
+#define PORT_GPDO_RESET (0)\r
+\r
+#define PORT_GPDO_HIGH (1)\r
+\r
+\r
+typedef uint16 Port_PinType;\r
+\r
+typedef struct\r
+{\r
+ uint16_t padCnt;\r
+ const uint16_t *padConfig;\r
+ uint16_t outCnt;\r
+ const uint8_t *outConfig;\r
+// uint16_t inCnt;\r
+// const uint8_t *inConfig;\r
+} Port_ConfigType;\r
+\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#define PORT_PIN_NAME_PD4 52 \r
+#define PORT_PIN_NAME_PD5 53 \r
+\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ DIO_MPC5567_GENERIC_PORT = 0,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LED_K2 125\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_DioPort_1 (DIO_MPC5567_GENERIC_PORT)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LED_K2,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_DioPort_1, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += MCU PORT DIO \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:14:21 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:14:21 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_ON\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:14:21 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 16000000UL,\r
+ .Pll1 = 2,\r
+ .Pll2 = 11,\r
+ .Pll3 = 0,\r
+ },\r
+};\r
+\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 1,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+#include "mpc55xx.h"\r
+\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_ON \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_80MHZ = 0,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
/*\r
* Configuration of module Os (Os_Cfg.c)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Jan 14 10:50:05 CET 2011\r
+ * on Wed Jan 26 14:18:05 CET 2011\r
*/\r
\r
\r
/*\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Jan 14 10:50:05 CET 2011\r
+ * on Wed Jan 26 14:18:04 CET 2011\r
*/\r
\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+ \r
+// File generated on Wed Jan 26 14:18:05 CET 2011\r
+// File generated by com.arccore.bswbuilder.modules.port.mpc5567\r
+\r
+#include "Port.h"\r
+#include "Port_Cfg.h"\r
+#include <stdlib.h>\r
+\r
+const uint16_t PortPadConfigData[] = {\r
+ PORT_PCR_RESET, /* PCR 0 */\r
+ PORT_PCR_RESET, /* PCR 1 */\r
+ PORT_PCR_RESET, /* PCR 2 */\r
+ PORT_PCR_RESET, /* PCR 3 */\r
+ PORT_PCR_RESET, /* PCR 4 */\r
+ PORT_PCR_RESET, /* PCR 5 */\r
+ PORT_PCR_RESET, /* PCR 6 */\r
+ PORT_PCR_RESET, /* PCR 7 */\r
+ PORT_PCR_RESET, /* PCR 8 */\r
+ PORT_PCR_RESET, /* PCR 9 */\r
+ PORT_PCR_RESET, /* PCR 10 */\r
+ PORT_PCR_RESET, /* PCR 11 */\r
+ PORT_PCR_RESET, /* PCR 12 */\r
+ PORT_PCR_RESET, /* PCR 13 */\r
+ PORT_PCR_RESET, /* PCR 14 */\r
+ PORT_PCR_RESET, /* PCR 15 */\r
+ PORT_PCR_RESET, /* PCR 16 */\r
+ PORT_PCR_RESET, /* PCR 17 */\r
+ PORT_PCR_RESET, /* PCR 18 */\r
+ PORT_PCR_RESET, /* PCR 19 */\r
+ PORT_PCR_RESET, /* PCR 20 */\r
+ PORT_PCR_RESET, /* PCR 21 */\r
+ PORT_PCR_RESET, /* PCR 22 */\r
+ PORT_PCR_RESET, /* PCR 23 */\r
+ PORT_PCR_RESET, /* PCR 24 */\r
+ PORT_PCR_RESET, /* PCR 25 */\r
+ PORT_PCR_RESET, /* PCR 26 */\r
+ PORT_PCR_RESET, /* PCR 27 */\r
+ PORT_PCR_RESET, /* PCR 28 */\r
+ PORT_PCR_RESET, /* PCR 29 */\r
+ PORT_PCR_RESET, /* PCR 30 */\r
+ PORT_PCR_RESET, /* PCR 31 */\r
+ PORT_PCR_RESET, /* PCR 32 */\r
+ PORT_PCR_RESET, /* PCR 33 */\r
+ PORT_PCR_RESET, /* PCR 34 */\r
+ PORT_PCR_RESET, /* PCR 35 */\r
+ PORT_PCR_RESET, /* PCR 36 */\r
+ PORT_PCR_RESET, /* PCR 37 */\r
+ PORT_PCR_RESET, /* PCR 38 */\r
+ PORT_PCR_RESET, /* PCR 39 */\r
+ PORT_PCR_RESET, /* PCR 40 */\r
+ PORT_PCR_RESET, /* PCR 41 */\r
+ PORT_PCR_RESET, /* PCR 42 */\r
+ PORT_PCR_RESET, /* PCR 43 */\r
+ PORT_PCR_RESET, /* PCR 44 */\r
+ PORT_PCR_RESET, /* PCR 45 */\r
+ PORT_PCR_RESET, /* PCR 46 */\r
+ PORT_PCR_RESET, /* PCR 47 */\r
+ PORT_PCR_RESET, /* PCR 48 */\r
+ PORT_PCR_RESET, /* PCR 49 */\r
+ PORT_PCR_RESET, /* PCR 50 */\r
+ PORT_PCR_RESET, /* PCR 51 */\r
+ PORT_PCR_RESET, /* PCR 52 */\r
+ PORT_PCR_RESET, /* PCR 53 */\r
+ PORT_PCR_RESET, /* PCR 54 */\r
+ PORT_PCR_RESET, /* PCR 55 */\r
+ PORT_PCR_RESET, /* PCR 56 */\r
+ PORT_PCR_RESET, /* PCR 57 */\r
+ PORT_PCR_RESET, /* PCR 58 */\r
+ PORT_PCR_RESET, /* PCR 59 */\r
+ PORT_PCR_RESET, /* PCR 60 */\r
+ PORT_PCR_RESET, /* PCR 61 */\r
+ PORT_PCR_RESET, /* PCR 62 */\r
+ PORT_PCR_RESET, /* PCR 63 */\r
+ PORT_PCR_RESET, /* PCR 64 */\r
+ PORT_PCR_RESET, /* PCR 65 */\r
+ PORT_PCR_RESET, /* PCR 66 */\r
+ PORT_PCR_RESET, /* PCR 67 */\r
+ PORT_PCR_RESET, /* PCR 68 */\r
+ PORT_PCR_RESET, /* PCR 69 */\r
+ PORT_PCR_RESET, /* PCR 70 */\r
+ PORT_PCR_RESET, /* PCR 71 */\r
+ PORT_PCR_RESET, /* PCR 72 */\r
+ PORT_PCR_RESET, /* PCR 73 */\r
+ PORT_PCR_RESET, /* PCR 74 */\r
+ PORT_PCR_RESET, /* PCR 75 */\r
+ PORT_PCR_RESET, /* PCR 76 */\r
+ PORT_PCR_RESET, /* PCR 77 */\r
+ PORT_PCR_RESET, /* PCR 78 */\r
+ PORT_PCR_RESET, /* PCR 79 */\r
+ PORT_PCR_RESET, /* PCR 80 */\r
+ PORT_PCR_RESET, /* PCR 81 */\r
+ PORT_PCR_RESET, /* PCR 82 */\r
+ PORT_PCR_RESET, /* PCR 83 */\r
+ PORT_PCR_RESET, /* PCR 84 */\r
+ PORT_PCR_RESET, /* PCR 85 */\r
+ PORT_PCR_RESET, /* PCR 86 */\r
+ PORT_PCR_RESET, /* PCR 87 */\r
+ PORT_PCR_RESET, /* PCR 88 */\r
+ PORT_PCR_RESET, /* PCR 89 */\r
+ PORT_PCR_RESET, /* PCR 90 */\r
+ PORT_PCR_RESET, /* PCR 91 */\r
+ PORT_PCR_RESET, /* PCR 92 */\r
+ PORT_PCR_RESET, /* PCR 93 */\r
+ PORT_PCR_RESET, /* PCR 94 */\r
+ PORT_PCR_RESET, /* PCR 95 */\r
+ PORT_PCR_RESET, /* PCR 96 */\r
+ PORT_PCR_RESET, /* PCR 97 */\r
+ PORT_PCR_RESET, /* PCR 98 */\r
+ PORT_PCR_RESET, /* PCR 99 */\r
+ PORT_PCR_RESET, /* PCR 100 */\r
+ PORT_PCR_RESET, /* PCR 101 */\r
+ PORT_PCR_RESET, /* PCR 102 */\r
+ PORT_PCR_RESET, /* PCR 103 */\r
+ PORT_PCR_RESET, /* PCR 104 */\r
+ PORT_PCR_RESET, /* PCR 105 */\r
+ PORT_PCR_RESET, /* PCR 106 */\r
+ PORT_PCR_RESET, /* PCR 107 */\r
+ PORT_PCR_RESET, /* PCR 108 */\r
+ PORT_PCR_RESET, /* PCR 109 */\r
+ PORT_PCR_RESET, /* PCR 110 */\r
+ PORT_PCR_RESET, /* PCR 111 */\r
+ PORT_PCR_RESET, /* PCR 112 */\r
+ PORT_PCR_RESET, /* PCR 113 */\r
+ PORT_PCR_RESET, /* PCR 114 */\r
+ PORT_PCR_RESET, /* PCR 115 */\r
+ PORT_PCR_RESET, /* PCR 116 */\r
+ PORT_PCR_RESET, /* PCR 117 */\r
+ PORT_PCR_RESET, /* PCR 118 */\r
+ PORT_PCR_RESET, /* PCR 119 */\r
+ PORT_PCR_RESET, /* PCR 120 */\r
+ PORT_PCR_RESET, /* PCR 121 */\r
+ PORT_PCR_RESET, /* PCR 122 */\r
+ PORT_PCR_RESET, /* PCR 123 */\r
+ PORT_PCR_RESET, /* PCR 124 */\r
+ ( PORT_FUNC0 | PORT_OBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE ), /* PCR 125 : PORT_PIN_MODE_DIO */\r
+ PORT_PCR_RESET, /* PCR 126 */\r
+ PORT_PCR_RESET, /* PCR 127 */\r
+ PORT_PCR_RESET, /* PCR 128 */\r
+ PORT_PCR_RESET, /* PCR 129 */\r
+ PORT_PCR_RESET, /* PCR 130 */\r
+ PORT_PCR_RESET, /* PCR 131 */\r
+ PORT_PCR_RESET, /* PCR 132 */\r
+ PORT_PCR_RESET, /* PCR 133 */\r
+ PORT_PCR_RESET, /* PCR 134 */\r
+ PORT_PCR_RESET, /* PCR 135 */\r
+ PORT_PCR_RESET, /* PCR 136 */\r
+ PORT_PCR_RESET, /* PCR 137 */\r
+ PORT_PCR_RESET, /* PCR 138 */\r
+ PORT_PCR_RESET, /* PCR 139 */\r
+ PORT_PCR_RESET, /* PCR 140 */\r
+ PORT_PCR_RESET, /* PCR 141 */\r
+ PORT_PCR_RESET, /* PCR 142 */\r
+ PORT_PCR_RESET, /* PCR 143 */\r
+ PORT_PCR_RESET, /* PCR 144 */\r
+ PORT_PCR_RESET, /* PCR 145 */\r
+ PORT_PCR_RESET, /* PCR 146 */\r
+ PORT_PCR_RESET, /* PCR 147 */\r
+ PORT_PCR_RESET, /* PCR 148 */\r
+ PORT_PCR_RESET, /* PCR 149 */\r
+ PORT_PCR_RESET, /* PCR 150 */\r
+ PORT_PCR_RESET, /* PCR 151 */\r
+ PORT_PCR_RESET, /* PCR 152 */\r
+ PORT_PCR_RESET, /* PCR 153 */\r
+ PORT_PCR_RESET, /* PCR 154 */\r
+ PORT_PCR_RESET, /* PCR 155 */\r
+ PORT_PCR_RESET, /* PCR 156 */\r
+ PORT_PCR_RESET, /* PCR 157 */\r
+ PORT_PCR_RESET, /* PCR 158 */\r
+ PORT_PCR_RESET, /* PCR 159 */\r
+ PORT_PCR_RESET, /* PCR 160 */\r
+ PORT_PCR_RESET, /* PCR 161 */\r
+ PORT_PCR_RESET, /* PCR 162 */\r
+ PORT_PCR_RESET, /* PCR 163 */\r
+ PORT_PCR_RESET, /* PCR 164 */\r
+ PORT_PCR_RESET, /* PCR 165 */\r
+ PORT_PCR_RESET, /* PCR 166 */\r
+ PORT_PCR_RESET, /* PCR 167 */\r
+ PORT_PCR_RESET, /* PCR 168 */\r
+ PORT_PCR_RESET, /* PCR 169 */\r
+ PORT_PCR_RESET, /* PCR 170 */\r
+ PORT_PCR_RESET, /* PCR 171 */\r
+ PORT_PCR_RESET, /* PCR 172 */\r
+ PORT_PCR_RESET, /* PCR 173 */\r
+ PORT_PCR_RESET, /* PCR 174 */\r
+ PORT_PCR_RESET, /* PCR 175 */\r
+ PORT_PCR_RESET, /* PCR 176 */\r
+ PORT_PCR_RESET, /* PCR 177 */\r
+ PORT_PCR_RESET, /* PCR 178 */\r
+ PORT_PCR_RESET, /* PCR 179 */\r
+ PORT_PCR_RESET, /* PCR 180 */\r
+ PORT_PCR_RESET, /* PCR 181 */\r
+ PORT_PCR_RESET, /* PCR 182 */\r
+ PORT_PCR_RESET, /* PCR 183 */\r
+ PORT_PCR_RESET, /* PCR 184 */\r
+ PORT_PCR_RESET, /* PCR 185 */\r
+ PORT_PCR_RESET, /* PCR 186 */\r
+ PORT_PCR_RESET, /* PCR 187 */\r
+ PORT_PCR_RESET, /* PCR 188 */\r
+ PORT_PCR_RESET, /* PCR 189 */\r
+ PORT_PCR_RESET, /* PCR 190 */\r
+ PORT_PCR_RESET, /* PCR 191 */\r
+ PORT_PCR_RESET, /* PCR 192 */\r
+ PORT_PCR_RESET, /* PCR 193 */\r
+ PORT_PCR_RESET, /* PCR 194 */\r
+ PORT_PCR_RESET, /* PCR 195 */\r
+ PORT_PCR_RESET, /* PCR 196 */\r
+ PORT_PCR_RESET, /* PCR 197 */\r
+ PORT_PCR_RESET, /* PCR 198 */\r
+ PORT_PCR_RESET, /* PCR 199 */\r
+ PORT_PCR_RESET, /* PCR 200 */\r
+ PORT_PCR_RESET, /* PCR 201 */\r
+ PORT_PCR_RESET, /* PCR 202 */\r
+ PORT_PCR_RESET, /* PCR 203 */\r
+ PORT_PCR_RESET, /* PCR 204 */\r
+ PORT_PCR_RESET, /* PCR 205 */\r
+ PORT_PCR_RESET, /* PCR 206 */\r
+ PORT_PCR_RESET, /* PCR 207 */\r
+ PORT_PCR_RESET, /* PCR 208 */\r
+ PORT_PCR_RESET, /* PCR 209 */\r
+ PORT_PCR_RESET, /* PCR 210 */\r
+ PORT_PCR_RESET, /* PCR 211 */\r
+ PORT_PCR_RESET, /* PCR 212 */\r
+ PORT_PCR_RESET, /* PCR 213 */\r
+ PORT_PCR_RESET, /* PCR 214 */\r
+ PORT_PCR_RESET, /* PCR 215 */\r
+ PORT_PCR_RESET, /* PCR 216 */\r
+ PORT_PCR_RESET, /* PCR 217 */\r
+ PORT_PCR_RESET, /* PCR 218 */\r
+ PORT_PCR_RESET, /* PCR 219 */\r
+ PORT_PCR_RESET, /* PCR 220 */\r
+ PORT_PCR_RESET, /* PCR 221 */\r
+ PORT_PCR_RESET, /* PCR 222 */\r
+ PORT_PCR_RESET, /* PCR 223 */\r
+ PORT_PCR_RESET, /* PCR 224 */\r
+ PORT_PCR_RESET, /* PCR 225 */\r
+ PORT_PCR_RESET, /* PCR 226 */\r
+ PORT_PCR_RESET, /* PCR 227 */\r
+ PORT_PCR_RESET, /* PCR 228 */\r
+ PORT_PCR_RESET, /* PCR 229 */\r
+ PORT_PCR_RESET, /* PCR 230 */\r
+ PORT_PCR_RESET, /* PCR 231 */\r
+ PORT_PCR_RESET, /* PCR 232 */\r
+ PORT_PCR_RESET, /* PCR 233 */\r
+ PORT_PCR_RESET, /* PCR 234 */\r
+ PORT_PCR_RESET, /* PCR 235 */\r
+ PORT_PCR_RESET, /* PCR 236 */\r
+ PORT_PCR_RESET, /* PCR 237 */\r
+ PORT_PCR_RESET, /* PCR 238 */\r
+ PORT_PCR_RESET, /* PCR 239 */\r
+ PORT_PCR_RESET, /* PCR 240 */\r
+ PORT_PCR_RESET, /* PCR 241 */\r
+ PORT_PCR_RESET, /* PCR 242 */\r
+ PORT_PCR_RESET, /* PCR 243 */\r
+ PORT_PCR_RESET, /* PCR 244 */\r
+ PORT_PCR_RESET, /* PCR 245 */\r
+ PORT_PCR_RESET, /* PCR 246 */\r
+ PORT_PCR_RESET, /* PCR 247 */\r
+ PORT_PCR_RESET, /* PCR 248 */\r
+ PORT_PCR_RESET, /* PCR 249 */\r
+ PORT_PCR_RESET, /* PCR 250 */\r
+ PORT_PCR_RESET, /* PCR 251 */\r
+ PORT_PCR_RESET, /* PCR 252 */\r
+ PORT_PCR_RESET, /* PCR 253 */\r
+ PORT_PCR_RESET, /* PCR 254 */\r
+ PORT_PCR_RESET, /* PCR 255 */\r
+ PORT_PCR_RESET, /* PCR 256 */\r
+ PORT_PCR_RESET, /* PCR 257 */\r
+ PORT_PCR_RESET, /* PCR 258 */\r
+ PORT_PCR_RESET, /* PCR 259 */\r
+ PORT_PCR_RESET, /* PCR 260 */\r
+ PORT_PCR_RESET, /* PCR 261 */\r
+ PORT_PCR_RESET, /* PCR 262 */\r
+ PORT_PCR_RESET, /* PCR 263 */\r
+ PORT_PCR_RESET, /* PCR 264 */\r
+ PORT_PCR_RESET, /* PCR 265 */\r
+ PORT_PCR_RESET, /* PCR 266 */\r
+ PORT_PCR_RESET, /* PCR 267 */\r
+ PORT_PCR_RESET, /* PCR 268 */\r
+ PORT_PCR_RESET, /* PCR 269 */\r
+ PORT_PCR_RESET, /* PCR 270 */\r
+ PORT_PCR_RESET, /* PCR 271 */\r
+ PORT_PCR_RESET, /* PCR 272 */\r
+ PORT_PCR_RESET, /* PCR 273 */\r
+ PORT_PCR_RESET, /* PCR 274 */\r
+ PORT_PCR_RESET, /* PCR 275 */\r
+ PORT_PCR_RESET, /* PCR 276 */\r
+ PORT_PCR_RESET, /* PCR 277 */\r
+ PORT_PCR_RESET, /* PCR 278 */\r
+ PORT_PCR_RESET, /* PCR 279 */\r
+ PORT_PCR_RESET, /* PCR 280 */\r
+ PORT_PCR_RESET, /* PCR 281 */\r
+ PORT_PCR_RESET, /* PCR 282 */\r
+ PORT_PCR_RESET, /* PCR 283 */\r
+ PORT_PCR_RESET, /* PCR 284 */\r
+ PORT_PCR_RESET, /* PCR 285 */\r
+ PORT_PCR_RESET, /* PCR 286 */\r
+ PORT_PCR_RESET, /* PCR 287 */\r
+ PORT_PCR_RESET, /* PCR 288 */\r
+ PORT_PCR_RESET, /* PCR 289 */\r
+ PORT_PCR_RESET, /* PCR 290 */\r
+ PORT_PCR_RESET, /* PCR 291 */\r
+ PORT_PCR_RESET, /* PCR 292 */\r
+ PORT_PCR_RESET, /* PCR 293 */\r
+ PORT_PCR_RESET, /* PCR 294 */\r
+ PORT_PCR_RESET, /* PCR 295 */\r
+ PORT_PCR_RESET, /* PCR 296 */\r
+ PORT_PCR_RESET, /* PCR 297 */\r
+ PORT_PCR_RESET, /* PCR 298 */\r
+};\r
+\r
+const uint8_t PortOutConfigData[] = {\r
+ PORT_GPDO_RESET, /* GPDO 0 */\r
+ PORT_GPDO_RESET, /* GPDO 1 */\r
+ PORT_GPDO_RESET, /* GPDO 2 */\r
+ PORT_GPDO_RESET, /* GPDO 3 */\r
+ PORT_GPDO_RESET, /* GPDO 4 */\r
+ PORT_GPDO_RESET, /* GPDO 5 */\r
+ PORT_GPDO_RESET, /* GPDO 6 */\r
+ PORT_GPDO_RESET, /* GPDO 7 */\r
+ PORT_GPDO_RESET, /* GPDO 8 */\r
+ PORT_GPDO_RESET, /* GPDO 9 */\r
+ PORT_GPDO_RESET, /* GPDO 10 */\r
+ PORT_GPDO_RESET, /* GPDO 11 */\r
+ PORT_GPDO_RESET, /* GPDO 12 */\r
+ PORT_GPDO_RESET, /* GPDO 13 */\r
+ PORT_GPDO_RESET, /* GPDO 14 */\r
+ PORT_GPDO_RESET, /* GPDO 15 */\r
+ PORT_GPDO_RESET, /* GPDO 16 */\r
+ PORT_GPDO_RESET, /* GPDO 17 */\r
+ PORT_GPDO_RESET, /* GPDO 18 */\r
+ PORT_GPDO_RESET, /* GPDO 19 */\r
+ PORT_GPDO_RESET, /* GPDO 20 */\r
+ PORT_GPDO_RESET, /* GPDO 21 */\r
+ PORT_GPDO_RESET, /* GPDO 22 */\r
+ PORT_GPDO_RESET, /* GPDO 23 */\r
+ PORT_GPDO_RESET, /* GPDO 24 */\r
+ PORT_GPDO_RESET, /* GPDO 25 */\r
+ PORT_GPDO_RESET, /* GPDO 26 */\r
+ PORT_GPDO_RESET, /* GPDO 27 */\r
+ PORT_GPDO_RESET, /* GPDO 28 */\r
+ PORT_GPDO_RESET, /* GPDO 29 */\r
+ PORT_GPDO_RESET, /* GPDO 30 */\r
+ PORT_GPDO_RESET, /* GPDO 31 */\r
+ PORT_GPDO_RESET, /* GPDO 32 */\r
+ PORT_GPDO_RESET, /* GPDO 33 */\r
+ PORT_GPDO_RESET, /* GPDO 34 */\r
+ PORT_GPDO_RESET, /* GPDO 35 */\r
+ PORT_GPDO_RESET, /* GPDO 36 */\r
+ PORT_GPDO_RESET, /* GPDO 37 */\r
+ PORT_GPDO_RESET, /* GPDO 38 */\r
+ PORT_GPDO_RESET, /* GPDO 39 */\r
+ PORT_GPDO_RESET, /* GPDO 40 */\r
+ PORT_GPDO_RESET, /* GPDO 41 */\r
+ PORT_GPDO_RESET, /* GPDO 42 */\r
+ PORT_GPDO_RESET, /* GPDO 43 */\r
+ PORT_GPDO_RESET, /* GPDO 44 */\r
+ PORT_GPDO_RESET, /* GPDO 45 */\r
+ PORT_GPDO_RESET, /* GPDO 46 */\r
+ PORT_GPDO_RESET, /* GPDO 47 */\r
+ PORT_GPDO_RESET, /* GPDO 48 */\r
+ PORT_GPDO_RESET, /* GPDO 49 */\r
+ PORT_GPDO_RESET, /* GPDO 50 */\r
+ PORT_GPDO_RESET, /* GPDO 51 */\r
+ PORT_GPDO_RESET, /* GPDO 52 */\r
+ PORT_GPDO_RESET, /* GPDO 53 */\r
+ PORT_GPDO_RESET, /* GPDO 54 */\r
+ PORT_GPDO_RESET, /* GPDO 55 */\r
+ PORT_GPDO_RESET, /* GPDO 56 */\r
+ PORT_GPDO_RESET, /* GPDO 57 */\r
+ PORT_GPDO_RESET, /* GPDO 58 */\r
+ PORT_GPDO_RESET, /* GPDO 59 */\r
+ PORT_GPDO_RESET, /* GPDO 60 */\r
+ PORT_GPDO_RESET, /* GPDO 61 */\r
+ PORT_GPDO_RESET, /* GPDO 62 */\r
+ PORT_GPDO_RESET, /* GPDO 63 */\r
+ PORT_GPDO_RESET, /* GPDO 64 */\r
+ PORT_GPDO_RESET, /* GPDO 65 */\r
+ PORT_GPDO_RESET, /* GPDO 66 */\r
+ PORT_GPDO_RESET, /* GPDO 67 */\r
+ PORT_GPDO_RESET, /* GPDO 68 */\r
+ PORT_GPDO_RESET, /* GPDO 69 */\r
+ PORT_GPDO_RESET, /* GPDO 70 */\r
+ PORT_GPDO_RESET, /* GPDO 71 */\r
+ PORT_GPDO_RESET, /* GPDO 72 */\r
+ PORT_GPDO_RESET, /* GPDO 73 */\r
+ PORT_GPDO_RESET, /* GPDO 74 */\r
+ PORT_GPDO_RESET, /* GPDO 75 */\r
+ PORT_GPDO_RESET, /* GPDO 76 */\r
+ PORT_GPDO_RESET, /* GPDO 77 */\r
+ PORT_GPDO_RESET, /* GPDO 78 */\r
+ PORT_GPDO_RESET, /* GPDO 79 */\r
+ PORT_GPDO_RESET, /* GPDO 80 */\r
+ PORT_GPDO_RESET, /* GPDO 81 */\r
+ PORT_GPDO_RESET, /* GPDO 82 */\r
+ PORT_GPDO_RESET, /* GPDO 83 */\r
+ PORT_GPDO_RESET, /* GPDO 84 */\r
+ PORT_GPDO_RESET, /* GPDO 85 */\r
+ PORT_GPDO_RESET, /* GPDO 86 */\r
+ PORT_GPDO_RESET, /* GPDO 87 */\r
+ PORT_GPDO_RESET, /* GPDO 88 */\r
+ PORT_GPDO_RESET, /* GPDO 89 */\r
+ PORT_GPDO_RESET, /* GPDO 90 */\r
+ PORT_GPDO_RESET, /* GPDO 91 */\r
+ PORT_GPDO_RESET, /* GPDO 92 */\r
+ PORT_GPDO_RESET, /* GPDO 93 */\r
+ PORT_GPDO_RESET, /* GPDO 94 */\r
+ PORT_GPDO_RESET, /* GPDO 95 */\r
+ PORT_GPDO_RESET, /* GPDO 96 */\r
+ PORT_GPDO_RESET, /* GPDO 97 */\r
+ PORT_GPDO_RESET, /* GPDO 98 */\r
+ PORT_GPDO_RESET, /* GPDO 99 */\r
+ PORT_GPDO_RESET, /* GPDO 100 */\r
+ PORT_GPDO_RESET, /* GPDO 101 */\r
+ PORT_GPDO_RESET, /* GPDO 102 */\r
+ PORT_GPDO_RESET, /* GPDO 103 */\r
+ PORT_GPDO_RESET, /* GPDO 104 */\r
+ PORT_GPDO_RESET, /* GPDO 105 */\r
+ PORT_GPDO_RESET, /* GPDO 106 */\r
+ PORT_GPDO_RESET, /* GPDO 107 */\r
+ PORT_GPDO_RESET, /* GPDO 108 */\r
+ PORT_GPDO_RESET, /* GPDO 109 */\r
+ PORT_GPDO_RESET, /* GPDO 110 */\r
+ PORT_GPDO_RESET, /* GPDO 111 */\r
+ PORT_GPDO_RESET, /* GPDO 112 */\r
+ PORT_GPDO_RESET, /* GPDO 113 */\r
+ PORT_GPDO_RESET, /* GPDO 114 */\r
+ PORT_GPDO_RESET, /* GPDO 115 */\r
+ PORT_GPDO_RESET, /* GPDO 116 */\r
+ PORT_GPDO_RESET, /* GPDO 117 */\r
+ PORT_GPDO_RESET, /* GPDO 118 */\r
+ PORT_GPDO_RESET, /* GPDO 119 */\r
+ PORT_GPDO_RESET, /* GPDO 120 */\r
+ PORT_GPDO_RESET, /* GPDO 121 */\r
+ PORT_GPDO_RESET, /* GPDO 122 */\r
+ PORT_GPDO_RESET, /* GPDO 123 */\r
+ PORT_GPDO_RESET, /* GPDO 124 */\r
+ PORT_GPDO_RESET, /* GPDO 125 */\r
+ PORT_GPDO_RESET, /* GPDO 126 */\r
+ PORT_GPDO_RESET, /* GPDO 127 */\r
+ PORT_GPDO_RESET, /* GPDO 128 */\r
+ PORT_GPDO_RESET, /* GPDO 129 */\r
+ PORT_GPDO_RESET, /* GPDO 130 */\r
+ PORT_GPDO_RESET, /* GPDO 131 */\r
+ PORT_GPDO_RESET, /* GPDO 132 */\r
+ PORT_GPDO_RESET, /* GPDO 133 */\r
+ PORT_GPDO_RESET, /* GPDO 134 */\r
+ PORT_GPDO_RESET, /* GPDO 135 */\r
+ PORT_GPDO_RESET, /* GPDO 136 */\r
+ PORT_GPDO_RESET, /* GPDO 137 */\r
+ PORT_GPDO_RESET, /* GPDO 138 */\r
+ PORT_GPDO_RESET, /* GPDO 139 */\r
+ PORT_GPDO_RESET, /* GPDO 140 */\r
+ PORT_GPDO_RESET, /* GPDO 141 */\r
+ PORT_GPDO_RESET, /* GPDO 142 */\r
+ PORT_GPDO_RESET, /* GPDO 143 */\r
+ PORT_GPDO_RESET, /* GPDO 144 */\r
+ PORT_GPDO_RESET, /* GPDO 145 */\r
+ PORT_GPDO_RESET, /* GPDO 146 */\r
+ PORT_GPDO_RESET, /* GPDO 147 */\r
+ PORT_GPDO_RESET, /* GPDO 148 */\r
+ PORT_GPDO_RESET, /* GPDO 149 */\r
+ PORT_GPDO_RESET, /* GPDO 150 */\r
+ PORT_GPDO_RESET, /* GPDO 151 */\r
+ PORT_GPDO_RESET, /* GPDO 152 */\r
+ PORT_GPDO_RESET, /* GPDO 153 */\r
+ PORT_GPDO_RESET, /* GPDO 154 */\r
+ PORT_GPDO_RESET, /* GPDO 155 */\r
+ PORT_GPDO_RESET, /* GPDO 156 */\r
+ PORT_GPDO_RESET, /* GPDO 157 */\r
+ PORT_GPDO_RESET, /* GPDO 158 */\r
+ PORT_GPDO_RESET, /* GPDO 159 */\r
+ PORT_GPDO_RESET, /* GPDO 160 */\r
+ PORT_GPDO_RESET, /* GPDO 161 */\r
+ PORT_GPDO_RESET, /* GPDO 162 */\r
+ PORT_GPDO_RESET, /* GPDO 163 */\r
+ PORT_GPDO_RESET, /* GPDO 164 */\r
+ PORT_GPDO_RESET, /* GPDO 165 */\r
+ PORT_GPDO_RESET, /* GPDO 166 */\r
+ PORT_GPDO_RESET, /* GPDO 167 */\r
+ PORT_GPDO_RESET, /* GPDO 168 */\r
+ PORT_GPDO_RESET, /* GPDO 169 */\r
+ PORT_GPDO_RESET, /* GPDO 170 */\r
+ PORT_GPDO_RESET, /* GPDO 171 */\r
+ PORT_GPDO_RESET, /* GPDO 172 */\r
+ PORT_GPDO_RESET, /* GPDO 173 */\r
+ PORT_GPDO_RESET, /* GPDO 174 */\r
+ PORT_GPDO_RESET, /* GPDO 175 */\r
+ PORT_GPDO_RESET, /* GPDO 176 */\r
+ PORT_GPDO_RESET, /* GPDO 177 */\r
+ PORT_GPDO_RESET, /* GPDO 178 */\r
+ PORT_GPDO_RESET, /* GPDO 179 */\r
+ PORT_GPDO_RESET, /* GPDO 180 */\r
+ PORT_GPDO_RESET, /* GPDO 181 */\r
+ PORT_GPDO_RESET, /* GPDO 182 */\r
+ PORT_GPDO_RESET, /* GPDO 183 */\r
+ PORT_GPDO_RESET, /* GPDO 184 */\r
+ PORT_GPDO_RESET, /* GPDO 185 */\r
+ PORT_GPDO_RESET, /* GPDO 186 */\r
+ PORT_GPDO_RESET, /* GPDO 187 */\r
+ PORT_GPDO_RESET, /* GPDO 188 */\r
+ PORT_GPDO_RESET, /* GPDO 189 */\r
+ PORT_GPDO_RESET, /* GPDO 190 */\r
+ PORT_GPDO_RESET, /* GPDO 191 */\r
+ PORT_GPDO_RESET, /* GPDO 192 */\r
+ PORT_GPDO_RESET, /* GPDO 193 */\r
+ PORT_GPDO_RESET, /* GPDO 194 */\r
+ PORT_GPDO_RESET, /* GPDO 195 */\r
+ PORT_GPDO_RESET, /* GPDO 196 */\r
+ PORT_GPDO_RESET, /* GPDO 197 */\r
+ PORT_GPDO_RESET, /* GPDO 198 */\r
+ PORT_GPDO_RESET, /* GPDO 199 */\r
+ PORT_GPDO_RESET, /* GPDO 200 */\r
+ PORT_GPDO_RESET, /* GPDO 201 */\r
+ PORT_GPDO_RESET, /* GPDO 202 */\r
+ PORT_GPDO_RESET, /* GPDO 203 */\r
+ PORT_GPDO_RESET, /* GPDO 204 */\r
+ PORT_GPDO_RESET, /* GPDO 205 */\r
+ PORT_GPDO_RESET, /* GPDO 206 */\r
+ PORT_GPDO_RESET, /* GPDO 207 */\r
+ PORT_GPDO_RESET, /* GPDO 208 */\r
+ PORT_GPDO_RESET, /* GPDO 209 */\r
+ PORT_GPDO_RESET, /* GPDO 210 */\r
+ PORT_GPDO_RESET, /* GPDO 211 */\r
+ PORT_GPDO_RESET, /* GPDO 212 */\r
+ PORT_GPDO_RESET, /* GPDO 213 */\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = sizeof(PortPadConfigData),\r
+ .padConfig = PortPadConfigData,\r
+ .outCnt = sizeof(PortOutConfigData),\r
+ .outConfig = PortOutConfigData,\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+\r
+#define PORT_BIT0 (1<<15)\r
+#define PORT_BIT1 (1<<14)\r
+#define PORT_BIT2 (1<<13)\r
+#define PORT_BIT3 (1<<12)\r
+#define PORT_BIT4 (1<<11)\r
+#define PORT_BIT5 (1<<10)\r
+#define PORT_BIT6 (1<<9)\r
+#define PORT_BIT7 (1<<8)\r
+#define PORT_BIT8 (1<<7)\r
+#define PORT_BIT9 (1<<6)\r
+#define PORT_BIT10 (1<<5)\r
+#define PORT_BIT11 (1<<4)\r
+#define PORT_BIT12 (1<<3)\r
+#define PORT_BIT13 (1<<2)\r
+#define PORT_BIT14 (1<<1)\r
+#define PORT_BIT15 (1<<0)\r
+\r
+#define PORT_WPE_BIT PORT_BIT14\r
+#define PORT_WPS_BIT PORT_BIT15\r
+#define PORT_SRC0 PORT_BIT12\r
+#define PORT_SRC1 PORT_BIT13\r
+\r
+#define PORT_PULL_UP (PORT_WPE_BIT|PORT_WPS_BIT)\r
+#define PORT_PULL_DOWN (PORT_WPE_BIT)\r
+#define PORT_PULL_NONE 0\r
+#define PORT_SLEW_RATE_MIN 0\r
+#define PORT_SLEW_RATE_MED PORT_BIT13\r
+#define PORT_SLEW_RATE_MAX (PORT_BIT12|PORT_BIT13)\r
+#define PORT_HYS_ENABLE PORT_BIT11\r
+#define PORT_ODE_ENABLE PORT_BIT10\r
+#define PORT_IBE_ENABLE PORT_BIT7\r
+#define PORT_OBE_ENABLE PORT_BIT6\r
+#define PORT_IO (0)\r
+#define PORT_FUNC0 (0)\r
+#define PORT_FUNC1 (PORT_BIT5)\r
+#define PORT_FUNC2 (PORT_BIT4)\r
+#define PORT_FUNC3 (PORT_BIT4|PORT_BIT5)\r
+#define PORT_FUNC4 (PORT_BIT3)\r
+\r
+#define PORT_PCR_RESET (0)\r
+#define PORT_GPDO_RESET (0)\r
+\r
+#define PORT_GPDO_HIGH (1)\r
+\r
+\r
+typedef uint16 Port_PinType;\r
+\r
+typedef struct\r
+{\r
+ uint16_t padCnt;\r
+ const uint16_t *padConfig;\r
+ uint16_t outCnt;\r
+ const uint8_t *outConfig;\r
+// uint16_t inCnt;\r
+// const uint8_t *inConfig;\r
+} Port_ConfigType;\r
+\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#define PORT_PIN_NAME_GPIO125 125 \r
+\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ A = 0,\r
+ B = 1,\r
+ C = 2,\r
+ D = 3,\r
+ E = 4,\r
+ F = 5,\r
+ G = 6,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 29\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 30\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (B)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_LED_PORT, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += PORT DIO \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 13:05:28 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 13:05:28 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_ON\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 13:05:28 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:22:38 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 8000000UL,\r
+ .Pll1 = 9,\r
+ .Pll2 = 0,\r
+ .Pll3 = 0,\r
+ },\r
+};\r
+\r
+const Mcu_PerClockConfigType McuPerClockConfigData =\r
+{ \r
+ .AHBClocksEnable = RCC_AHBPeriph_DMA1,\r
+ .APB1ClocksEnable = RCC_APB1Periph_TIM2 | RCC_APB1Periph_CAN1,\r
+ .APB2ClocksEnable = RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO\r
+};\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 1,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:22:38 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Mcu_ConfigTypes.h"\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_ON \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_8MHZ = 0,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Jan 17 08:44:56 CET 2011\r
+ * on Wed Jan 26 12:28:57 CET 2011\r
*/\r
\r
\r
\r
\r
// ############################### DEBUG OUTPUT #############################\r
-uint32 os_dbg_mask = D_RESOURCE |D_SCHTBL |D_EVENT |D_TASK |D_ALARM;\r
+uint32 os_dbg_mask = 0;\r
\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Jan 17 08:44:56 CET 2011\r
+ * on Wed Jan 26 12:28:57 CET 2011\r
*/\r
\r
#define OS_RESOURCE_CNT 0\r
#define OS_LINKED_RESOURCE_CNT 0\r
\r
-#define CFG_OS_DEBUG STD_ON\r
+#define CFG_OS_DEBUG STD_OFF\r
\r
#define OS_SC1 STD_ON \r
#define OS_STACK_MONITORING STD_ON\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+ \r
+#include "stm32f10x_gpio.h"\r
+#include "port.h"\r
+\r
+const uint32 remaps[] = {\r
+ GPIO_Remap1_CAN1,\r
+ GPIO_PartialRemap2_TIM2,\r
+};\r
+\r
+const GpioPinCnfMode_Type GPIOConf[] =\r
+{\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_14 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+};\r
+\r
+\r
+const GpioPinOutLevel_Type GPIOOutConf[] =\r
+{\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_14 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = 7,\r
+ .padConfig = GPIOConf,\r
+ .outConfig = GPIOOutConf,\r
+\r
+ .remapCount = sizeof(remaps) / sizeof(uint32),\r
+ .remaps = &remaps[0]\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Port_ConfigTypes.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_OFF\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ A = 0,\r
+ B = 1,\r
+ C = 2,\r
+ D = 3,\r
+ E = 4,\r
+ F = 5,\r
+ G = 6,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 55\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 61\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL3 51\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL4 52\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (D)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL3,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL4,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_LED_PORT, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += DIO PORT MCU \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:28:13 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:28:13 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_OFF\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:28:13 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 25000000UL,\r
+ .Pll1 = 9,\r
+ .Pll2 = 8,\r
+ .Pll3 = 0,\r
+ },\r
+};\r
+\r
+const Mcu_PerClockConfigType McuPerClockConfigData =\r
+{ \r
+ .AHBClocksEnable = RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_ETH_MAC | RCC_AHBPeriph_ETH_MAC_Tx | RCC_AHBPeriph_ETH_MAC_Rx,\r
+ .APB1ClocksEnable = RCC_APB1Periph_TIM2 | RCC_APB1Periph_CAN1,\r
+ .APB2ClocksEnable = RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO\r
+};\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 1,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Mcu_ConfigTypes.h"\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_OFF \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_25MHZ = 0,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Jan 14 09:10:32 CET 2011\r
+ * on Fri Jan 21 11:32:26 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Jan 14 09:10:32 CET 2011\r
+ * on Fri Jan 21 11:32:26 CET 2011\r
*/\r
\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+ \r
+#include "stm32f10x_gpio.h"\r
+#include "port.h"\r
+\r
+const uint32 remaps[] = {\r
+};\r
+\r
+const GpioPinCnfMode_Type GPIOConf[] =\r
+{\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_4 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+};\r
+\r
+\r
+const GpioPinOutLevel_Type GPIOOutConf[] =\r
+{\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_4 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = 7,\r
+ .padConfig = GPIOConf,\r
+ .outConfig = GPIOOutConf,\r
+\r
+ .remapCount = sizeof(remaps) / sizeof(uint32),\r
+ .remaps = &remaps[0]\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Port_ConfigTypes.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#endif /* PORT_CFG_H_ */\r
#include "Pwm.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#define USE_TRACE 1\r
-#define USE_LDEBUG_PRINTF 1\r
+\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
/* Notification callback from channel 0 */\r
void StartupHook( void ) {\r
LDEBUG_FPUTS("## StartupHook\n");\r
\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
}\r
// LDEBUG_PRINTF("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#include <stdio.h>\r
#include <assert.h>\r
#include "pwm_sine_main.h"\r
+\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
-//#include "WdgM.h"\r
\r
\r
void OsIdle( void ) {\r
\r
\r
#include "Os.h"\r
+#include "Mcu.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#define USE_TRACE 1\r
-#include "debug.h"\r
-#include "Mcu.h"\r
-\r
-\r
-#if 0\r
-#ifdef USE_STARTUPHOOK\r
-#ifdef CFG_MPC55XX\r
-#if !defined(USE_SIMULATOR)\r
-// Quick fix\r
-//#include "Kernel_Offset.h"\r
\r
-extern uint8_t pcb_list[];\r
-\r
-#endif\r
-#endif\r
-#endif\r
-#endif\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
\r
\r
\r
void StartupHook( void ) {\r
LDEBUG_FPUTS("## StartupHook\n");\r
\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
void PostTaskHook( void ) {\r
// LDEBUG_PRINTF("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#include "EcuM.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#include "debug.h"\r
#include "Com.h"\r
#include "pwm_node2_helpers.h"\r
\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
+\r
void OsIdle( void ) {\r
for(;;);\r
}\r
#include "Mcu.h"
#include "arc.h"
-#define USE_LDEBUG_PRINTF
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.
#include "debug.h"
// How many errors to keep in error log.
}
void StartupHook( void ) {
- uint32_t sys_freq = McuE_GetSystemClock();
-
LDEBUG_FPUTS("## StartupHook\n");
- LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)sys_freq);
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());
}
void ShutdownHook( StatusType Error ) {
\r
\r
#include "Os.h"\r
+#include "Mcu.h"\r
#include <stdio.h>\r
#include <assert.h>\r
\r
-#define USE_LDEBUG_PRINTF\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
-#include "Mcu.h"\r
-\r
-\r
-#if 0\r
-#ifdef USE_STARTUPHOOK\r
-#ifdef CFG_MPC55XX\r
-#if !defined(USE_SIMULATOR)\r
-// Quick fix\r
-//#include "Kernel_Offset.h"\r
-\r
-extern uint8_t pcb_list[];\r
-\r
-#endif\r
-#endif\r
-#endif\r
-#endif\r
\r
\r
\r
void StartupHook( void ) {\r
LDEBUG_PRINTF("## StartupHook\n");\r
\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
void PostTaskHook( void ) {\r
// dbg_printf("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#include "EcuM.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#include "debug.h"\r
#include "Com.h"\r
#include "Adc.h"\r
\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
+\r
void OsIdle( void ) {\r
for(;;);\r
}\r
#include "Mcu.h"\r
#include "arc.h"\r
\r
-#define USE_LDEBUG_PRINTF\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
// How many errors to keep in error log.\r
}\r
\r
void StartupHook( void ) {\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
LDEBUG_FPUTS("## StartupHook\n");\r
\r
- LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
#ifndef COM_COM_H_\r
#define COM_COM_H_\r
\r
-#include "Com.h"\r
-#include "PduR.h"\r
+#include <Com.h>\r
+#include <PduR.h>\r
\r
uint8 Com_SendSignal(Com_SignalIdType SignalId, const void *SignalDataPtr);\r
uint8 Com_ReceiveSignal(Com_SignalIdType SignalId, void* SignalDataPtr);\r
#define ECUM_H_\r
\r
#include "Std_Types.h"\r
-#include "Os.h"\r
+#include <Os.h>\r
#if defined(USE_COM)\r
#include "ComStack_Types.h"\r
#endif\r
#define ECUM_E_MISMATCHED_RUN_RELEASE (0x15)\r
#define ECUM_E_STATE_PAR_OUT_OF_RANGE (0x16)\r
#define ECUM_E_UNKNOWN_WAKEUP_SOURCE (0x17)\r
+#define ECUM_E_ARC_TIMERERROR (0x18)\r
//@}\r
\r
/** @name Service id's */\r
#define ECUM_GET_BOOTARGET_ID (0x13)\r
#define ECUM_MAINFUNCTION_ID (0x18)\r
#define ECUM_COMM_HASREQUESTEDRUN_ID (0x1b)\r
+#define ECUM_ARC_STARTUPTWO_ID (0x20)\r
\r
/** Possible states */\r
typedef enum {\r
\r
void EcuM_KillAllRUNRequests(void);\r
\r
-#if defined(USE_COM)\r
+#if defined(USE_COMM)\r
Std_ReturnType EcuM_ComM_RequestRUN(NetworkHandleType channel);\r
Std_ReturnType EcuM_ComM_ReleaseRUN(NetworkHandleType channel);\r
boolean EcuM_ComM_HasRequestedRUN(NetworkHandleType channel);\r
#endif\r
\r
-Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType target, uint8 mode);\r
-Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType* target, uint8* mode);\r
-Std_ReturnType EcuM_GetLastShutdownTarget(EcuM_StateType* target, uint8* mode);\r
+Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType shutdownTarget, uint8 sleepMode);\r
+Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType* shutdownTarget, uint8* sleepMode);\r
+Std_ReturnType EcuM_GetLastShutdownTarget(EcuM_StateType* shutdownTarget, uint8* sleepMode);\r
\r
EcuM_WakeupSourceType EcuM_GetPendingWakeupEvents(void);\r
void EcuM_ClearWakeupEvent(EcuM_WakeupSourceType sources);\r
#include "Port_Cfg.h" /** @req PORT130 */
#if (PORT_VERSION_INFO_API == STD_ON)
-void
-Port_GetVersionInfo(Std_VersionInfoType *versionInfo);
+void Port_GetVersionInfo(Std_VersionInfoType *versionInfo);
#endif
/** @name Error Codes */
typedef uint32 Port_PinModeType;
#endif
-void
-Port_Init(const Port_ConfigType *configType);
-#if ( PORT_PIN_DIRECTION_CHANGES_ALLOWED == STD_ON )
-void
-Port_SetPinDirection(Port_PinType pin, Port_PinDirectionType direction);
+void Port_Init(const Port_ConfigType *configType);
+
+#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )
+void Port_SetPinDirection(Port_PinType pin, Port_PinDirectionType direction);
#endif
-void
-Port_RefreshPortDirection(void);
+
+void Port_RefreshPortDirection(void);
+
#if (PORT_SET_PIN_MODE_API == STD_ON)
-void
-Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode);
+void Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode);
#endif
#endif /*PORT_H_*/
// SET WARNING LEVEL:\r
-w3 //-wlib(0)// 1:only errors, 2: +warnings 3: + infos\r
\r
-//Reset which files are viewed library-files to only treat <> as such\r
-+libclass(angle)\r
+//Reset which files are viewed library-files to only treat the ones in msys library as such\r
++libclass()\r
++libdir(*/msys/include*)\r
\r
//+os(lintOutput.TMP) //append output to file\r
//+oe(lintErrorOutput.TMP)//append error output to file\r
#include "EcuM.h"\r
#include "Modules.h"\r
#include <string.h>\r
-#include "Os.h"\r
+#include <Os.h>\r
#include "EcuM_Internals.h"\r
#include "EcuM_Cbk.h"\r
#include "Mcu.h"\r
#include "Rte_Main.h"\r
#endif\r
\r
-EcuM_GobalType internal_data;\r
+EcuM_GlobalType internal_data;\r
\r
void EcuM_Init( void )\r
{\r
+ Std_ReturnType status;\r
internal_data.current_state = ECUM_STATE_STARTUP_ONE;\r
\r
// Initialize drivers that are needed to determine PostBuild configuration\r
// Determine PostBuild configuration\r
internal_data.config = EcuM_DeterminePbConfiguration();\r
\r
- // Check consistency of PB configuration\r
- // TODO\r
+ // TODO: Check consistency of PB configuration\r
\r
// Initialize drivers needed before the OS-starts\r
EcuM_AL_DriverInitOne(internal_data.config);\r
// TODO Mcu_ResetType type = Mcu_GetResetReason();\r
\r
// Set default shutdown target\r
- internal_data.shutdown_target = internal_data.config->EcuMDefaultShutdownTarget;\r
- internal_data.shutdown_mode = internal_data.config->EcuMDefaultShutdownMode;\r
+ status = EcuM_SelectShutdownTarget(internal_data.config->EcuMDefaultShutdownTarget,internal_data.config->EcuMDefaultSleepMode);/** @req EcuM2181 */\r
+ if(status!=E_OK){\r
+ //TODO: Report error.\r
+ }\r
+\r
\r
// Set default application mode\r
- internal_data.app_mode = internal_data.config->EcuMDefaultAppMode;\r
+ status = EcuM_SelectApplicationMode(internal_data.config->EcuMDefaultAppMode);\r
+ if(status!=E_OK){\r
+ //TODO: Report error.\r
+ }\r
+\r
#if defined(USE_COMM)\r
internal_data.run_comm_requests = 0;\r
#endif\r
internal_data.initiated = TRUE;\r
\r
// Start this baby up\r
- StartOS(internal_data.app_mode);\r
+ AppModeType appMode;\r
+ StartOS(EcuM_GetApplicationMode(&appMode)); /** @req EcuM2141 */\r
}\r
\r
void EcuM_StartupTwo(void)\r
{\r
+ //TODO: Validate that we are in state STARTUP_ONE.\r
#if defined(USE_NVM)\r
extern CounterType Os_Arc_OsTickCounter;\r
TickType tickTimerStart, tickTimer, tickTimerElapsed;\r
// Start timer to wait for NVM job to complete\r
tickTimerStatus = GetCounterValue(Os_Arc_OsTickCounter , &tickTimerStart);\r
if (tickTimerStatus != E_OK) {\r
- // TODO: Generate error?\r
+ Det_ReportError(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
}\r
#endif\r
\r
tickTimer = tickTimerStart; // Save this because the GetElapsedCounterValue() will destroy it.\r
tickTimerStatus = GetElapsedCounterValue(Os_Arc_OsTickCounter, &tickTimer, &tickTimerElapsed);\r
if (tickTimerStatus != E_OK) {\r
- // TODO: Generate error?\r
+ Det_ReportError(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
}\r
} while( (readAllResult == NVM_REQ_PENDING) && (tickTimerElapsed < internal_data.config->EcuMNvramReadAllTimeout) );\r
-#endif\r
\r
// Initialize drivers that need NVRAM data\r
EcuM_AL_DriverInitThree(internal_data.config);\r
+#endif\r
\r
- // Indicate mode change to RTE\r
- // TODO\r
+ // TODO: Indicate mode change to RTE\r
\r
// If coming from startup sequence, enter Run mode\r
// if (internal_data.current_state == ECUM_STATE_STARTUP_TWO)\r
\r
Std_ReturnType EcuM_GetState(EcuM_StateType* state)\r
{\r
+ VALIDATE_RV(internal_data.initiated, ECUM_GETSTATE_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
VALIDATE_RV(state != NULL, ECUM_GETSTATE_ID, ECUM_E_NULL_POINTER, E_NOT_OK);\r
\r
*state = internal_data.current_state;\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_SELECTAPPMODE_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
\r
- // TODO Save this application mode for next startup\r
- (void) appMode;\r
+ internal_data.app_mode = appMode;\r
\r
- return E_NOT_OK;\r
+ return E_OK;\r
}\r
\r
Std_ReturnType EcuM_GetApplicationMode(AppModeType* appMode)\r
}\r
\r
\r
-Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType target, uint8 mode)\r
+Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType shutdownTarget, uint8 sleepMode)\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_SELECTSHUTDOWNTARGET_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV((target == ECUM_STATE_OFF) || (target == ECUM_STATE_RESET) || (target == ECUM_STATE_SLEEP), ECUM_SELECTSHUTDOWNTARGET_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV((shutdownTarget == ECUM_STATE_OFF) || (shutdownTarget == ECUM_STATE_RESET) || (shutdownTarget == ECUM_STATE_SLEEP), ECUM_SELECTSHUTDOWNTARGET_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
\r
- internal_data.shutdown_target = target;\r
- internal_data.shutdown_mode = mode;\r
+ internal_data.shutdown_target = shutdownTarget;\r
+ internal_data.sleep_mode = sleepMode;\r
\r
return E_OK;\r
}\r
\r
\r
-Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType *target, uint8 *mode)\r
+Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType* shutdownTarget, uint8* sleepMode) /** @req EcuM2824 */\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_GETSHUTDOWNTARGET_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
+ VALIDATE_RV(shutdownTarget != NULL, ECUM_GETSHUTDOWNTARGET_ID, ECUM_E_NULL_POINTER, E_NOT_OK);\r
+ VALIDATE_RV(sleepMode != NULL, ECUM_GETSHUTDOWNTARGET_ID, ECUM_E_NULL_POINTER, E_NOT_OK);\r
\r
- *target = internal_data.shutdown_target;\r
- *mode = internal_data.shutdown_mode;\r
+ *shutdownTarget = internal_data.shutdown_target;\r
+ *sleepMode = internal_data.sleep_mode;\r
\r
return E_OK;\r
}\r
}\r
\r
#if defined(USE_COMM)\r
-Std_ReturnType EcuM_ComM_RequestRUN(NetworkHandleType user)\r
+Std_ReturnType EcuM_ComM_RequestRUN(NetworkHandleType channel)\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_COMM_REQUESTRUN_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV(user < 32, ECUM_COMM_REQUESTRUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV(channel < 32, ECUM_COMM_REQUESTRUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
\r
- internal_data.run_comm_requests |= (uint32)1 << user;\r
+ internal_data.run_comm_requests |= (uint32)1 << channel;\r
\r
return E_OK;\r
}\r
\r
-Std_ReturnType EcuM_ComM_ReleaseRUN(NetworkHandleType user)\r
+Std_ReturnType EcuM_ComM_ReleaseRUN(NetworkHandleType channel)\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_COMM_RELEASERUN_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV(user < 32, ECUM_COMM_RELEASERUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV(channel < 32, ECUM_COMM_RELEASERUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
\r
- internal_data.run_comm_requests &= ~((uint32)1 << user);\r
+ internal_data.run_comm_requests &= ~((uint32)1 << channel);\r
\r
return E_OK;\r
}\r
\r
-boolean EcuM_ComM_HasRequestedRUN(NetworkHandleType user)\r
+boolean EcuM_ComM_HasRequestedRUN(NetworkHandleType channel)\r
{\r
- VALIDATE_RV(internal_data.initiated, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV(user < 32, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV(internal_data.initiated, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_NOT_INITIATED, FALSE);\r
+ VALIDATE_RV(channel < 32, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_INVALID_PAR, FALSE);\r
\r
- return (internal_data.run_comm_requests &((uint32)1 << user)) != 0;\r
+ return (internal_data.run_comm_requests &((uint32)1 << channel)) != 0;\r
}\r
#endif\r
\r
boolean initiated;\r
EcuM_ConfigType* config;\r
EcuM_StateType shutdown_target;\r
- uint8 shutdown_mode;\r
+ uint8 sleep_mode;\r
AppModeType app_mode;\r
EcuM_StateType current_state;\r
#if defined(USE_COMM)\r
#endif\r
uint32 run_requests;\r
uint32 postrun_requests;\r
-} EcuM_GobalType;\r
+} EcuM_GlobalType;\r
\r
-extern EcuM_GobalType internal_data;\r
+extern EcuM_GlobalType internal_data;\r
\r
void EcuM_enter_run_mode(void);\r
\r
static uint32 internal_data_run_state_timeout = 0;\r
#if defined(USE_NVM)\r
static uint32 internal_data_go_off_one_state_timeout = 0;\r
+static NvM_RequestResultType writeAllResult;\r
#endif\r
\r
\r
-void EcuM_enter_run_mode(void)\r
-{\r
+void EcuM_enter_run_mode(void){\r
internal_data.current_state = ECUM_STATE_APP_RUN;\r
- EcuM_OnEnterRUN();\r
- internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD;\r
+ EcuM_OnEnterRUN(); /** @req EcuM2308 */\r
+ //TODO: Call ComM_EcuM_RunModeIndication(NetworkHandleType Channel) for all channels that have requested run.\r
+ internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD; /** @req EcuM2310 */\r
}\r
\r
-static inline void enter_post_run_mode(void)\r
-{\r
- internal_data.current_state = ECUM_STATE_APP_POST_RUN;\r
-}\r
\r
-static inline void enter_prep_shutdown_mode(void)\r
-{\r
- internal_data.current_state = ECUM_STATE_PREP_SHUTDOWN;\r
- EcuM_OnPrepShutdown();\r
-}\r
+//--------- Local functions ------------------------------------------------------------------------------------------------\r
\r
-static inline void enter_go_sleep_mode(void)\r
-{\r
+static inline void enter_go_sleep_mode(void){\r
internal_data.current_state = ECUM_STATE_GO_SLEEP;\r
EcuM_OnGoSleep();\r
}\r
\r
-static inline void enter_go_off_one_mode(void)\r
-{\r
+static inline void enter_go_off_one_mode(void){\r
internal_data.current_state = ECUM_STATE_GO_OFF_ONE;\r
EcuM_OnGoOffOne();\r
\r
#endif\r
}\r
\r
-static inline boolean hasRunRequests(void)\r
-{\r
+\r
+static inline boolean hasRunRequests(void){\r
uint32 result = internal_data.run_requests;\r
\r
#if defined(USE_COMM)\r
return (result != 0);\r
}\r
\r
-static inline boolean hasPostRunRequests(void)\r
-{\r
+static inline boolean hasPostRunRequests(void){\r
return (internal_data.postrun_requests != 0);\r
}\r
\r
-void EcuM_MainFunction(void)\r
-{\r
-#if defined(USE_NVM)\r
-static NvM_RequestResultType writeAllResult;\r
-#endif\r
\r
-VALIDATE_NO_RV(internal_data.initiated, ECUM_MAINFUNCTION_ID, ECUM_E_NOT_INITIATED);\r
\r
- if (internal_data.current_state == ECUM_STATE_APP_RUN)\r
- {\r
- if (internal_data_run_state_timeout)\r
- {\r
- internal_data_run_state_timeout--;\r
- }\r
+static inline void in_state_appRun(void){\r
+ if (internal_data_run_state_timeout){\r
+ internal_data_run_state_timeout--;\r
+ }\r
\r
- if ((!hasRunRequests()) && (internal_data_run_state_timeout == 0))\r
- {\r
- EcuM_OnExitRun(); // ECUM_2865\r
- enter_post_run_mode();\r
- /*lint --e(904)*/ return;\r
- }\r
+ if ((!hasRunRequests()) && (internal_data_run_state_timeout == 0)){\r
+ EcuM_OnExitRun(); /** @req EcuM2865 */\r
+ internal_data.current_state = ECUM_STATE_APP_POST_RUN;/** @req EcuM2865 */\r
}\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_APP_POST_RUN)\r
- {\r
- if (hasRunRequests())\r
- {\r
- EcuM_enter_run_mode(); // ECUM_2866\r
- /*lint --e(904)*/ return;\r
- }\r
\r
- if (!hasPostRunRequests())\r
- {\r
- EcuM_OnExitPostRun(); // ECUM_2761\r
- enter_prep_shutdown_mode();\r
- /*lint --e(904)*/ return;\r
- }\r
+static inline void in_state_appPostRun(void){\r
+ if (hasRunRequests()){\r
+ internal_data.current_state = ECUM_STATE_APP_RUN;/** @req EcuM2866 */ /** @req EcuM2308 */\r
+ EcuM_OnEnterRUN(); /** @req EcuM2308 */\r
+ //TODO: Call ComM_EcuM_RunModeIndication(NetworkHandleType Channel) for all channels that have requested run.\r
+ internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD; /** @req EcuM2310 */\r
+\r
+ } else if (!hasPostRunRequests()){\r
+ EcuM_OnExitPostRun(); /** @req EcuM2761 */\r
+ internal_data.current_state = ECUM_STATE_PREP_SHUTDOWN;/** @req EcuM2761 */\r
+\r
+ EcuM_OnPrepShutdown();\r
+ } else {\r
+ // TODO: Do something?\r
}\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_PREP_SHUTDOWN)\r
- {\r
+static inline void in_state_prepShutdown(void){\r
#if defined(USE_DEM)\r
- // DEM shutdown\r
- Dem_Shutdown();\r
+ // DEM shutdown\r
+ Dem_Shutdown();\r
#endif\r
\r
- // Switch shutdown mode\r
- if ((internal_data.shutdown_target == ECUM_STATE_OFF) || (internal_data.shutdown_target == ECUM_STATE_RESET)) {\r
+ // Switch shutdown mode\r
+ switch(internal_data.shutdown_target){\r
+ //If in state Off or Reset go into Go_Off_One:\r
+ case ECUM_STATE_OFF:\r
+ case ECUM_STATE_RESET:\r
enter_go_off_one_mode();\r
- }\r
-\r
- if (internal_data.shutdown_target == ECUM_STATE_SLEEP) {\r
+ break;\r
+ case ECUM_STATE_SLEEP:\r
enter_go_sleep_mode();\r
- }\r
+ break;\r
+ default:\r
+ //TODO: Report error.\r
+ break;\r
}\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_GO_OFF_ONE)\r
- {\r
+static inline void in_state_goOffOne(void){\r
#if defined(USE_NVM)\r
- if (internal_data_go_off_one_state_timeout)\r
+ if (internal_data_go_off_one_state_timeout){\r
internal_data_go_off_one_state_timeout--;\r
-\r
+ }\r
// Wait for the NVM job (NvmWriteAll) to terminate\r
NvM_GetErrorStatus(0, &writeAllResult);\r
- if ((writeAllResult != NVM_REQ_PENDING) || (internal_data_go_off_one_state_timeout == 0))\r
- {\r
+ if ((writeAllResult != NVM_REQ_PENDING) || (internal_data_go_off_one_state_timeout == 0)){\r
ShutdownOS(E_OK);\r
}\r
#else\r
ShutdownOS(E_OK);\r
#endif\r
- }\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_GO_SLEEP)\r
- {\r
- // TODO: Fill out\r
- }\r
\r
+//----- MAIN -----------------------------------------------------------------------------------------------------------------\r
+void EcuM_MainFunction(void){\r
+ VALIDATE_NO_RV(internal_data.initiated, ECUM_MAINFUNCTION_ID, ECUM_E_NOT_INITIATED);\r
+\r
+ switch(internal_data.current_state){\r
+\r
+ case ECUM_STATE_APP_RUN:\r
+ in_state_appRun();\r
+ break;\r
+ case ECUM_STATE_APP_POST_RUN:\r
+ in_state_appPostRun();\r
+ break;\r
+ case ECUM_STATE_PREP_SHUTDOWN:\r
+ in_state_prepShutdown();\r
+ break;\r
+ case ECUM_STATE_GO_OFF_ONE:\r
+ in_state_goOffOne();\r
+ break;\r
+ case ECUM_STATE_GO_SLEEP:\r
+ // TODO: Fill out\r
+ break;\r
+ default:\r
+ //TODO: Report error.\r
+ break;\r
+ }\r
}\r
}
#if defined(CFG_ARM_CM3)
-extern void Irq_EOI2( void );
+extern void Irq_EOI( void );
void TailChaining(void *stack)
{
projects / arc.git / commitdiff